MAX98089ETNT

19-5865; Rev 0; 6/11 EVALUATION KIT AVAILABLE MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology General Description The MAX98089 is a full-featured audio codec whose high performance and low power consumption make it ideal for portable applications. Class D speaker amplifiers provide efficient amplification for two speakers. Low radiated emissions enable completely filterless operation. Integrated bypass switches optionally connect an external amplifier to the transducer when the Class D amplifiers are disabled. The IC features a stereo Class H headphone amplifier that utilizes a dual-mode charge pump to maximize efficiency while outputting a ground referenced signal that does not require output coupling capacitors. The IC also features a mono differential amplifier that can also be configured as a stereo line output. Two differential analog microphone inputs are available as well as support for two PDM digital microphones. Integrated switches allow for an additional microphone input as well as microphone signals to be routed out to external devices. Two flexible single-ended or differential line inputs may be connected to an FM radio or other sources. Integrated FlexSoundK technology improves loudspeaker performance by optimizing the signal level and frequency response while limiting the maximum distortion and power at the output to prevent speaker damage. Automatic gain control (AGC) and a noise gate optimize the signal level of microphone input signals to make best use of the ADC dynamic range. The device is fully specified over the -40NC to +85NC extended temperature range. FlexSound is a trademark of Maxim Integrated Products, Inc. Features S S S S S S S S S 5.6mW Power Comsumption (DAC to HP at 97dB DR) 101dB DR Stereo DAC (8kHz < fS < 96kHz) 93dB DR Stereo ADC (8kHz < fS < 96kHz) Stereo Low EMI Class D Amplifiers 1.7W/Channel (8I, VSPK�VDD = 5.0V) 2.9W/Channel (4I, VSPK�VDD = 5.0V) Efficient Class H Headphone Amplifier Differential Receiver Amplifier/Stereo Line Outputs 2 Stereo Single-Ended/Mono Differential Line Inputs 3 Differential Microphone Inputs FlexSound Technology 5-Band Parametric EQ Automatic Level Control (ALC) Excursion Limiter Speaker Power Limiter Speaker Distortion Limiter Microphone Automatic Gain Control and Noise Gate Dual I2S/PCM/TDM Digital Audio Interfaces Asynchronous Digital Mixing Supports Master Clock Frequencies from 10MHz to 60MHz RF Immune Analog Inputs and Outputs Extensive Click-and-Pop Reduction Circuitry Available in 63-Bump WLP Package (3.80mm x 3.30mm, 0.4mm Pitch) and 56-Pin TQFN Package (7mm x 7mm x 0.75mm) S S S S S S Ordering Information appears at end of data sheet. For related parts and recommended products to use with this part, refer to www.maxim-ic.com/MAX98089.related. Simplified Block Diagram I2C I2S/PCM I2S/PCM RECEIVER/LINEOUT AMPS CONTROL DIGITAL MICROPHONE INPUT DIGITAL AUDIO INTERFACE DIGITAL AUDIO INTERFACE FLEXSOUND TECHNOLOGY ADC • 5-BAND PARAMETRIC EQ • AUTOMATIC LEVEL CONTROL • LOUDSPEAKER PROCESSING • EXCURSION LIMITER • THD LIMITER • POWER LIMITER • MICROPHONE PROCESSING • AUTOMATIC GAIN CONTROL • NOISE GATE • ASYNCHRONOUS DIGITAL MIXING SPEAKER AMP DAC MIX LINEIN A1 ADC LINEIN A2 SPEAKER AMP MIX DAC HEADPHONE AMP + LINEIN B1 MAX98089 LINEIN B2 + HEADPHONE AMP ����������������������������������������������������������������� Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology TABLE OF CONTENTS General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Digital Input/Output Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input Clock Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Audio Interface Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Digital Microphone Timing Characterstics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 I2C Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Microphone to ADC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Line to ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Line-In Pin Direct to ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Digital Loopback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Analog Loopback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 DAC to Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Line to Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 DAC-to-Line Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Line-to-Line Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 DAC to Speaker. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Line to Speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 DAC to Headphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Line to Headphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Speaker Bypass Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 I2C Slave Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Microphone Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Line Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 ����������������������������������������������������������������� Maxim Integrated Products 2 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology TABLE OF CONTENTS (continued) ADC Input Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Record Path Signal Processing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Microphone AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Noise Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 ADC Record Level Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Sidetone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Digital Audio Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Clock Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Sample Rate Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Passband Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 Playback Path Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 Automatic Level Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 Parametric Equalizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 Playback Level Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 DAC Input Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 Receiver Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 Receiver Output Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Receiver Output Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Speaker Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Speaker Output Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Speaker Amplifier Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Excursion Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Speaker Output Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Power Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 Distortion Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 Headphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 DirectDrive Headphone Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 Charge Pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 Class H Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 Headphone Ground Sense (HPSNS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 Headphone Output Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 Headphone Output Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Output Bypass Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 Click-and-Pop Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 ����������������������������������������������������������������� Maxim Integrated Products 3 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology TABLE OF CONTENTS (continued) Jack Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Jack Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Accessory Button Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Jack Removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Battery Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Device Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 I2C Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Bit Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 START and STOP Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Early STOP Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Device Revision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Slave Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 Write Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 Read Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Typical Operating Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Filterless Class D Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 RF Susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Startup/Shutdown Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 Optional Ferrite Bead Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 Input Capacitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 Charge-Pump Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 Charge-Pump Flying Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 Charge-Pump Holding Capacitors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 Unused Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 Recommended PCB Routing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 Supply Bypassing, Layout, and Grounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 WLP Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 ����������������������������������������������������������������� Maxim Integrated Products 4 F4 D1 G4 DVDD AVDD G5 BCLKS1 LRCLKS2 PORT S2 SDOUTS2 SDINS2 DVDDS2 PORT S1 LRCLKS1 SDOUTS1 SDINS1 DVDDS1 BCLKS2 D4 D2 E4 E1 F2 F3 G1 G3 G2 MCLK F5 E5 E2 SDA SCL IRQ I2C SEL1 SDIN1 BCLK1 LRCLK1 BCLK2 SDOUT1 LRCLK2 SDOUT2 SDIN2 SEL2 MAX98089 REF BIAS REG F6 G6 E6 JACKSNS DAI1 MAS1 BIT CLOCK FRAME CLOCK DATA OUTPUT DATA INPUT BIT CLOCK FRAME CLOCK DATA OUTPUT DATA INPUT MAS1 HIZOFF1 MAS2 MAS2 SDIEN1 HIZOFF2 SDIEN2 DAI2 JACK DETECTION JDETEN F7 MICBIAS LBEN2 MUX RECVOLL: +8dB TO -62dB LBEN1 REG MBEN + MIX LTEN1 MIXRECL RECVOLR: +8dB TO -62dB MIX LINEMODE MIXRECR DVST: 0dB TO -60dB SIDETONE MIX MULTI BAND ALC DVEQ1: 0dB TO -15dB NOISE GATE EQ1EN EXCURSION LIMITER MIX MIXDAL DALEN DACL EQ2EN MIX DVEQ2: 0dB TO -15dB DSTS DV1G: 0/6/12/18dB 0dB RECLEN RECBYP RECP/ LOUTL/ RXINP A6 CLOCK CONTROL MIC1P/ E8 DIGMICDATA + FLEXSOUNDTM TECHNOLOGY PGAM1: +20dB TO 0dB 0dB RECREN SPKBYP RECN/ LOUTR/ RXINN B6 MIC1N/ F8 DIGMICCLK SPVOLL: +8dB TO -62dB +6dB SPLEN SPKLVDD SPKLP SPKLN A3, B3 A4, B4 A5, B5 C4, C5 EXTMIC 5-BAND PARAMETRIC EQ 5-BAND PARAMETRIC EQ MIC2BYP MODE1 AVFLT ADLEN MIX DV2: 0dB TO -15dB DCB2 ADCL AUDIO FILTERS AUDIO/ VOICE FILTERS PA1EN: 0/20/30dB AUTOMATIC GAIN CONTROL G9 MIC2P PGAM2: +20dB TO 0dB MIXSPL SPKLGND POWER/ DISTORTION LIMITER SPKRVDD SPKRP MIX SPVOLR: +8dB TO -62dB MIXSPR +6dB SPREN SPKRGND SPKRN G8 MIC2N C3, D3 C1, C2 A1, B1 A2, B2 EXTMIC INABYP MIXADL SRMIX_ SAMPLE RATE CONVERTER PA2EN: 0/20/30dB AVLG: 0/6/ 12/18dB AVL:0dB TO -15dB AVRG: 0/6/ 12/18dB AVR:0dB TO -15dB PGAINA: +20dB TO -6dB F9 INA1/EXTMICP INADIFF ADCR ADREN MIXADR DV1: 0dB TO -15dB MODE1 DVFLT MIXHPL_ PATH SEL MIX MIX MIXDAR DACR DAREN MIXHPL MIX AUDIO/ VOICE FILTERS E9 INA2/EXTMICN + PGAINA: +20dB TO -6dB HPVOLL: +3dB TO -67dB HPLEN HPL C9 PGAINB: +20dB TO -6dB E7 INB1 HPSNS C8 INBDIFF MIX MIXHPR_ PATH SEL HPVOR: +3dB TO -67dB D8 INB2 + PGAINB: +20dB TO -6dB HPR MIXHPR HPREN PVDD CHARGE PUMP HPGND D9 A7 A9 DGND F1 AGND G7 N.C. HPVDD HPVSS C1N C1P C6, C7, D5, D6, D7, E3 B9 A8 B8 B7 Functional Diagram ����������������������������������������������������������������� Maxim Integrated Products 5 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology NOTE: BUMP NUMBERS SHOWN FOR WLP PACKAGE. SEE THE PIN DESCRIPTION SECTION FOR TQFN PINOUT. MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ABSOLUTE MAXIMUM RATINGS (Voltages with respect to AGND.) DVDD, AVDD, PVDD, HPVDD .............................. -0.3V to +2.2V SPKLVDD, SPKRVDD, DVDDS1, DVDDS2 .......... -0.3V to +6.0V DGND, HPGND, SPKLGND, SPKRGND .............. -0.1V to +0.1V HPVSS ............................... (HPGND - 2.2V) to (HPGND + 0.3V) C1N .................................... (HPVSS - 0.3V) to (HPGND + 0.3V) C1P ..................................... (HPGND - 0.3V) to (HPVDD + 0.3V) REF, MICBIAS ................................. -0.3V to (SPKLVDD + 0.3V) MCLK, SDINS1, SDINS2, JACKSNS, SDA, SCL, IRQ ................................................. -0.3V to +6.0V LRCLKS1, BCLKS1, SDOUTS1 ......... -0.3V to (DVDDS1 + 0.3V) LRCLKS2, BCLKS2, SDOUTS2 ......... -0.3V to (DVDDS2 + 0.3V) REG, INA1/EXTMICP, INA2/EXTMICN, INB1, INB2, MIC1P/DIGMICDATA, MIC1N/DIGMICCLK, MIC2P, MIC2N.................................................. -0.3V to +2.2V HPSNS ............................... (HPGND - 0.3V) to (HPGND + 0.3V) HPL, HPR ............................ (HPVSS - 0.3V) to (HPVDD + 0.3V) RECP/LOUTL/RXINP, RECP/LOUTR/ RXINN ..................... (SPKLGND - 0.3V) to (SPKLVDD + 0.3V) SPKLP, SPKLN ........... (SPKLGND - 0.3V) to (SPKLVDD + 0.3V) SPKRP, SPKRN ......... (SPKRGND - 0.3V) to (SPKRVDD + 0.3V) Continuous Power Dissipation (TA = +70NC) 63-Bump WLP (derate 25.6mW/NC above +70NC)........ 2.05W 56-Pin TQFN (derate 40mW/NC above +70NC) ............... 3.2W Operating Temperature Range .......................... -40NC to +85NC Storage Temperature Range............................ -65NC to +150NC Soldering Temperature (reflow) ......................................+260NC Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER POWER SUPPLY VSPKLVDD, VSPKRVDD Supply Voltage Range Guaranteed by PSRR VDVDD, VAVDD, VPVDD VDVDDS1, VDVDDS2 Analog Full-duplex 8kHz mono, Speaker receiver output, MAS = 1 Digital Total Supply Current (Notes 2 and 3) IVDD DAC playback 48kHz stereo, headphone outputs, MAS = 1 DAC playback 48kHz stereo, speaker outputs, MAS = 1 Shutdown Supply Current (Note 2) REF Voltage REG Voltage Shutdown to Full Operation VSEN = 0 VSEN = 1 TA = +25NC Analog Speaker Digital Analog Speaker Digital Analog Speaker Digital 2.8 1.65 1.65 4.5 1.6 1.3 1.9 0.001 2.47 3.6 6.41 2.49 0.2 0.01 1 2.5 0.79 30 17 1.8 5.5 2 3.6 8 2.3 2 3 0.0058 3.5 6.5 8.5 3.5 2 1 5 V V ms FA mA V SYMBOL CONDITIONS MIN TYP MAX UNITS ����������������������������������������������������������������� Maxim Integrated Products 6 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER MICROPHONE TO ADC PATH Dynamic Range Total Harmonic Distortion + Noise Common-Mode Rejection Ratio DR fS = 8kHz, MODE = 0 (IIR voice), AVMICPRE_ = 0dB (Note 4) VIN = 0.1VP-P, fS = 8kHz, f = 1kHz THD+N AVMICPRE_ = 0dB, VIN = 1VP-P, f = 1kHz AVMICPRE_ = +30dB, VIN = 32mVP-P, f = 1kHz CMRR VIN = 100mVP-P, f = 217Hz VAVDD = 1.65V to 1.95V, input referred, MIC inputs floating Power-Supply Rejection Ratio PSRR f = 217Hz, VRIPPLE = 200mVP-P, input referred f = 1kHz, VRIPPLE = 200mVP-P, input referred f = 10kHz, VRIPPLE = 200mVP-P, input referred MODE = 0 (IIR voice) 8kHz 1kHz, 0dB input, highpass filter disabled measured from analog input to digital output MODE = 0 (IIR voice) 16kHz MODE = 1 (FIR audio) 8kHz MODE = 1 (FIR audio) 48kHz MICROPHONE PREAMP Full-Scale Input Preamplifier Gain AVMICPRE_ = 0dB PA1EN/PA2EN = 01 AVMICPRE_ (Note 5) PA1EN/PA2EN = 10 PA1EN/PA2EN = 11 PGA Gain MIC Input Resistance AVMICPGA_ (Note 5) RIN_MIC PGAM1/PGAM2 = 0x00 PGAM1/PGAM2 = 0x14 19.5 29.5 19 1.05 0 20 30 20 0 50 20.5 30.5 21 dB kI dB VP-P 50 88 -78 -85 -71 74 62 62 62 55 2.2 1.1 ms 4.5 0.76 dB dB dB dB SYMBOL CONDITIONS MIN TYP MAX UNITS Path Phase Delay All gain settings, measured at MIC1P/ MIC1N/MIC2P/MIC2N ����������������������������������������������������������������� Maxim Integrated Products 7 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER MICROPHONE BIAS MICBIAS Output Voltage Load Regulation Line Regulation Ripple Rejection VMICBIAS ILOAD = 1mA ILOAD = 1mA to 2mA VSPKLVDD = 2.8V to 5.5V f = 217Hz, VRIPPLE (SPKLVDD) = 100mVP-P f = 10kHz, VRIPPLE (SPKLVDD) = 100mVP-P A-weighted, f = 20Hz to 20kHz Noise Voltage MICROPHONE BYPASS SWITCH On-Resistance Total Harmonic Distortion + Noise Off-Isolation Off-Leakage Current LINE INPUT TO ADC PATH Dynamic Range (Note 4) Total Harmonic Distortion + Noise Gain Error DR THD+N INA pin direct, fS = 48kHz, MODE = 1 (FIR audio) VIN = 1VP-P, f = 1kHz DC accuracy VAVDD = 1.65V to 1.95V, input referred, line inputs floating, TA = +25NC f = 217Hz, VRIPPLE = 200mVP-P, AVADC = 0dB, input referred f = 1kHz, VRIPPLE = 200mVP-P, AVADC = 0dB, input referred f = 10kHz, VRIPPLE = 200mVP-P, AVADC = 0dB, input referred 57 93 -82 1 68 63 dB 63 57 -74 dB dB % RON THD+N IMIC1_ = 100mA, INABYP = MIC2BYP = 1, VMIC2_ = VINA_ = 0V, AVDD, TA = +25NC VIN = 2VP-P, VCM = 0.9V, RL = 10kI, f = 1kHz, INABYP = MIC2BYP = 1 VIN = 2VP-P, VCM = 0.9V, RL = 10kI, f = 1kHz VMIC1_ = [0V, AVDD], VMIC2_/VINA_ = [AVDD, 0V] -1 5 -80 60 +1 30 I dB dB FA P-weighted, f = 20Hz to 4kHz f = 1kHz 2.15 2.2 0.5 110 92 83 3.9 2.1 50 2.25 4.5 V mV FV dB FVRMS nV/√Hz SYMBOL CONDITIONS MIN TYP MAX UNITS Power-Supply Rejection Ratio PSRR ����������������������������������������������������������������� Maxim Integrated Products 8 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER LINE INPUT PREAMP Full-Scale Input VIN AVPGAIN_ = 0dB AVPGAIN_ = -6dB PGAINA/PGAINB = 0x0 PGAINA/PGAINB = 0x1 Level Adjust Gain TA = +25NC AVPGAIN_ (Note 5) PGAINA/PGAINB = 0x2 PGAINA/PGAINB = 0x3 PGAINA/PGAINB = 0x4 PGAINA/PGAINB = 0x5, 0x6, 0x7 AVPGAIN_ = +20dB AVPGAIN_ = +14dB Input Resistance RIN AVPGAIN_ = +3dB AVPGAIN_ = 0dB AVPGAIN_ = -3dB AVPGAIN_ = -6dB Feedback Resistance ADC LEVEL CONTROL ADC Level Adjust Range ADC Level Step Size ADC Gain Adjust Range ADC Gain Adjust Step Size ADC DIGITAL FILTERS VOICE MODE IIR LOWPASS FILTER (MODE1 = 0) Passband Cutoff Passband Ripple Stopband Cutoff Stopband Attenuation (Note 6) fSLP f > fSLP 74 fPLP Ripple limit cutoff -3dB cutoff f < fPLP 0.441 x fs 0.449 x fs -0.1 +0.1 0.47 x fS Hz dB Hz dB AVADCGAIN AVLG/AVRG = 00 to 11 (Note 5) 0 6 AVADCLVL AVL/AVR = 0xF to 0x0 (Note 5) -12 1 18 +3 dB dB dB dB RIN_FB INAEXT/INBEXT = 1 TA = +25NC TA = TMIN to TMAX 18 16 7.5 -4 -7 14.5 19 13 2 1 1.4 20 14 3 0 -3 -6 21 20 20 10 20 20 20 22 24 kI 14 kI -2 -5 28 21 15 4 dB VP-P SYMBOL CONDITIONS MIN TYP MAX UNITS ����������������������������������������������������������������� Maxim Integrated Products 9 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER SYMBOL CONDITIONS AVFLT = 0x1 (Elliptical tuned for fS = 16kHz + 217Hz notch) AVFLT = 0x2 (500Hz Butterworth tuned for fS = 16kHz) Passband Cutoff (-3dB from Peak) fAHPPB AVFLT = 0x3 (Elliptical tuned for fS = 8kHz + 217Hz notch) AVFLT = 0x4 (500Hz Butterworth tuned for fS = 8kHz) AVFLT = 0x5 (fS/240 Butterworth) AVFLT = 0x1 (Elliptical tuned for fS = 16kHz + 217Hz notch) AVFLT = 0x2 (500Hz Butterworth tuned for fS = 16kHz) Stopband Cutoff (-30dB from Peak) fAHPSB 0.0139 x fS 0.0156 x fS Hz MIN TYP MAX 0.0161 x fS 0.0319 x fS 0.0321 x fS 0.0632 x fS 0.0043 x fS Hz UNITS VOICE MODE IIR HIGHPASS FILTER (MODE1 = 0) AVFLT = 0x3 (Elliptical tuned for fS = 8kHz + 217Hz 0.0279 notch) x fS AVFLT = 0x4 (500Hz Butterworth tuned for fS = 8kHz) AVFLT = 0x5 (fS/240 Butterworth) 0.0312 x fS 0.0018 x fS 90 0.43 x fS 0.48 x fS 0.5 x fS -0.1 +0.1 0.58 x fS f < fSLP 60 DC Attenuation DCATTEN AVFLT ≠ 000 Ripple limit cutoff dB STEREO AUDIO MODE FIR LOWPASS FILTER (MODE1 = 1, DHF1 = 0, LRCLK < 50kHz) Passband Cutoff Passband Ripple Stopband Cutoff Stopband Attenuation (Note 6) fSLP fPLP -3dB cutoff -6.02dB cutoff f < fPLP Hz dB Hz dB ADC STEREO AUDIO MODE FIR LOWPASS FILTER (MODE1 = 1, DHF1 = 1, LRCLK > 50kHz) Passband Cutoff Passband Ripple Stopband Cutoff Stopband Attenuation fSLP f < fSLP 60 fPLP Ripple limit cutoff -3dB cutoff f < fPLP 0.208 x fS 0.28 x fS -0.1 +0.1 0.417 x fS Hz dB Hz dB ���������������������������������������������������������������� Maxim Integrated Products 10 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER Passband Cutoff (-3dB from Peak) DC Attenuation SYMBOL CONDITIONS MIN TYP MAX 0.000125 x fS 90 50 400 2 123 0.078 10 -3 1 (Note 5) ANTH = 0x3 to 0xF, referred to 0dBFS (Note 5) DVST = 0x01 DVST = 0x1F 0 -64 0 -0.5 -60.5 2 1kHz, 0dB input, highpass filter disabled 8kHz 16kHz 2.2 1.1 20 -16 12 +18 UNITS STEREO AUDIO MODE DC BLOCKING HIGHPASS FILTER (MODE1 = 1) fAHPPB DCAtten AVFLT ≠ 000 AVFLT ≠ 000 AGCHLD = 01 AGCHLD = 11 AGCATK = 00 AGCATK = 11 AGCRLS = 000 AGCRLS = 111 AGCTH = 0x0 to 0xF Hz dB MICROPHONE AUTOMATIC GAIN CONTROL AGC Hold Duration AGC Attack Time AGC Release Time AGC Threshold Level AGC Threshold Step Size AGC Gain ADC NOISE GATE NG Threshold Level NG Attenuation dB dB ms ms s dB dB dB ADC-TO-DAC DIGITAL SIDETONE (MODE = 0) Sidetone Gain Adjust Range Sidetone Gain Adjust Step Size Sidetone Path Phase Delay AVSTGA dB dB ms ADC-TO-DAC DIGITAL LOOP-THROUGH PATH Dynamic Range (Note 4) Total Harmonic Distortion + Noise DAC LEVEL CONTROL DAC Attenuation Range DAC Attenuation Step Size DAC Gain Adjust Range DAC Gain Adjust Step Size AVDACGAIN DV1G = 00 to 11 (Note 5) 0 6 AVDACATTN DV_ = 0xF to 0x0 (Note 5) -15 1 18 0 dB dB dB dB DR THD+N fS = 48kHz, MCLK = 12.288MHz, MODE = 1 (FIR audio), MIC to HP output, TA = +25NC f = 1kHz, fS = 48kHz, MCLK = 12.288MHz, MODE = 1 (FIR audio), MIC to HP output 83 93 81 dB dB ���������������������������������������������������������������� Maxim Integrated Products 11 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER DAC DIGITAL FILTERS VOICE MODE IIR LOWPASS FILTER (MODE1 = 0) Passband Cutoff Passband Ripple Stopband Cutoff Stopband Attenuation (Note 6) fSLP f > fSLP 75 fPLP Ripple limit cutoff -3dB cutoff f < fPLP 0.448 x fS 0.451 x fS -0.1 +0.1 0.476 x fS Hz dB Hz dB SYMBOL CONDITIONS MIN TYP MAX UNITS VOICE MODE IIR HIGHPASS FILTER (MODE1 = 0) DVFLT = 0x1 (Elliptical tuned for fS = 16kHz + 217Hz notch) DVFLT = 0x2 (500Hz Butterworth tuned for fS = 16kHz) Passband Cutoff (-3dB from Peak) fDHPPB DVFLT = 0x3 (Elliptical tuned for fS = 8kHz + 217Hz notch) DVFLT = 0x4 (500Hz Butterworth tuned for fS = 8kHz) DVFLT = 0x5 (fs/240 Butterworth) DVFLT = 0x1 (Elliptical tuned for fS = 16kHz + 217Hz notch) DVFLT = 0x2 (500Hz Butterworth tuned for fS = 16kHz) fDHPSB 0.0139 x fS 0.0156 x fS Hz 0.0161 x fS 0.0312 x fS 0.0321 x fS 0.0625 x fS 0.0042 x fS Hz Stopband Cutoff (-30dB from Peak) DVFLT = 0x3 (Elliptical tuned for fS = 8kHz + 217Hz 0.0279 x fS notch) DVFLT = 0x4 (500Hz Butterworth tuned for fS = 8kHz) DVFLT = 0x5 (fS/240 Butterworth) 0.0312 x fS 0.0021 x fS 85 0.43 x fS 0.47 x fS 0.5 x fS -0.1 +0.1 0.58 x fS f > fSLP 60 DC Attenuation DCATTEN DVFLT ≠ 000 Ripple limit cutoff dB STEREO AUDIO MODE FIR LOWPASS FILTER (MODE1 = 1, DHF1/DHF2 = 0, LRCLK < 50kHz) Passband Cutoff Passband Ripple Stopband Cutoff Stopband Attenuation (Note 6) fSLP fPLP -3dB cutoff -6.02dB cutoff f < fPLP Hz dB Hz dB ���������������������������������������������������������������� Maxim Integrated Products 12 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER SYMBOL Ripple limit cutoff -3dB cutoff f < fPLP fSLP f < fSLP 60 CONDITIONS MIN 0.24 x fS 0.31 x fS -0.1 +0.1 0.477 x fS TYP MAX UNITS STEREO AUDIO MODE FIR LOWPASS FILTER (MODE1 = 1, DHF1/DHF2 = 1 for LRCLK > 50kHz) Passband Cutoff Passband Ripple Stopband Cutoff Stopband Attenuation (Note 6) Passband Cutoff (-3dB from Peak) DC Attenuation Dual Band Lowpass Corner Frequency Dual Band Highpass Corner Frequency Gain Range Low-Signal Threshold Release Time PARAMETRIC EQUALIZER Number of Bands Per Band Gain Range Preattenuator Gain Range Preattenuator Step Size DAC TO RECEIVER AMPLIFIER PATH Dynamic Range Total Harmonic Distortion + Noise DR THD+N fS = 48kHz, f = 1kHz (Note 4) f = 1kHz, POUT = 15mW, RREC = 32I VSPKLVDD = 2.8V to 5.5V, TA = +25NC Power-Supply Rejection Ratio PSRR f = 217Hz, VRIPPLE = 200mVP-P f = 1kHz, VRIPPLE = 200mVP-P f = 10kHz, VRIPPLE = 200mVP-P Click-and-Pop Level KCP Peak voltage, A-weighted, 32 samples per second, AVREC = 0dB Into shutdown Out of shutdown 64 96 -70 75 80 80 77 -68 -72 dBV dB -63 dB dB (Note 5) -12 -15 1 5 +12 0 Bands dB dB dB ALCTH = 111 to 001 ALCRLS = 101 ALCRLS = 000 AUTOMATIC LEVEL CONTROL ALCMB = 1 ALCMB = 1 0 -48 0.25 8 5 5 12 -12 kHz kHz dB dBFS s fPLP Hz dB Hz dB STEREO AUDIO MODE DC BLOCKING HIGHPASS FILTER fDHPPB DCATTEN DVFLT ≠ 000 (DAI1), DCB2 = 1 (DAI2) DVFLT ≠ 000 (DAI1), DCB2 = 1 (DAI2) 90 0.000104 x fS Hz dB ���������������������������������������������������������������� Maxim Integrated Products 13 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER Dynamic Range (Note 4) Total Harmonic Distortion + Noise Click-and-Pop Level RECEIVER AMPLIFIER Output Power Full-Scale Output Volume Control (Note 5) AVREC POUT RREC = 32I, f = 1kHz, THD = 1% (Note 7) RECVOL = 0x00 RECVOL = 0x1F +8dB to +6dB +6dB to +0dB Volume Control Step Size 0dB to -14dB -14dB to -38dB -38dB to -62dB Mute Attenuation Capacitive Drive Capability DAC TO LINE OUT AMPLIFIER PATH Dynamic Range (Note 4) Total Harmonic Distortion + Noise Dynamic Range (Note 4) Total Harmonic Distortion + Noise Full-Scale Output Mute Attenuation Output Offset Voltage Capacitive Drive Capability VOS DR THD+N fS = 48kHz, f = 1kHz f = 1kHz, RL = 1kI 83 96 -78 -72 dB dB f = 1kHz No sustained oscillations RREC = 32I RREC = J 92 1 -62 8 0.5 1 2 3 4 88 500 100 dB pF dB mW VRMS dB SYMBOL DR THD+N KCP Peak voltage, A-weighted, 32 samples per second, AVREC = 0dB Into shutdown Out of shutdown CONDITIONS Referenced to full-scale output level MIN TYP 94 -64 -51 -49 MAX UNITS dB dB dBV LINE INPUT TO RECEIVER AMPLIFIER PATH LINE INPUT TO LINE OUT AMPLIFIER PATH DR THD+N Referenced to full-scale output level f = 1kHz, RL = 10kI (Note 7) f = 1kHz AVREC_ = -62dB No sustained oscillations, RL = 1kI 92 76 2 85 Q0.5 500 Q4 dB dB VP-P dB mV pF ���������������������������������������������������������������� Maxim Integrated Products 14 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER Total Harmonic Distortion + Noise Crosstalk Output Noise Click-and-Pop Level KCP Peak voltage, A-weighted, 32 samples per second, AVSPK_ = 0dB Into shutdown Out of shutdown SYMBOL CONDITIONS MIN TYP MAX UNITS DAC TO SPEAKER AMPLIFIER PATH THD+N f = 1kHz, POUT = 200mW, ZSPK = 8I + 68FH SPKL to SPKR and SPKR to SPKL, POUT = 640mW, f = 1kHz -68 -88 53 65 66 82 71 55 52 2950 2060 1570 1000 2320 1620 1240 785 1730 1210 930 600 1365 955 735 475 2 SPVOLL/SPVOLR = 0x00 SPVOLL/SPVOLR = 0x1F -62 +8 VRMS dB mW dB dB FVRMS dBV MIC INPUT TO SPEAKER AMPLIFIER PATH Dynamic Range (Note 4) Total Harmonic Distortion + Noise Click-and-Pop Level SPEAKER AMPLIFIER f = 1kHz, THD = 10%, ZSPK = 4I + 33FH f = 1kHz, THD = 1%, ZSPK = 4I + 33FH f = 1kHz, THD = 10%, ZSPK = 8I + 68FH f = 1kHz, THD = 1%, ZSPK = 8I + 68FH Full-Scale Output Volume Control AVSPK_ (Note 7) (Note 5) VSPKLVDD = VSPKRVDD = 5.0V VSPKLVDD = VSPKRVDD = 4.2V VSPKLVDD = VSPKRVDD = 3.7V VSPKLVDD = VSPKRVDD = 3.0V VSPKLVDD = VSPKRVDD = 5.0V VSPKLVDD = VSPKRVDD = 4.2V VSPKLVDD = VSPKRVDD = 3.7V VSPKLVDD = VSPKRVDD = 3.0V VSPKLVDD = VSPKRVDD = 5.0V VSPKLVDD = VSPKRVDD = 4.2V VSPKLVDD = VSPKRVDD = 3.7V VSPKLVDD = VSPKRVDD = 3.0V VSPKLVDD = VSPKRVDD = 5.0V VSPKLVDD = VSPKRVDD = 4.2V VSPKLVDD = VSPKRVDD = 3.7V VSPKLVDD = VSPKRVDD = 3.0V DR THD+N KCP Referenced to full-scale output level, AVSPK_ = 0dB f = 1kHz, POUT = 200mW, RL = 8I + 68FH Peak voltage, A-weighted, 32 samples per second, AVSPK_ = 0dB Into shutdown Out of shutdown dB dB dBV Output Power POUT ���������������������������������������������������������������� Maxim Integrated Products 15 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER SYMBOL +8dB to +6dB +6dB to +0dB Volume Control Step Size 0dB to -14dB -14dB to -38dB -38dB to -64dB Mute Attenuation Output Offset Voltage EXCURSION LIMITER Upper Corner Frequency Range Lower Corner Frequency DHPUCF = 001 to 100 DHPLCF = 01 to 10 DHPUCF = 000 (fixed mode) Biquad Minimum Corner Frequency DHPUCF = 001 DHPUCF = 010 DHPUCF = 011 DHPUCF = 100 Threshold Voltage Release Time POWER LIMITER Attenuation Threshold Time Constant 1 Time Constant 2 Weighting Factor DISTORTION LIMITER Distortion Limit Release Time Constant THDCLP = 0x1 THDCLP = 0xF THDT1 = 000 THDT1 = 111 VPVDD x 0.2V, RHP = J VOUT ≤ VPVDD x 0.2V, RHP = J VOUT > VPVDD x 0.2V, RHP = J RHP = 32I RHP = 16I 30 38 PVDD/2 PVDD -PVDD/2 -PVDD mW V V SYMBOL CONDITIONS MIN TYP MAX UNITS VTH RL = J QPVDD x 0.2 V (Note 7) (Note 5) +3dB to +1dB +1dB to -5dB HPVOL_ = 0x00 HPVOL_ = 0x1F 1 -67 +3 0.5 1 2 3 4 100 TA = +25NC TA = TMIN to TMAX RHP = 32I RHP = J 500 100 Q0.1 Q1 Q3 VRMS dB Volume Control Step Size -5dB to -19dB -19dB to -43dB -43dB to -67dB dB Mute Attenuation Output Offset Voltage Capacitive Drive Capability SPEAKER BYPASS SWITCH On-Resistance Total Harmonic Distortion + Noise Off-Isolation Off-Leakage Current RON THD+N VOS f = 1kHz AVHP_ = -67dB No sustained oscillations dB mV pF ISPKL_ = 100mA, SPKBYP = 1, VRXIN_ = [0V, VSPKLVDD] VIN = 2VP-P, VCM = VSPKLVDD/2, RS = 10I ZSPK = 8I + 68FH, f = 1kHz, RS = 0I SPKBYP = 1 VIN = 2VP-P, VCM = VSPKLVDD/2, ZSPK = 8I + 68FH, f = 1kHz VRXIN_ = [0V, VSPKLVDD], VSPKL_ = [VSPKLVDD, 0V] -20 2.8 60 60 96 +20 I dB dB FA ���������������������������������������������������������������� Maxim Integrated Products 18 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 0. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) (Note 1) PARAMETER RECEIVER BYPASS SWITCH On-Resistance Total Harmonic Distortion + Noise Off-Isolation Off-Leakage Current JACK DETECTION MICBIAS enabled JACKSNS High Threshold VTH1 MICBIAS disabled MICBIAS enabled JACKSNS Low Threshold VTH2 MICBIAS disabled JACKSNS Sense Voltage JACKSNS Sense Resistance JACKSNS Weak Pullup Current JACKSNS Deglitch Period BATTERY ADC Input Voltage Range LSB Size 2.6 0.1 5.6 V V RSENSE IWPU tGLITCH MICBIAS disabled, JDWK = 1 MICBIAS disabled, JDWK = 0 MICBIAS disabled, JDWK = 1 JDEB = 00 JDEB = 11 0.92 x 0.95 x 0.98 x VMICBIAS VMICBIAS VMICBIAS 0.92 x 0.95 x 0.98 x VSPKLVDD VSPKLVDD VSPKLVDD 0.06 x 0.10 x 0.17 x VMICBIAS VMICBIAS VMICBIAS 0.06 x 0.10 x 0.17 x VSPKLVDD VSPKLVDD VSPKLVDD 3.65 1.6 2 3.7 2.4 5 25 200 2.9 9.5 kI FA ms RON THD+N IRECP = 100mA, RECBYP = 1, VRECN = [0V, VSPKLVDD] VIN = 2VP-P, VCM = VSPKLVDD/2, ZSPK = 8I + 68FH, f = 1kHz, RECBYP = 1, RS = 0I VIN = 2VP-P, VCM = VSPKLVDD/2, ZSPK = 8I + 68FH, f = 1kHz VRECP = [0V, VSPKLVDD], VRECN = [VSPKLVDD, 0V] -15 2 60 84 +15 I % dB FA SYMBOL CONDITIONS MIN TYP MAX UNITS V V DIGITAL INPUT/OUTPUT CHARACTERISTICS (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) PARAMETER MCLK Input High Voltage Input Low Voltage Input Leakage Current Input Capacitance VIH VIL IIH, IIL VDVDD = 2.0V, VIN = 0V, 5.5V; TA = +25°C -1 10 1.2 0.6 +1 V V FA pF SYMBOL CONDITIONS MIN TYP MAX UNITS ���������������������������������������������������������������� Maxim Integrated Products 19 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology DIGITAL INPUT/OUTPUT CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN 0.7 x DVDDS1 0.29 x DVDDS1 200 IIH, IIL VDVDDS1 = 3.6V, VIN = 0V, 3.6V; TA = +25°C -1 10 VOL VOH IIH, IIL VDVDDS1 = 1.65V, IOL = 3mA VDVDDS1 = 1.65V, IOH = 3mA VDVDD = 2.0V, VIN = 0V, 5.5V; TA = +25°C, high-impedance state DVDDS1 - 0.4 -1 +1 0.4 +1 TYP MAX UNITS SDINS1, BCLKS1, LRCLKS1—INPUT Input High Voltage Input Low Voltage Input Hysteresis Input Leakage Current Input Capacitance BCLKS1, LRCLKS1, SDOUTS1—OUTPUT Output Low Voltage Output High Voltage Input Leakage Current V V FA VIH VIL V V mV FA pF SDINS2, BCLKS2, LRCLKS2—INPUT Input High Voltage Input Low Voltage Input Hysteresis Input Leakage Current Input Capacitance BCLKS2, LRCLKS2, SDOUTS2—OUTPUT Output Low Voltage Output High Voltage Input Leakage Current SDA, SCL—INPUT Input High Voltage Input Low Voltage Input Hysteresis Input Leakage Current Input Capacitance SDA, IRQ—OUTPUT Output High Current Output Low Voltage IOH VOL VOUT = 5.5V, TA = +25°C VDVDD = 1.65V, IOL = 3mA IIH, IIL VDVDD = 2.0V, VIN = 0V, 5.5V; TA = +25NC -1 10 1 0.2 x DVDD VIH VIL 210 +1 0.7 x DVDD 0.3 x DVDD V V mV FA pF mA V VOL VOH IIH, IIL VDVDDS2 = 1.65V, IOL = 3mA VDVDDS2 = 1.65V, IOH = 3mA VDVDD = 2.0V, VIN = 0V, 5.5V; TA = +25NC, high-impedance state DVDDS2 - 0.4 -1 +1 0.4 V V FA IIH, IIL VDVDDS2 = 3.6V, VIN = 0V, 3.6V; TA = +25°C -1 10 VIH VIL 200 +1 0.7 x DVDDS2 0.29 x DVDDS2 V V mV FA pF ���������������������������������������������������������������� Maxim Integrated Products 20 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology DIGITAL INPUT/OUTPUT CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) PARAMETER DIGMICDATA—INPUT Input High Voltage Input Low Voltage Input Hysteresis Input Leakage Current Input Capacitance DIGMICCLK—OUTPUT Output Low Voltage Output High Voltage VOL VOH VDVDD = 1.65V, IOL = 1mA VDVDD = 1.65V, IOH = 1mA DVDD 0.4 0.4 V V IIH, IIL VDVDD = 2.0V, VIN = 0V, 2.0V; TA = +25°C -25 10 VIH VIL 125 +25 0.65 x DVDD 0.35 x DVDD V V mV FA pF SYMBOL CONDITIONS MIN TYP MAX UNITS INPUT CLOCK CHARACTERISTICS (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) PARAMETER MCLK Input Frequency MCLK Input Duty Cycle Maximum MCLK Input Jitter LRCLK Sample Rate (Note 8) DAI1 LRCLK Average Frequency Error (Note 9) DAI2 LRCLK Average Frequency Error (Note 9) PLL Lock Time Maximum LRCLK Jitter to Maintain PLL Lock Soft-Start/Stop Time 10 Rapid lock mode Nonrapid lock mode DHF_ = 0 DHF_ = 1 FREQ1 = 0x8 to 0xF FREQ1 = 0x0 8 48 0 -0.025 -0.025 2 12 SYMBOL fMCLK PSCLK = 01 PSCLK = 10 or 11 CONDITIONS MIN 10 40 30 100 48 96 0 +0.025 +0.025 7 25 100 50 TYP MAX 60 60 70 UNITS MHz % psRMS kHz % % ms ns ms ���������������������������������������������������������������� Maxim Integrated Products 21 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology AUDIO INTERFACE TIMING CHARACTERISTICS (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) PARAMETER BCLK Cycle Time BCLK High Time BCLK Low Time BCLK or LRCLK Rise and Fall Time SDIN to BCLK Setup Time LRCLK to BCLK Setup Time SDIN to BCLK Hold Time LRCLK to BCLK Hold Time Minimum Delay Time from LSB BCLK Falling Edge to High-Impedance State LRCLK Rising Edge to SDOUT MSB Delay BCLK to SDOUT Delay SYMBOL tBCLK tBCLKH tBCLKL tR, tF tSETUP tSYNCSET tHOLD tSYNCHOLD Slave mode tHIZOUT Master mode, TDM_ = 1 Slave mode Slave mode Slave mode Slave mode Master mode, CL = 15pF 20 20 20 20 42 CONDITIONS MIN 90 20 20 5 TYP MAX UNITS ns ns ns ns ns ns ns ns ns tSYNCTX tCLKTX CL = 30pF, TDM_ = 1, FSW_ = 1 CL = 30pF Master mode Master mode TDM_ = 1, BCLK rising edge TDM_ = 0 TDM_ = 1 TDM_ = 0 TDM_ = 1, FSW_ = 1 20 -15 50 50 50 +15 0.8 x tBCLKL ns ns Delay Time from BCLK to LRCLK Delay Time from LRCLK to BCLK After LSB tCLKSYNC ns tENDSYNC ns BCLK (OUTPUT) LRCLK (OUTPUT) tR tF tBCLK BCLK (INPUT) tSYNCSET LRCLK (INPUT) tBCLKH tBCLKL tCLKSYNC tHIZOUT SDOUT (OUTPUT) SDIN (INPUT) LSB HI-Z tCLKTX tSETUP MSB tHOLD SDOUT (OUTPUT) SDIN (INPUT) LSB tHIZOUT HI-Z tCLKTX tSETUP MSB tHOLD LSB MASTER MODE MSB LSB SLAVE MODE MSB Figure 1. Non-TDM Audio Interface Timing Diagrams (TDM_ = 0) ���������������������������������������������������������������� Maxim Integrated Products 22 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology tBCLK tF BCLK (OUTPUT) tCLKSYNC LRCLK (OUTPUT) tHIZOUT SDOUT (OUTPUT) LSB tCLKTX HI-Z MSB tSETUP tHOLD SDIN (INPUT) LSB MSB MASTER MODE SDIN (INPUT) LSB MSB SLAVE MODE tCLKSYNC tR BCLK (INPUT) tSYNCSET LRCLK (INPUT) tHIZOUT SDOUT (OUTPUT) LSB tCLKTX HI-Z MSB tSETUP tHOLD tSYNCHOLD tBCLKH tBCLKL Figure 2. TDM Audio Interface Timing Diagram (TDM_ = 1, FSW_ = 0) tBCLK tF BCLK (OUTPUT) tENDSYNC LRCLK (OUTPUT) tHIZOUT SDOUT (OUTPUT) LSB tSYNCTX HI-Z tCLKTX MSB tSETUP tHOLD SDIN (INPUT) LSB MSB MASTER MODE SDIN (INPUT) LSB MSB SLAVE MODE tCLKSYNC LRCLK (INPUT) tHIZOUT SDOUT (OUTPUT) LSB tSYNCTX HI-Z tCLKTX MSB tSETUP tHOLD tR BCLK (INPUT) tBCLKH tBCLKL Figure 3. TDM Audio Interface Timing Diagram (TDM_ = 1, FSW_ = 1) DIGITAL MICROPHONE TIMING CHARACTERSTICS (VAVDD = VHPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) PARAMETER SYMBOL MICCLK = 00 DIGMICCLK Frequency fMICCLK MICCLK = 01 MICCLK = 10 DIGMICDATA to DIGMICCLK Setup Time DIGMICDATA to DIGMICCLK Hold Time tSU,MIC tHD,MIC Either clock edge Either clock edge 20 0 CONDITIONS MIN TYP PCLK/8 PCLK/6 64 x fLRCLK ns ns MHz MAX UNITS ���������������������������������������������������������������� Maxim Integrated Products 23 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology 1/fMICCLK tHD,MIC tSU,MIC tHD,MIC tSU,MIC LEFT RIGHT LEFT RIGHT Figure 4. Digital Microphone Timing Diagram I2C TIMING CHARACTERISTICS (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) PARAMETER Serial-Clock Frequency Bus Free Time Between STOP and START Conditions Hold Time (Repeated) START Condition SCL Pulse-Width Low SCL Pulse-Width High Setup Time for a Repeated START Condition Data Hold Time Data Setup Time SDA and SCL Receiving Rise Time SDA and SCL Receiving Fall Time SDA Transmitting Fall Time Setup Time for STOP Condition Bus Capacitance Pulse Width of Suppressed Spike SYMBOL fSCL tBUF tHD,STA tLOW tHIGH tSU,STA tHD,DAT tSU,DAT tR tF tF tSU,STO CB tSP Guaranteed by SDA transmitting fall time 0 (Note 10) (Note 10) RPU = 475I, CB = 100pF, 400pF (Note 10) RPU = 475I, CB = 100pF, 400pF CONDITIONS Guaranteed by SCL pulse-width low and high MIN 0 1.3 0.6 1.3 0.6 0.6 0 100 20 + 0.1CB 20 + 0.1CB 20 + 0.05CB 0.6 400 50 300 300 250 900 TYP MAX 400 UNITS kHz Fs Fs Fs Fs Fs ns ns ns ns ns Fs pF ns ���������������������������������������������������������������� Maxim Integrated Products 24 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology I2C TIMING CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) SDA tSU,DAT tHD,DAT tHIGH tSU,STA tBUF tHD,STA tSP tSU,STO tLOW SCL tHD,STA START CONDITION tR tF REPEATED START CONDITION STOP CONDITION START CONDITION Figure 5. I2C Interface Timing Diagram Note 1: The IC is 100% production tested at TA = +25NC. Specifications over temperature limits are guaranteed by design. Note 2: Analog supply current = IAVDD + IHPVDD. Speaker supply current = ISPKLVDD + ISPKRVDD. Digital supply current = IDVDD + IDVDDS1 + IDVDDS2. Note 3: Clocking all zeros into the DAC. Note 4: Dynamic range measured using the EIAJ method. -60dBFS, 1kHz output signal, A-weighted and normalized to 0dBFS. f = 20Hz to 20kHz. Note 5: Gain measured relative to the 0dB setting. Note 6: The filter specification is accurate only for synchronous clocking modes, where NI is a multiple of 0x1000. Note 7: 0dBFS for DAC input. 1VP-P for INA/INB inputs. Note 8: LRCLK may be any rate in the indicated range. Asynchronous or noninteger MCLK/LRCLK ratios may exhibit some fullscale performance degradation compared to synchronous integer related MCLK/LRCLK ratios. Note 9: In master-mode operation, the accuracy of the MCLK input proportionally determines the accuracy of the sample clock rate. Note 10: CB is in pF. Power Consumption (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, MAS = 0.) MODE Playback to Headphone Only DAC Playback 48kHz Stereo HP DAC ª HP Low power mode, 24-bit, music filters, 256Fs DAC Playback 48kHz Stereo HP DAC ª HP Low power mode, 24-bit, music filters, 256Fs, 0.1mW/channel, RHP = 32I 1.25 0.47 0.00 1.35 0.01 5.55 97 IAVDD (mA) IPVDD (mA) ISPKVDD + ISPKLVDD (mA) IDVDD (mA) IDVDDS1 + IDVDDS2 (mA) POWER (mW) DYNAMIC RANGE (dB) 1.25 1.81 0.00 1.56 0.01 8.32 97 ���������������������������������������������������������������� Maxim Integrated Products 25 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Power Consumption (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, MAS = 0.) MODE DAC Playback to Headphone DAC Playback 48kHz Stereo HP DAC ª HP 24-bit, music filters, 256Fs DAC Playback 48kHz Stereo HP DAC ª HP 24-bit, music filters, 256Fs, 0.1mW/ channel, RHP = 32I DAC Playback 44.1kHz Stereo HP DAC ª HP 24-bit, music filters DAC Playback 44.1kHz Stereo HP DAC ª HP Low power mode, 24-bit, music filters DAC Playback 8kHz Stereo HP DAC ª HP 16-bit, voice filters DAC Playback 8kHz Stereo HP DAC ª HP 16-bit, low power mode, voice filters DAC Playback 8kHz Mono HP DAC ª HP 16-bit, low power mode, voice filters Line Playback Stereo HP INA ª HP Single-ended inputs DAC Playback to Class D Speaker DAC Playback 48kHz Stereo SPK DAC ª SPK 24-bit, music filters 2.31 0.00 6.33 2.14 0.01 31.44 92 2.04 1.27 0.00 1.53 0.01 8.72 101 IAVDD (mA) IPVDD (mA) ISPKVDD + ISPKLVDD (mA) IDVDD (mA) IDVDDS1 + IDVDDS2 (mA) POWER (mW) DYNAMIC RANGE (dB) 2.04 2.11 0.00 1.74 0.01 10.63 101 2.03 1.27 0.00 1.41 0.01 8.46 101 1.25 0.47 0.00 1.25 0.01 5.34 98 2.04 1.27 0.00 1.07 0.00 7.89 96 1.26 0.47 0.00 0.90 0.00 4.72 96 0.77 0.29 0.00 0.79 0.00 3.33 98 2.40 1.27 0.00 0.02 0.00 6.67 95 ���������������������������������������������������������������� Maxim Integrated Products 26 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Power Consumption (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, MAS = 0.) MODE DAC Playback 48kHz Mono SPK DAC ª SPK 24-bit, music filters Line Playback Mono SPK INA ª SPKL Differential inputs Full Duplex Full-Duplex 8kHz Mono RCV MIC1 ª ADC DAC ª REC 16-bit, voice filters Full-Duplex 8kHz Stereo HP MIC1/2 ª ADC DAC ª HP 16-bit, mixer, voice filters Full-Duplex 8kHz Stereo HP MIC1/2 ª ADC DAC ª HP 16-bit, low power mode, voice filters Line Record Line Stereo Record 48kHz INA ª ADC 24-bit, low power, music filters Line Stereo Record 48kHz INA ª ADC Direct pin input, 24bit, low power, music filters 6.19 0.00 0.20 1.31 0.15 14.47 91 6.32 0.00 1.54 1.24 0.01 19.33 Record = 93 Playback = 94 IAVDD (mA) 1.35 IPVDD (mA) 0.00 ISPKVDD + ISPKLVDD (mA) 3.23 IDVDD (mA) 1.84 IDVDDS1 + IDVDDS2 (mA) 0.01 POWER (mW) 17.69 DYNAMIC RANGE (dB) 92 1.01 0.00 3.24 0.03 0.00 13.83 93 11.19 1.27 0.48 1.28 0.01 26.43 Record = 93 Playback = 96 7.12 0.47 0.48 1.10 0.02 17.44 Record = 93 Playback = 96 5.69 0.00 0.20 1.31 0.12 13.53 93 ���������������������������������������������������������������� Maxim Integrated Products 27 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) Microphone to ADC TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (MIC TO ADC) MAX98089 toc01 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (MIC TO ADC) MAX98089 toc02 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (MIC TO ADC) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 -100 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 -100 10 THD+N RATIO (dB) MCLK = 13MHz LRCLK = 8kHz FREQ MODE VIN = 1VP-P AVMICPRE_ = 0dB -10 -20 -30 -40 -50 -60 -70 -80 MCLK = 13MHz LRCLK = 44.1kHz PLL MODE VIN = 1VP-P AVMICPRE_ = 0dB MCLK = 12.288MHz LRCLK = 48kHz NI MODE VIN = 1VP-P AVMICPRE_ = 0dB 100 1k 10k -90 10 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) 10k 100k FREQUENCY (Hz) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (MIC TO ADC) MAX98089 toc04 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (MIC TO ADC) MAX98089 toc05 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (MIC TO ADC) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 -100 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 -100 10 THD+N RATIO (dB) MCLK = 12.288MHz LRCLK = 96kHz NI MODE VIN = 1VP-P AVMICPRE_ = 0dB -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 MCLK = 13MHz LRCLK = 8kHz FREQ MODE VIN = 0.1VP-P AVMICPRE_ = +20dB MCLK = 13MHz LRCLK = 8kHz FREQ MODE VIN = 0.032VP-P AVMICPRE_ = +30dB 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k 10k 10 100 1k 10k FREQUENCY (Hz) FREQUENCY (Hz) ���������������������������������������������������������������� Maxim Integrated Products 28 MAX98089 toc06 0 0 0 MAX98089 toc03 0 0 0 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) GAIN vs. FREQUENCY (MIC TO ADC) MAX98089 toc07 COMMON-MODE REJECTION RATIO vs. FREQUENCY (MIC TO ADC) MAX98089 toc08 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (MIC TO ADC) RIPPLE ON SPKLVDD, SPKRVDD MAX98089 toc09 10 0 -10 NORMALIZED GAIN (dB) -20 -30 -40 -50 -60 -70 -80 -90 10 100 1k 90 80 70 60 CMRR (dB) 50 40 30 20 10 AVPRE = 20dB 120 100 80 PSRR (dB) 60 40 20 0 MODE = 1 AVPRE = 30dB RIPPLE ON AVDD, DVDD, HPVDD MODE = 0 MCLK = 13MHz LRCLK = 8kHz FREQ MODE VIN = 1VP-P AVMICPRE_ = 0dB 10k AVPRE = 0dB MCLK = 13MHz LRCLK = 8kHz FREQ MODE VIN = 1VP-P CIN = 1µF 10 100 1k 10k FREQUENCY (Hz) 0 MCLK = 12.288MHz LRCLK = 48kHz NI MODE AVMICPRE = 0dB CIN = 1µF VRIPPLE = 200mVP-P 10 100 1k FREQUENCY (Hz) 10k 100k FREQUENCY (Hz) FFT, 0dBFS (MIC TO ADC) MAX98089 toc10 FFT, -60dBFS (MIC TO ADC) -20 -40 AMPLITUDE (dBFS) -60 -80 -100 -120 -140 -160 -180 FFT, 0dBFS (MIC TO ADC) MAX98089 toc11 0 -20 AMPLITUDE (dBFS) -40 -60 -80 -100 -120 -140 -160 -180 0 1 2 AMPLITUDE (dBFS) MCLK = 13MHz LRCLK = 8kHz FREQ MODE AVMICPRE = 0dB MCLK = 13MHz LRCLK = 8kHz FREQ MODE AVMICPRE_ = 0dB 0 -20 -40 -60 -80 -100 -120 -140 MCLK = 13MHz LRCLK = 44.1kHz PLL MODE AVMICPRE_ = 0dB CIN = 1µF 3 4 0 500 1k 1.5k 2k 2.5k 3k 3.5k 4k 0 5 10 FREQUENCY (kHz) 15 20 FREQUENCY (kHz) FREQUENCY (Hz) ���������������������������������������������������������������� Maxim Integrated Products 29 MAX98089 toc12 20 0 20 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) FFT, -60dBFS (MIC TO ADC) MAX98089 toc13 FFT, 0dBFS (MIC TO ADC) 0 -20 AMPLITUDE (dBFS) -40 -60 -80 -100 -120 -140 -20 AMPLITUDE (dBFS) -40 -60 -80 -100 -120 -140 0 5 10 MCLK = 13MHz LRCLK = 44.1kHz PLL MODE AVMICPRE = 0dB MCLK = 12.288MHz LRCLK = 48kHz NI MODE AVMICPRE = 0dB CIN = 1µF 15 20 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (kHz) FREQUENCY (kHz) FFT, -60dBFS (MIC TO ADC) MAX98089 toc15 FFT, 0dBFS (MIC TO ADC) 0 -20 AMPLITUDE (dBFS) -40 -60 -80 -100 -120 -140 -20 AMPLITUDE (dBFS) -40 -60 -80 -100 -120 -140 0 5 10 MCLK = 12.288MHz LRCLK = 48kHz NI MODE AVMICPRE_ = 0dB MCLK = 12.288MHz LRCLK = 96kHz NI MODE AVMICPRE = 0dB CIN = 1µF 15 20 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (kHz) FREQUENCY (kHz) ���������������������������������������������������������������� Maxim Integrated Products 30 MAX98089 toc16 0 20 MAX98089 toc14 0 20 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) FFT, -60dBFS (MIC TO ADC) -20 AMPLITUDE (dBFS) -40 -60 -80 -100 -120 -140 0 5 10 FREQUENCY (kHz) 15 20 ADC ENABLE /DISABLE RESPONSE (MIC TO ADC) MAX98089 toc18 MAX98089 toc17 0 MCLK = 12.288MHz LRCLK = 96kHz NI MODE AVMICPRE_ = 0dB SCL 2V/div ADC OUTPUT 0.5V/div 10ms/div SOFTWARE TURN-ON /OFF RESPONSE (MIC TO ADC) MAX98089 toc19 SCL 1V/div ADC OUTPUT 0.5V/div 10ms/div ���������������������������������������������������������������� Maxim Integrated Products 31 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) Line to ADC TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE TO ADC) MAX98089 toc20 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE TO ADC) MAX98089 toc21 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE TO ADC) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 MCLK = 12.288MHz LRCLK = 48kHz NI MODE VIN = 0.1VP-P AVPGAIN_ = +20dB MAX98089 toc22 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 -100 10 100 1k FREQUENCY (Hz) 10k 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 -100 0 MCLK = 12.288MHz LRCLK = 48kHz NI MODE VIN = 1.4VP-P AVPGAIN_ = -6dB CIN = 1µF MCLK = 12.288MHz LRCLK = 48kHz NI MODE VIN = 1VP-P AVPGAIN_ = 0dB CIN = 1µF 100k 10 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) 10k 100k TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE-IN TO ADC) -10 -20 -30 THD+N (dB) -40 -50 -60 -70 -80 -90 -100 10 100 1k FREQUENCY (Hz) 10k 100k 0 10 MCLK = 12.288MHz LRCLK = 48kHz VIN = 1VRMS EXTERNAL GAIN MODE REXT = 56kI MAX98089 toc23 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (LINE TO ADC) VRIPPLE = 200mVP-P 100 80 PSRR (dB) 60 40 20 MAX98089 toc24 0 120 RIPPLE ON SPKLVDD, SPKRVDD RIPPLE ON AVDD, DVDD, HPVDD 100 1k FREQUENCY (Hz) 10k 100k ���������������������������������������������������������������� Maxim Integrated Products 32 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) Line-In Pin Direct to ADC TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE TO ADC PIN DIRECT) MAX98089 toc25 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (LINE TO ADC PIN DIRECT) VRIPPLE = 200mVP-P 100 80 PSRR (dB) 60 40 20 0 MAX98089 toc26 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 10 100 1k FREQUENCY (Hz) 10k 120 MCLK = 12.288MHz LRCLK = 48kHz NI MODE VIN = 1VP-P AVPGAIN_ = 0dB CIN = 1µF RIPPLE ON SPKLVDD, SPKRVDD RIPPLE ON AVDD, DVDD, HPVDD 100k 10 100 1k FREQUENCY (Hz) 10k 100k Digital Loopback FFT, 0dBFS (SDINS1 TO SDINS2 DIGITAL LOOPBACK) MAX98089 toc27 FFT, -60dBFS (SDINS1 TO SDINS2 DIGITAL LOOPBACK) -20 -40 AMPLITUDE (dBFS) -60 -80 -100 -120 -140 -160 -180 MCLK = 12.288MHz LRCLK = 48kHz NI MODE MAX98089 toc28 0 -20 -40 AMPLITUDE (dBFS) -60 -80 -100 -120 -140 -160 -180 0 5 10 MCLK = 12.288MHz LRCLK = 48kHz NI MODE 0 15 20 0 5 10 FREQUENCY (kHz) 15 20 FREQUENCY (kHz) ���������������������������������������������������������������� Maxim Integrated Products 33 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) Analog Loopback TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE TO ADC TO DAC TO HEADPHONE) MAX98089 toc29 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE TO ADC TO DAC TO HEADPHONE) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 FFT, 0dBFS (LINE TO ADC TO DAC TO HEADPHONE) MAX98089 toc30 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 10 AMPLITUDE (dBV) MCLK = 13MHz LRCLK = 44.1kHz PLL MODE RHP = 32I CIN = 10µF MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 32I CIN = 10µF 0 -20 -40 -60 -80 -100 -120 MCLK = 13MHz LRCLK = 44.1kHz PLL MODE RHP = 32I CIN = 1µF POUT = 0.02W POUT = 0.01W POUT = 0.02W POUT = 0.01W 100 1k FREQUENCY (Hz) 10k 100k -90 10 100 1k FREQUENCY (Hz) 10k 100k 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (kHz) FFT, -60dBFS (LINE TO ADC TO DAC TO HEADPHONE) MAX98089 toc32 FFT, 0dBFS (LINE TO ADC TO DAC TO HEADPHONE) MAX98089 toc33 FFT, -60dBFS (LINE TO ADC TO DAC TO HEADPHONE) -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 0 5 10 AMPLITUDE (dBV) MCLK = 13MHz LRCLK = 44.1kHz PLL MODE RHP = 32I CIN = 1µF 0 -20 -40 -60 -80 -100 -120 -140 MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 32I CIN = 1µF MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 32I CIN = 1µF 15 20 0 5 10 FREQUENCY (kHz) 15 20 0 5 10 FREQUENCY (kHz) 15 20 FREQUENCY (kHz) ���������������������������������������������������������������� Maxim Integrated Products 34 MAX98089 toc34 0 20 0 MAX98089 toc31 0 0 20 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) DAC to Receiver TOTAL HARMONIC DISTORTION vs. OUTPUT POWER (DAC TO RECEIVER) MAX98089 toc35 TOTAL HARMONIC DISTORTION vs. FREQUENCY (DAC TO RECEIVER) OUTPUT POWER PER CHANNEL (mW) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 POUT = 0.025W MCLK = 13MHz LRCLK = 8kHz FREQ MODE RREC = 32I AVREC = +8dB MAX98089 toc36 OUTPUT POWER vs. SUPPLY VOLTAGE (DAC TO RECEIVER) 180 160 140 120 100 80 60 MAX98089 toc37 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 0 0.02 0.04 0.06 OUTPUT POWER (W) f = 100Hz 0.08 0.10 f = 1000Hz f = 3000Hz MCLK = 13MHz LRCLK = 8kHz FREQ MODE RREC = 32I AVREC = +8dB 0 200 THD+N = 10% MCLK = 13MHz LRCLK = 8kHz FREQ MODE RREC = 32I AVREC = +8dB THD+N = 1% -80 0.12 -90 10 100 POUT = 0.05W 1k 10k 2.5 3.0 3.5 4.0 4.5 5.0 5.5 FREQUENCY (Hz) SUPPLY VOLTAGE (V) GAIN vs. FREQUENCY (DAC TO RECEIVER) MAX98089 toc38 POWER CONSUMPTION vs. OUTPUT POWER (DAC TO RECEIVER) MAX98089 toc39 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (DAC TO RECEIVER) VRIPPLE = 200mVP-P 100 80 PSRR (dB) 60 40 RIPPLE ON AVDD, DVDD, HPVDD RIPPLE ON SPKLVDD, SPKRVDD MAX98089 toc40 5 4 3 NORMALIZED GAIN (dB) 2 1 0 -1 -2 -3 -4 -5 10 100 1k 250 200 150 100 50 0 POWER CONSUMPTION (mW) MCLK = 13MHz LRCLK = 8kHz FREQ MODE RREC = 32I MCLK = 13MHz LRCLK = 8kHz FREQ MODE AVREC = +8dB RREC = 32I 120 20 0 10 100 1k FREQUENCY (Hz) 10k 100k 10k 0 20 40 60 80 100 120 140 FREQUENCY (Hz) OUTPUT POWER PER CHANNEL (mW) ���������������������������������������������������������������� Maxim Integrated Products 35 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) SOFTWARE TURN-ON/OFF RESPONSE (DAC TO RECEIVER, VSEN = 0) MAX98089 toc41 SOFTWARE TURN-ON/OFF RESPONSE (DAC TO RECEIVER, VSEN = 1) MAX98089 toc42 SCL 2V/div SCL 1V/div RECEIVER OUTPUT 0.5V/div RECEIVER OUTPUT 1V/div 10ms/div 10ms/div FFT, 0dBFS (DAC TO RECEIVER) MAX98089 toc43 FFT, -60dBFS (DAC TO RECEIVER) -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 0 -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 0 5 10 MCLK = 13MHz LRCLK = 8kHz FREQ MODE RREC = 32I MCLK = 13MHz LRCLK = 8kHz FREQ MODE RREC = 32I 15 20 0 5 10 FREQUENCY (kHz) 15 20 FREQUENCY (kHz) ���������������������������������������������������������������� Maxim Integrated Products 36 MAX98089 toc44 20 0 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) Line to Receiver TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (LINE TO RECEIVER) MAX98089 toc45 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE TO RECEIVER) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 POUT = 0.05W 10 100 1k FREQUENCY (Hz) 10k 100k POUT = 0.025W RREC = 32I AVREC = +8dB CIN = 1µF MAX98089 toc46 0 -10 THD+N RATIO (dB) -20 -30 -40 -50 -60 -70 0 0.02 0.04 0.06 0.08 f = 100Hz f = 1000Hz f = 6000Hz RREC = 32I AVREC = +8dB CIN = 1µF 0 0.10 OUTPUT POWER (W) GAIN vs. FREQUENCY (LINE TO RECEIVER) MAX98089 toc47 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (LINE TO RECEIVER) VRIPPLE = 200mVP-P 100 RIPPLE ON SPKLVDD, SPKRVDD 80 PSRR (dB) 60 40 20 0 10 100 1k FREQUENCY (Hz) 10k 100k RIPPLE ON AVDD, DVDD, HPVDD MAX98089 toc48 5 4 3 NORMALIZED GAIN (dB) 2 1 0 -1 -2 -3 -4 -5 10 100 1k FREQUENCY (Hz) 10k RREC = 32I CIN = 1µF 120 100k ���������������������������������������������������������������� Maxim Integrated Products 37 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) DAC-to-Line Output INBAND OUTPUT SPECTRUM, 0dBFS (DAC TO LINE) MAX98089 toc49 INBAND OUTPUT SPECTRUM, -60dBFS (DAC TO LINE) -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 MCLK = 13MHz LRCLK = 8kHz FREQ MODE RLINE = 10kI MAX98089 toc50 20 0 -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 0 5 10 FREQUENCY (kHz) 15 MCLK = 13MHz LRCLK = 8kHz FREQ MODE RLOAD = 10kI 0 20 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (kHz) Line-to-Line Output TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT LEVEL (LINE-IN TO LINE-OUT) MAX98089 toc51 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE IN TO LINE OUT) MAX98089 toc52 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE-IN TO LINE-OUT) -10 -20 -30 THD+N (dB) -40 -50 -60 -70 -80 -90 VIN = 1VRMS RLINE = 10kI EXTERNAL GAIN MODE REXT = 56kI MAX98089 toc53 0 -10 -20 -30 THD+N (dB) -40 -50 -60 -70 -80 -90 0 RLOAD = 10kI 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 VOUT = 0.8VRMS RLINE = 10kI 0 f = 6kHz f = 1kHz 0.2 0.4 0.6 f = 100Hz 0.8 1.0 1.2 1.4 -80 -90 10 VOUT = 0.2VRMS 100 1k FREQUENCY (Hz) 10k 100k -100 10 100 1k FREQUENCY (Hz) 10k 100k OUTPUT LEVEL (VRMS) ���������������������������������������������������������������� Maxim Integrated Products 38 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) DAC to Speaker TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER) MAX98089 toc54 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 VSPK_VDD = 3.7V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSP_ = 8I + 68µH AVSPK_ = +8dB f = 6000Hz f = 1000Hz MAX98089 toc55 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 0 VSPK_VDD = 4.2V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 8I + 68µH AVSPK_ = +8dB f = 6000Hz f = 1000Hz 0 f = 100Hz 0.2 0.4 0.6 0.8 1.0 1.2 1.4 -80 -90 0 0.2 f = 100Hz 0.4 0.6 0.8 1.0 OUTPUT POWER (W) OUTPUT POWER (W) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 0 0.1 f = 100Hz 0.2 0.3 0.4 0.5 0.6 0.7 0.8 OUTPUT POWER (W) VSPK_VDD = 3.0V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK = 8I + 33µH AVSPK = +8dB f = 6000Hz f = 1000Hz MAX98089 toc56 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER) MAX98089 toc57a TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 f = 1000Hz 1.0 1.5 2.0 2.5 3.0 3.5 VSPK_VDD = 5.0V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 4I + 33µH AVSPK_VOL = +8dB f = 6000Hz WLP PACKAGE MAX98089 toc57b 0 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 0 VSPK_VDD = 5.0V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 4I + 33µH AVSPK_VOL = +8dB TQFN PACKAGE 0 f = 6000Hz f = 100Hz f = 1000Hz 1.0 1.5 2.0 2.5 3.0 3.5 -80 -90 0 f = 100Hz 0.5 0.5 OUTPUT POWER (W) OUTPUT POWER (W) ���������������������������������������������������������������� Maxim Integrated Products 39 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER) MAX98089 toc58 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER) MAX98089 toc59 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO SPEAKER) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 f = 1000Hz f = 100Hz 0 0.2 0.4 0.6 0.8 1.0 1.2 VSPK_VDD = 3.0V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSP_ = 4I + 33µH AVSPK_ = +8dB f = 6000Hz MAX98089 toc60 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 0 0.5 1.0 1.5 2.0 f = 100Hz f = 1000Hz f = 6000Hz VSPK_VDD = 4.2V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 4I + 33µH AVSPK_VOL = +8dB 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 f = 100Hz 0 f = 1000Hz f = 6000Hz VSPK_VDD = 3.7V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 4I + 33µH AVSPK_VOL = +8dB 0 -80 -90 2.5 -90 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 OUTPUT POWER (W) OUTPUT POWER (W) OUTPUT POWER (W) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO SPEAKER) MAX98089 toc61 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO SPEAKER) MAX98089 toc62 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO SPEAKER) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 VSPK_VDD = 4.2V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 4I + 33µH AVSPK_ = +8dB POUT = 0.55W MAX98089 toc63 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 THD+N RATIO (dB) VSPK_VDD = 4.2V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSP_ = 8I + 68µH AVSPK_ = +8dB 0 -10 -20 -30 -40 -50 -60 -70 VSPK_VDD = 3.7V MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 8I + 68µH AVSPK_ = +8dB 0 POUT = 0.25W POUT = 0.55W POUT = 0.55W 100 1k 10k 100k -80 -90 100 POUT = 0.25W 1k 10k 100k -70 -80 100 1k POUT = 0.25W 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz) ���������������������������������������������������������������� Maxim Integrated Products 40 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO SPEAKER) MAX98089 toc64 OUTPUT POWER vs. SUPPLY VOLTAGE (DAC TO SPEAKER) OUTPUT POWER PER CHANNEL (mW) MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 8I + 68µH AVSPK_ = +8dB TQFN PACKAGE THD+N = 10% 1000 500 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) THD+N = 1% MAX98089 toc65a 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 10 MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 4I + 33µH AVSPK_ = +8dB 2500 2000 1500 POUT = 0.25W POUT = 0.55W 100 1k FREQUENCY (Hz) 10k 100k OUTPUT POWER vs. SUPPLY VOLTAGE (DAC TO SPEAKER) MAX98089 toc65b OUTPUT POWER vs. SUPPLY VOLTAGE (DAC TO SPEAKER) MAX98089 toc66 OUTPUT POWER PER CHANNEL (mW) OUTPUT POWER PER CHANNEL (mW) OUTPUT POWER PER CHANNEL (mW) 2000 1500 1000 MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 8I + 68µH AVSPK_ = +8dB WLP PACKAGE THD+N = 10% 3500 3000 2500 2000 1500 1000 500 0 2.5 MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 4I + 33µH AVSPK_ = +8dB THD+N = 10% TQFN PACKAGE 3500 3000 2500 2000 1500 1000 500 0 2.5 MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 4I + 33µH AVSPK_ = +8dB WLP PACKAGE THD+N = 10% THD+N = 1% 500 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) THD+N = 1% THD+N = 1% 3.0 3.5 4.0 4.5 5.0 5.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) ���������������������������������������������������������������� Maxim Integrated Products 41 MAX98089 toc67 2500 4000 OUTPUT POWER vs. SUPPLY VOLTAGE (DAC TO SPEAKER) 4000 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) GAIN vs. FREQUENCY (DAC TO SPEAKER) MAX98089 toc68 EFFICIENCY vs. OUTPUT POWER (DAC TO SPEAKER) 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 ZSPK = 4I + 33µH VSPK_VDD = 4.2V MCLK = 12.288MHz LRCLK = 48kHz NI MODE AVSKP_ = +8dB 0 0.5 1.0 1.5 2.0 ZSPK = 8I + 68µH MAX98089 toc69 5 4 3 NORMALIZED GAIN (dB) 2 1 0 -1 -2 -3 -4 -5 10 100 1k FREQUENCY (Hz) 10k 100 MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 8I + 68µH 100k OUTPUT POWER PER CHANNEL (W) EFFICIENCY vs. OUTPUT POWER (DAC TO SPEAKER) MAX98089 toc70 EFFICIENCY vs. OUTPUT POWER (DAC TO SPEAKER) MAX98089 toc71 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (DAC TO SPEAKER) VRIPPLE = 200mVP-P RIPPLE ON SPKLVDD, SPKRVDD MAX98089 toc72 100 90 80 EFFICIENCY (%) 75 60 50 40 30 20 10 0 0 200 400 600 800 1000 1200 1400 1600 1800 ZSPK = 4I + 33µH ZSPK = 8I + 68µH 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0 MCLK = 12.288MHz LRCLK = 48kHz NI MODE AVSKP_ = +8dB ZSPK = 4I + 33uH ZSPK = 8I + 68uH 120 100 80 PSRR (dB) 60 40 20 0 VSPK_VDD = 4.2V MCLK = 12.288MHz LRCLK = 48kHz NI MODE AVSKP_ = +8dB 2000 RIPPLE ON AVDD, DVDD, HPVDD 200 400 600 800 1000 1200 1400 1600 OUTPUT POWER PER CHANNEL (mW) 10 100 1k FREQUENCY (Hz) 10k 100k OUTPUT POWER PER CHANNEL (mW) ���������������������������������������������������������������� Maxim Integrated Products 42 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) CROSSTALK vs. FREQUENCY (DAC TO SPEAKER) MCLK = 12.288MHz LRCLK = 48kHz NI MODE ZSPK_ = 8I + 68µH MAX98089 toc73 SOFTWARE TURN-ON/OFF RESPONSE (DAC TO SPEAKER, VSEN = 0) MAX98089 toc74 SOFTWARE TURN-ON/OFF RESPONSE (DAC TO SPEAKER, VSEN = 1) MAX98089 toc75 0 -20 CROSSTALK (dB) -40 -60 -80 -100 -120 10 SCL 1V/div SCL 1V/div LEFT TO RIGHT SPEAKER OUTPUT 1V/div SPEAKER OUTPUT 1V/div RIGHT TO LEFT 100 1k FREQUENCY (Hz) 10k 100k 10ms/div 10ms/div FFT, -60dBFS (DAC TO SPEAKER) MAX98089 toc76 FFT, -60dBFS (DAC TO SPEAKER) MAX98089 toc77 WIDEBAND FFT (DAC TO SPEAKER) MCLK = 13MHz LRCLK = 44.1kHz PLL MODE ZSPK_ = 8I + 68µH MAX98089 toc78 20 0 -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 0 5 10 FREQUENCY (kHz) 15 0 -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 0 5 10 FREQUENCY (kHz) 15 0 -20 AMPLITUDE (dBm) -40 -60 -80 -100 MCLK = 12.2888MHz LRCLK = 48kHz NI MODE ZSPK_ = 8I + 68µH MCLK = 13MHz LRCLK = 44.1kHz PLL MODE ZSPK_ = 8I + 68µH 20 20 1 10 FREQUENCY (MHz) 100 ���������������������������������������������������������������� Maxim Integrated Products 43 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) Line to Speaker TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (LINE TO SPEAKER) MAX98089 toc79 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE TO SPEAKER) MAX98089 toc80 GAIN vs. FREQUENCY (LINE TO SPEAKER) 4 3 NORMALIZED GAIN (dB) 2 1 0 -1 -2 -3 -4 -5 ZSPK_ = 8I + 68µH CIN = 1µF MAX98089 toc81 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 0 ZSPK = 8I + 68µH AVSPK_ = +8dB CIN = 1µF 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 ZSPK_ = 8I + 68µH AVSPK_ = +8dB CIN = 1µF 5 POUT = 0.5W POUT = 0.25W 10 100 1k FREQUENCY (Hz) 10k 100k 0.2 0.4 0.6 0.8 1.0 10 100 1k FREQUENCY (Hz) 10k 100k OUTPUT POWER (W) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (LINE TO SPEAKER) MAX98089 toc82 CROSSTALK vs. FREQUENCY (LINE TO SPEAKER) ZFN = 8I + 68µH CIN = 1µF MAX98089 toc83 90 80 70 60 PSRR (dB) 50 40 30 20 10 0 10 100 INPUTS AC GROUNDED VRIPPLE = 200mVP-P 1k FREQUENCY (Hz) 10k RIPPLE ON AVDD, DVDD, HPVDD RIPPLE ON SPKLVDD, SPKRVDD 0 -20 CROSSTALK (dB) -40 -60 -80 -100 -120 10 RIGHT TO LEFT LEFT TO RIGHT 100 1k FREQUENCY (Hz) 10k 100k 100k ���������������������������������������������������������������� Maxim Integrated Products 44 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) DAC to Headphone TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) MAX98089 toc84 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 f = 1000Hz MCLK = 13MHz LRCLK = 8kHz FREQ MODE RHP = 32I AVHP_ = +3dB WLP PACKAGE MAX98089 toc85 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 0 MCLK = 13MHz LRCLK = 8kHz FREQ MODE RHP = 32I AVHP_ = +3dB TQFN PACKAGE 0 f = 3000Hz f = 1000Hz f = 3000Hz f = 100Hz 0.010 0.005 0.020 0.030 0.040 0.045 -80 -90 0 0.01 f = 100Hz 0.02 0.03 0.04 0.05 OUTPUT POWER (W) 0.015 0.025 0.035 OUTPUT POWER (W) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) MAX98089 toc86 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) MAX98089 toc87 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 -100 f = 100Hz 0 0.010 0.020 0.030 0.040 0.050 0.005 0.015 0.025 0.035 0.045 OUTPUT POWER (W) f = 6000Hz f = 1000Hz MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 32I AVHP_ = +3dB TQFN PACKAGE MAX98089 toc88 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 0 THD+N RATIO (dB) MCLK = 13MHz LRCLK = 44.1kHz PLL MODE RHP = 32I AVHP_ = +3dB TQFN PACKAGE f = 6000Hz f = 1000Hz 0 -10 -20 -30 -40 -50 -60 -70 MCLK = 13MHz LRCLK = 44.1kHz PLL MODE RHP = 32I AVHP_ = +3dB WLP PACKAGE f = 6000Hz f = 1000Hz f = 100Hz 0 f = 100Hz 0.010 0.005 0.020 0.030 0.040 0.045 0.015 0.025 0.035 OUTPUT POWER (W) -80 -90 0 0.01 0.02 0.03 0.04 0.05 OUTPUT POWER (W) ���������������������������������������������������������������� Maxim Integrated Products 45 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) MAX98089 toc89 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) MAX98089 toc90 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 -100 0 THD+N RATIO (dB) -40 -50 -60 -70 -80 -90 -100 0 THD+N RATIO (dB) MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 32I AVHP_ = +3dB WLP PACKAGE -10 -20 -30 MCLK = 12.288MHz LRCLK = 96kHz NI MODE RHP = 32I AVHP_ = +3dB TQFN PACKAGE f = 6000Hz f = 1000Hz -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0 MCLK = 12.288MHz LRCLK = 96kHz NI MODE RHP = 32I AVHP_ = +3dB WLP PACKAGE f = 6000Hz f = 1000Hz f = 1000Hz f = 6000Hz f = 100Hz 0.010 0.020 0.030 0.040 0.050 0.005 0.015 0.025 0.035 0.045 OUTPUT POWER (W) f = 100Hz 0.010 0.020 0.030 0.040 0.050 0.005 0.015 0.025 0.035 0.045 OUTPUT POWER (W) f = 100Hz 0.010 0.020 0.030 0.040 0.050 0.005 0.015 0.025 0.035 0.045 OUTPUT POWER (W) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) MAX98089 toc92 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) MAX98089 toc93 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO HEADPHONE) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 f = 1000Hz MCLK = 12.288MHz LRCLK = 48kHz 256FS MODE LOW-POWER MODE RHP = 16I, AVHP_ = +3dB TQFN PACKAGE f = 6000Hz MAX98089 toc94 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 -100 0 THD+N RATIO (dB) MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 16I AVHP_ = +3dB TQFN PACKAGE f = 6000Hz f = 100Hz 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0 MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 16I AVHP_ = +3dB WLP PACKAGE f = 1000Hz f = 6000Hz f = 1000Hz 0.01 0.02 0.03 0.04 0.05 0.06 0.07 OUTPUT POWER (W) f = 100Hz 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 -80 -90 0 0.01 0.02 0.03 f = 100Hz 0.04 0.05 0.06 0.07 OUTPUT POWER (W) OUTPUT POWER (W) ���������������������������������������������������������������� Maxim Integrated Products 46 MAX98089 toc91 0 0 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) 0 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO HEADPHONE) MAX98089 toc95 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HEADPHONE) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 POUT = 0.01W POUT = 0.02W 10 100 1k 10k FREQUENCY (Hz) MCLK = 13MHz LRCLK = 8kHz FREQ MODE RHP = 32I AVHP_ = +3dB MAX98089 toc96 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 0 MCLK = 12.288MHz LRCLK = 48kHz 256FS MODE LOW POWER MODE RHP = 16I AVHP_ = +3dB WLP PACKAGE f = 6000Hz 0 f = 1000Hz f = 100Hz 0.01 0.02 0.03 0.04 0.05 0.06 0.07 -80 -90 OUTPUT POWER (W) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO HEADPHONE) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 10 100 POUT = 0.01W POUT = 0.02W 1k FREQUENCY (Hz) 10k 100k MCLK = 13MHz LRCLK = 44.1kHz PLL MODE RHP = 32I AVHP_ = +3dB MAX98089 toc97 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO HEADPHONE) MAX98089 toc98 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO HEADPHONE) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 POUT = 0.02W POUT = 0.02W MCLK = 12.288MHz LRCLK = 96kHz NI MODE RHP = 32I AVHP_ = +3dB MAX98089 toc99 0 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 10 100 1k FREQUENCY (Hz) POUT = 0.02W POUT = 0.01W 10k MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 32I AVHP_ = +3dB 0 -80 -90 10 100 1k FREQUENCY (Hz) 10k 100k 100k ���������������������������������������������������������������� Maxim Integrated Products 47 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO HEADPHONE) MAX98089 toc100 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (DAC TO HEADPHONE) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 POUT = 0.02W 10 100 1k FREQUENCY (Hz) 10k 100k POUT = 0.01W MCLK = 12.288MHz LRCLK = 48kHz LOW-POWER MODE RHP = 16I, AVHP_ = +3dB MAX98089 toc101 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 10 100 1k FREQUENCY (Hz) 10k POUT = 0.02W POUT = 0.01W MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 16I, AVHP_ = +3dB 0 100k GAIN vs. FREQUENCY (DAC TO HEADPHONE) 0 NORMALIZED GAIN (dB) -10 -20 -30 -40 -50 -60 -70 -80 10 MCLK = 13MHz LRCLK = 8kHz FREQ MODE RHP = 32I 100 1k FREQUENCY (Hz) 10k 100k MAX98089 toc102 10 MODE = 1 MODE = 0 ���������������������������������������������������������������� Maxim Integrated Products 48 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) POWER CONSUMPTION vs. OUTPUT POWER (DAC TO HEADPHONE) MAX98089 toc103 CURRENT CONSUMPTION vs. OUTPUT POWER (DAC TO HEADPHONE) MAX98089 toc104 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (DAC TO HEADPHONE) RIPPLE ON SPKLVDD, SPKRVDD MAX98089 toc105 120 100 80 60 CURRENT CONSUMPTION (mA) POWER CONSUMPTION (mW) MCLK = 12.288MHz LRCLK = 48kHz NI MODE AVHP_ = +3dB 120 100 80 60 40 20 0 MCLK = 12.288MHz LRCLK = 48kHz LOW-POWER MODE AVHP_ = +3dB RPH = 16I 120 100 80 PSRR (dB) 60 40 RPH = 16I 40 20 0 0.1 1 10 100 OUTPUT POWER PER CHANNEL (mW) RPH = 32I RIPPLE ON AVDD, DVDD, HPVDD RPH = 32I 20 VRIPPLE = 200mVP-P 0 10 100 1k FREQUENCY (Hz) 10k 100k 0.1 1 10 100 OUTPUT POWER PER CHANNEL (mW) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (DAC TO HEADPHONE) RIPPLE ON SPKLVDD, SPKRVDD MAX98089 toc106 CROSSTALK vs. FREQUENCY (DAC TO HEADPHONE) MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 32I MAX98089 toc107 120 100 80 PSRR (dB) 60 40 20 0 -20 CROSSTALK (dB) -40 -60 -80 RIPPLE ON AVDD, PVDD, DVDD WLP RIGHT TO LEFT WLP LEFT TO RIGHT -100 VRIPPLE = 200mVP-P TQFN LEFT TO RIGHT -120 10 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k TQFN RIGHT TO LEFT 10k 100k 0 FREQUENCY (kHz) ���������������������������������������������������������������� Maxim Integrated Products 49 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) SOFTWARE TURN-ON/OFF RESPONSE (DAC TO HEADPHONE, VSEN = 0) MAX98089 toc108 SOFTWARE TURN-ON/OFF RESPONSE (DAC TO HEADPHONE, VSEN = 1) MAX98089 toc109 SCL 1V/div SCL 1V/div HEADPHONE OUTPUT 1V/div HEADPHONE OUTPUT 1V/div 10ms/div 10ms/div FFT, 0dBFS (DAC TO HEADPHONE) MAX98089 toc110 FFT, -60dBFS (DAC TO HEADPHONE) 0 -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 MCLK = 13MHz LRCLK = 8kHz FREQ MODE RHP = 32I MAX98089 toc111 20 0 -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 0 2 4 6 8 MCLK = 13MHz LRCLK = 8kHz FREQ MODE RHP = 32I 20 10 12 14 16 18 20 -140 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (kHz) FREQUENCY (kHz) ���������������������������������������������������������������� Maxim Integrated Products 50 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) INBAND FREQUENCY SPECTRUM, 0dBFS (DAC TO HEADPHONE) 0 -20 AMPLITUDE (dBV) FFT, -60dBFS (DAC TO HEADPHONE) MAX98089 toc112 AMPLITUDE (dBV) MCLK = 13MHz LRCLK = 44.1kHz PLL MODE RHP = 32I -20 -40 -60 -80 -100 -120 -140 -160 MCLK = 13MHz LRCLK = 44.1kHz PLL MODE RHP = 32I -40 -60 -80 -100 -120 -140 0 5 10 FREQUENCY (kHz) 15 20 0 5 10 FREQUENCY (kHz) 15 20 FFT, 0dBFS (DAC TO HEADPHONE) MAX98089 toc114 FFT, -60dBFS (DAC TO HEADPHONE) MAX98089 toc115 FFT, 0dBFS (DAC TO HEADPHONE) 0 -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 MCLK = 12.288MHz LRCLK = 96kHz NI MODE RHP = 32I MAX98089 toc116 20 0 -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 0 2 4 6 8 MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 32I 0 -20 -40 AMPLITUDE (dBV) -60 -80 -100 -120 -140 20 MCLK = 12.288MHz LRCLK = 48kHz NI MODE RHP = 32I 10 12 14 16 18 20 -160 0 5 10 FREQUENCY (kHz) 15 20 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (kHz) FREQUENCY (kHz) ���������������������������������������������������������������� Maxim Integrated Products 51 MAX98089 toc113 20 0 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) FFT, -60dBFS (DAC TO HEADPHONE) MAX98089 toc117 FFT, 0dBFS (DAC TO HEADPHONE) MAX98089 toc118 FFT, -60dBFS (DAC TO HEADPHONE) -20 AMPLITUDE (dBV) -40 -60 -80 -100 -120 -140 -20 -40 AMPLITUDE (dBV) -60 -80 -100 -120 -140 -160 0 5 10 AMPLITUDE (dBV) MCLK = 12.288MHz LRCLK = 96kHz NI MODE RHP = 32I 0 -20 -40 -60 -80 -100 -120 -140 MCLK = 12.288MHz LRCLK = 48kHz LOW-POWER MODE RHP = 32I MCLK = 12.288MHz LRCLK = 48kHz LOW POWER MODE RHP = 32I 15 20 0 2 4 6 8 10 12 14 16 18 20 0 5 10 FREQUENCY (kHz) 15 20 FREQUENCY (kHz) FREQUENCY (kHz) Line to Headphone TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (LINE TO HEADPHONE) MAX98089 toc120 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (LINE TO HEADPHONE) -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 POUT = 0.02W RHP = 32I AVHP_ = +3dB CIN = 1µF MAX98089 toc121 0 -10 -20 THD+N RATIO (dB) -30 -40 -50 -60 -70 -80 -90 0 RHP = 32I AVHP_ = +3dB 0 f = 100Hz f = 6000Hz f = 1000Hz 0.010 0.020 0.030 0.040 0.050 0.005 0.015 0.025 0.035 0.045 OUTPUT POWER (W) -80 -90 10 POUT = 0.01W 100 1k FREQUENCY (Hz) 10k 100k ���������������������������������������������������������������� Maxim Integrated Products 52 MAX98089 toc119 0 20 0 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) GAIN vs. FREQUENCY (LINE TO HEADPHONE) MAX98089 toc122 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (LINE TO HEADPHONE) VRIPPLE = 200mVP-P RIPPLE ON AVDD, DVDD, HPVDD MAX98089 toc123 5 4 3 NORMALIZED GAIN (dB) 2 0 -1 -2 -3 -4 -5 10 1 RHP = 32I CIN = 1µF 120 100 80 PSRR (dB) 60 40 20 0 RIPPLE ON SPKLVDD, SPKRVDD 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) 10k 100k CROSSTALK vs. FREQUENCY (LINE TO HEADPHONE) RHP = 32I CIN = 1µF MAX98089 toc124 0 -20 CROSSTALK (dB) -40 -60 -80 WLP RIGHT TO LEFT WLP LEFT TO RIGHT -100 TQFN RIGHT TO LEFT -120 10 100 1k FREQUENCY (Hz) 10k 100k TQFN LEFT TO RIGHT ���������������������������������������������������������������� Maxim Integrated Products 53 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF. AVMICPRE_ = +20dB, AVMICPGA_ = 0dB, AVDACATTN = 0dB, AVDACGAIN = 0dB, AVADCLVL = 0dB, AVADCGAIN = 0dB, AVPGAIN_ = 0dB, AVHP_ = 0dB, AVREC = 0dB, AVSPK_ = 0dB, MCLK = 12.288MHz, LRCLK = 48kHz, MAS = 1. TA = +25NC, unless otherwise noted.) Speaker Bypass Switch TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (SPEAKER BYPASS SWITCH) MAX98089 toc126 ON-RESISTANCE vs. VCOM (SPEAKER BYPASS SWITCH) 3.5 3.0 RON (I) 2.5 2.0 1.5 1.0 -10 -20 THD+N (dB) -30 -40 -50 -60 -70 -80 0 RECEIVER AMPLIFIER DRIVING LOUDSPEAKER ZSPK = 8I + 68µH ISW = 20mA VSPK_VDD = 3.0V f = 1000kHz f = 6000Hz VSPK_VDD = 3.7V VSPK_VDD = 5.0V VSPK_VDD = 4.2V f = 100Hz 0.5 0 0.15 0.20 0.25 0 1 2 3 VCOM (V) 4 5 6 0.05 0.10 OUTPUT POWER (W) OFF-ISOLATION vs. FREQUENCY (SPEAKER BYPASS SWITCH) SPEAKER AMP DRIVING LOUDSPEAKER SPEAKER BYPASS SWITCH OPEN MEASURED AT RXIN_ MAX98089 toc128 0 -20 OFF-ISOLATION (dB) -40 -60 -80 50I LOAD ON RXIN_ RECEIVER AMP DRIVING RXIN_ -100 -120 10 100 1k FREQUENCY (Hz) 10k 100k ���������������������������������������������������������������� Maxim Integrated Products 54 MAX98089 toc127 0 4.0 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Pin Configuration TOP VIEW (BUMP SIDE DOWN) 1 2 3 4 5 6 7 8 9 A SPKRN SPKRGND SPKLVDD SPKLP SPKLN RECP/ LOUTL/ RXINP PVDD HPVSS HPGND B SPKRN SPKRGND SPKLVDD SPKLP SPKLN RECN/ LOUTR/ RXINN C1P C1N HPVDD C SPKRP SPKRP SPKRVDD SPKLGND SPKLGND N.C N.C. HPSNS HPL MAX98089 D BCLKS1 SDOUTS1 SPKRVDD LRCLKS1 N.C. N.C. N.C. INB2 HPR E DVDDS1 MCLK N.C. SDINS1 IRQ JACKSNS INB1 MIC1P/ DIGMICDATA INA2/ EXTMICN F DGND BCLKS2 LRCLKS2 SDA SCL REG MICBIAS MIC1N/ DIGMICCLK INA1/ EXTMICP G SDOUTS2 DVDDS2 SDINS2 DVDD AVDD REF AGND MIC2N MIC2P ���������������������������������������������������������������� Maxim Integrated Products 55 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Pin Configuration (continued) MIC1P/DIGMICDATA MIC1N/DIGMICCLK TOP VIEW MIC2P INA2/EXTMICN INA1/EXTMICP HPGND HPVDD HPSNS HPVSS INB1 INB2 HPR 42 41 40 39 38 37 36 35 34 33 32 31 30 29 MIC2N 43 MICBIAS 44 JACKSNS 45 N.C. 46 AGND 47 REF 48 REG 49 AVDD 50 SCL 51 SDA 52 DVDD 53 SDINS2 54 DVDDS2 55 IRQ 56 1 SDOUTS2 2 BCLKS2 3 DGND 4 LRCLKS2 5 MCLK 6 DVDDS1 7 SDOUTS1 8 BCLKS1 9 SDINS1 10 11 12 13 14 LRCLKS1 N.C. N.C. N.C. N.C. EP* 28 N.C. 27 CIN 26 C1P 25 PVDD 24 RECP/LOUTL/RXINP 23 RECN/LOUTR/RXINN 22 SPKLN MAX98089 N.C. 21 SPKLGND 20 SPKLP 19 SPKLVDD 18 SPKRVDD 17 SPKRP 16 SPKRGND 15 SPKRN TQFN (7mm x 7mm x 0.75mm) *EP = EXPOSED PAD. CONNECT TO GROUND PLANE. ���������������������������������������������������������������� Maxim Integrated Products 56 HPL MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Pin Description BUMP (WLP) A1, B1 A2, B2 A3, B3 A4, B4 A5, B5 A6 A7 A8 A9 B6 B7 B8 B9 C1, C2 C3, D3 C4, C5 C6, C7, D5, D6, D7, E3 C8 C9 D1 PIN (TQFN-EP) 15 16 19 20 22 24 25 31 30 23 26 27 32 17 18 21 11–14, 28, 29, 46 34 33 8 NAME SPKRN SPKRGND SPKLVDD SPKLP SPKLN FUNCTION Negative Right-Channel Class D Speaker Output Right-Speaker Ground Left-Speaker, REF, Receiver Amp Power Supply. Bypass to SPKLGND with a 1FF and a 10FF capacitor. Positive Left-Channel Class D Speaker Output Negative Left-Channel Class D Speaker Output RECP/LOUTL/ Positive Receiver Amplifier Output or Left Line Output. Can be positive bypass RXINP switch input when receiver amp is shut down. PVDD HPVSS HPGND Headphone Power Supply. Bypass to HPGND with a 1FF and a 10FF capacitor. Inverting Charge-Pump Output. Bypass to HPGND with a 1FF ceramic capacitor. Headphone Ground RECN/LOUTR/ Negative Receiver Amplifier Output or Right Line Output. Can be negative bypass RXINN switch input when receiver amp is shut down. C1P C1N HPVDD SPKRP SPKRVDD SPKLGND N.C. HPSNS HPL BCLKS1 Charge-Pump Flying Capacitor Positive Terminal. Connect a 1FF ceramic capacitor between C1N and C1P. Charge-Pump Flying Capacitor Negative Terminal. Connect a 1FF ceramic capacitor between C1N and C1P. Noninverting Charge-Pump Output. Bypass to HPGND with a 1FF ceramic capacitor. Positive Right-Channel Class D Speaker Output Right-Speaker Power Supply. Bypass to SPKRGND with a 1FF capacitor. Left-Speaker Ground No Connection Headphone Amplifier Ground Sense. Connect to the headphone jack ground terminal for optimal performance or connect to PCB ground. Left-Channel Headphone Output S1 Digital Audio Bit Clock Input/Output. BCLKS1 is an input when the IC is in slave mode and an output when in master mode. The input/output voltage is referenced to DVDDS1. S1 Digital Audio Serial-Data ADC Output. The output voltage is referenced to DVDDS1. S1 Digital Audio Left-Right Clock Input/Output. LRCLKS1 is the audio sample rate clock and determines whether S1 audio data is routed to the left or right channel. In TDM mode, LRCLKS1 is a frame sync pulse. LRCLKS1 is an input when the IC is in slave mode and an output when in master mode. Single-Ended Line Input B2. Also positive differential line input B. Right-Channel Headphone Output D2 7 SDOUTS1 D4 D8 D9 10 36 35 LRCLKS1 INB2 HPR ���������������������������������������������������������������� Maxim Integrated Products 57 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Pin Description (continued) BUMP (WLP) E1 E2 E4 PIN (TQFN-EP) 6 5 9 NAME DVDDS1 MCLK SDINS1 FUNCTION S1 Digital Audio Interface Power-Supply Input. Bypass to DGND with a 1FF capacitor. Master Clock Input. Acceptable input frequency range is 10MHz to 60MHz. S1 Digital Audio Serial-Data DAC Input. The input/output voltage is referenced to DVDDS1. Hardware Interrupt Output. IRQ can be programmed to pull low when bits in status register 0x00 change state. Read status register 0x00 to clear IRQ once set. Repeat faults have no effect on IRQ until it is cleared by reading the I2C status register 0x00. Connect a 10kI pullup resistor to DVDD for full output swing. Jack Sense. Detects the insertion and removal of a jack. In typical applications, connect JACKSNS to the MIC pole of the jack. See the Jack Detection section. Single-Ended Line Input B1. Also negative differential line input B. Positive Differential Microphone 1 Input. AC-couple a microphone with a series 1FF capacitor. Can be retasked as a digital microphone data input. Single-Ended Line Input A2. Also positive differential line input A or negative differential external microphone input. Digital Ground S2 Digital Audio Bit Clock Input/Output. BCLKS2 is an input when the IC is in slave mode and an output when in master mode. The input/output voltage is referenced to DVDDS2. S2 Digital Audio Left-Right Clock Input/Output. LRCLKS2 is the audio sample rate clock and determines whether audio data on S2 is routed to the left or right channel. In TDM mode, LRCLKS2 is a frame sync pulse. LRCLKS2 is an input when the IC is in slave mode and an output when in master mode. The input/output voltage is referenced to DVDDS2. I2C Serial-Data Input/Output. Connect a pullup resistor to DVDD for full output swing. I2C Serial-Clock Input. Connect a pullup resistor to DVDD for full output swing. Common-Mode Voltage Reference. Bypass to AGND with a 1FF capacitor. Low-Noise Bias Voltage. Outputs a 2.2V microphone bias. An external 2.2kI resistor should be placed between MICBIAS and the microphone output. Negative Differential Microphone 1 Input. AC-couple a microphone with a series 1FF capacitor. Can be retasked as a digital microphone clock output. Single-Ended Line Input A1. Also negative differential line input A or positive differential external microphone input. E5 56 IRQ E6 E7 E8 E9 F1 F2 45 37 40 38 3 2 JACKSNS INB1 MIC1P/ DIGMICDATA INA2/ EXTMICN DGND BCLKS2 F3 4 LRCLKS2 F4 F5 F6 F7 F8 F9 52 51 49 44 41 39 SDA SCL REG MICBIAS MIC1N/ DIGMICCLK INA1/ EXTMICP ���������������������������������������������������������������� Maxim Integrated Products 58 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Pin Description (continued) BUMP (WLP) G1 G2 G3 G4 G5 G6 G7 G8 G9 — PIN (TQFN-EP) 1 55 54 53 50 48 47 43 42 — NAME SDOUTS2 DVDDS2 SDINS2 DVDD AVDD REF AGND MIC2N MIC2P EP FUNCTION S2 Digital Audio Serial-Data ADC Output. The output voltage is referenced to DVDDS2. S2 Digital Audio Interface Power-Supply Input. Bypass to DGND with a 1FF capacitor. S2 Digital Audio Serial-Data DAC Input. The input voltage is referenced to DVDDS2. Digital Power Supply. Supply for the digital core and I2C interface. Bypass to DGND with a 1FF capacitor. Analog Power Supply. Bypass to AGND with a 1FF capacitor. Converter Reference. Bypass to AGND with a 2.2FF capacitor. Analog Ground Negative Differential Microphone 2 Input. AC-couple a microphone with a series 1FF capacitor. Positive Differential Microphone 2 Input. AC-couple a microphone with a series 1FF capacitor. Exposed Pad (TQFN Only). Connect the exposed pad to the PCB ground plane. ���������������������������������������������������������������� Maxim Integrated Products 59 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Detailed Description The MAX98089 is a fully integrated stereo audio codec with FLEXSOUND technology and integrated amplifiers. Two differential microphone amplifiers can accept signals from three analog inputs. One input can be retasked to support two digital microphones. Any combination of two microphones (analog or digital) can be recorded simultaneously. The analog signals are amplified up to 50dB and recorded by the stereo ADC. The digital record path supports voice filtering with selectable preset highpass filters and high stopband attenuation at fS/2. An automatic gain control (AGC) circuit monitors the digitized signal and automatically adjusts the analog microphone gain to make best use of the ADC’s dynamic range. A noise gate attenuates signals below the user-defined threshold to minimize the noise output by the ADC. The IC includes two analog line inputs. One of the line inputs can be optionally retasked as a third analog microphone input. Both line inputs support either stereo singleended input signals or mono differential signals. The line inputs are preamplified and then routed to the ADC for recording and/or to the output amplifiers for playback. The single-ended line inputs signals from INA1 and INA2 can bypass the PGAs, and be connected directly to the ADC input to provide the best dynamic range. Integrated analog switches allow two differential microphone signals to be routed out the third microphone input to an external device. This eliminates the need for an external analog switch in systems that have two devices recording signals from the same microphone. Through two digital audio interfaces, the device can transmit one stereo audio signal and receive two stereo audio signals in a wide range of formats including I2S, PCM, and up to four mono slots in TDM. Each interface can be connected to either of two audio ports (S1 and S2) for communication with external devices. Both audio interfaces support 8kHz to 96kHz sample rates. Each input signal is independently equalized using 5-band parametric equalizers. A multiband automatic level control (ALC) boosts signals by up to 12dB. One signal path additionally supports the same voiceband filtering as the ADC path. The IC includes a stereo Class D speaker amplifier, a high-efficiency Class H stereo headphone amplifier, and a differential receiver amplifier that can be configured as a single-ended stereo line output. When the receiver amplifier is disabled, analog switches allow RECP/RXINP and RECN/RXINN to be reused for signal routing. In systems where a single transducer is used for both the loudspeaker and receiver, an external receiver amplifier can be routed to the left speaker through RECP/RXINP and RECN/RXINN, bypassing the Class D amplifier. If the internal receiver amplifier is used, then leave RECP/RXINP and RECN/RXINN unconnected. In systems where an external amplifier drives both the receiver and the MAX98089’s line input, one of the differential signals can be disconnected from the receiver when not needed by passing it through the analog switch that connects RECP/RXINP to RECN/RXINN. The stereo Class D amplifier provides efficient amplification for two speakers. The amplifier includes active emissions limiting to minimize the radiated emissions (EMI) traditionally associated with Class D. In most systems, no output filtering is required to meet standard EMI limits. To optimize speaker sound quality, the IC includes an excursion limiter, a distortion limiter, and a power limiter. The excursion limiter is a dynamic highpass filter with variable corner frequency that increases in response to high signal levels. Low-frequency energy typically causes more distortion than useful sound at high signal levels, so attenuating low frequencies allows the speaker to play louder without distortion or damage. At lower signal levels, the filter corner frequency reduces to pass more low frequency energy when the speaker can handle it. The distortion limiter reduces the volume when the output signal exceeds a preset distortion level. This ensures that regardless of input signal and battery voltage, excessive distortion is never heard by the user. The power limiter monitors the continuous power into the loudspeaker and lowers the signal level if the speaker is at risk of overheating. The stereo Class H headphone amplifier uses a dualmode charge pump to maximize efficiency while outputting a ground-referenced signal. This eliminates the need for DC-blocking capacitors or a midrail bias for the headphone jack ground return. Ground sense reduces output noise caused by ground return current. The IC integrates jack detection allowing the detection of insertion and removal of accessories as well as button presses. ���������������������������������������������������������������� Maxim Integrated Products 60 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Configure the MAX98089 using the I2C control bus. The IC uses a slave address of 0x20 or 00100000 for write operations and 0x21 or 00100001 for read operations. See the I2C Serial Interface section for a complete interface description. I2C Slave Address Table 1 lists all of the registers, their addresses, and power-on-reset states. Registers 0x00 to 0x03 and 0xFF are read-only while all of the other registers are read/ write. Write zeros to all unused bits in the register table when updating the register, unless otherwise noted. Registers Table 1. Register Map REGISTER STATUS Status Microphone AGC/NG Jack Status Battery Voltage Interrupt Enable Master Clock Clock Mode Any Clock Control Format Clock I/O Configuration Time-Division Multiplex Filters Clock Mode Any Clock Control Format Clock I/O Configuration PLL2 NI2[7:1] MAS2 0 SEL2 WCI2 0 BCI2 DAC_ ORS2 0 DLY2 0 LBEN2 0 0 TDM2 FSW2 BSEL2 PLL1 NI1[7:1] MAS1 WCI1 BCI1 DAC_ORS1 LTEN1 DLY1 0 LBEN1 0 0 TDM1 FSW1 BSEL1 — ICLD B7 CLD B6 SLD NG JKSNS — ISLD — — IULK 0 0 — — B5 ULK B4 — B3 — B2 — AGC — VBAT 0 IJDET 0 — — B1 JDET B0 — ADDRESS DEFAULT R/W PAGE 0x00 0x01 0x02 0x03 0x0F — — — — 0x00 R R R R/W R/W 117 74 115 116 117 MASTER CLOCK CONTROL 0 0 SR1 NI1[14:8] NI1[0] WS1 PSCLK 0 0 FREQ1 0 0 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0 NI2[0] WS2 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 R/W 85 DAI1 CLOCK CONTROL R/W 85, 86 R/W R/W R/W R/W 86 86 80 81 DAI1 CONFIGURATION ADC_OSR1 SEL1 SLOTL1 MODE1 DMONO1 HIZOFF1 SDOEN1 SDIEN1 SLOTDLY1 DHF1 0 NI2[14:8] 0 DVFLT1 0 R/W 81, 82 R/W R/W R/W R/W R/W R/W R/W 82 90 85 86 86 80 81 SLOTR1 AVFLT1 SR2 DAI2 CLOCK CONTROL DAI2 CONFIGURATION DMONO2 HIZOFF2 SDOEN2 SDIEN2 R/W 81, 82 ���������������������������������������������������������������� Maxim Integrated Products 61 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 1. Register Map (continued) REGISTER Time-Division Multiplex Filters SRC Sample Rate Converter MIXERS DAC Mixer Left ADC Mixer Right ADC Mixer Left Headphone Amplifier Mixer Right Headphone Amplifier Mixer Headphone Amplifier Mixer Control Left Receiver Amplifier Mixer Right Receiver Amplifier Mixer Receiver Amplifier Mixer Control Left Speaker Amplifier Mixer Right Speaker Amplifier Mixer Speaker Amplifier Mixer Control 0 0 0 0 LINE_ MODE 0 0 0 0 0 MIXDAL MIXADL MIXADR MIXDAR 0x22 0x23 0x24 0x00 0x00 0x00 R/W R/W R/W 96 73 73 0 0 B7 B6 B5 B4 B3 B2 B1 B0 ADDRESS DEFAULT R/W PAGE 0x1F DCB2 SRC_ ENR 0x20 0x21 0x00 0x00 0x00 R/W R/W R/W 82 96 89 SLOTL2 0 0 0 0 SLOTR2 0 SRMIX_ MODE DHF2 SRMIX_ ENL SLOTDLY2 0 SRMIX_ ENR 0 SRC_ ENL MIXHPL 0x25 0x00 R/W 110 MIXHPR 0x26 0x00 R/W 110 MIXHPR_ MIXHPL_ PATHSEL PATHSEL MIXHPR_GAIN MIXHPL_GAIN 0x27 0x00 R/W 110 MIXRECL 0x28 0x00 R/W 98 MIXRECR 0x29 0x00 R/W 98 MIXRECR_GAIN MIXRECL_GAIN 0x2A 0x00 R/W 98 MIXSPL 0x2B 0x00 R/W 101 MIXSPR 0x2C 0x00 R/W 101 MIXSPR_GAIN MIXSPL_GAIN 0x2D 0x00 R/W 101 ���������������������������������������������������������������� Maxim Integrated Products 62 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 1. Register Map (continued) REGISTER Sidetone DAI1 Playback Level DAI1 Playback Level DAI2 Playback Level DAI2 Playback Level Left ADC Level Right ADC Level Microphone 1 Input Level Microphone 2 Input Level INA Input Level INB Input Level Left Headphone Amplifier Volume Control Right Headphone Amplifier Volume Control B7 DSTS DV1M 0 B6 B5 0 DV1G B4 B3 B2 DVST DV1 B1 B0 ADDRESS DEFAULT R/W PAGE 0x2E 0x2F 0x00 0x00 R/W R/W 78 95 LEVEL CONTROL 0 0 0 EQCLP1 DVEQ1 0x30 0x00 R/W 94 DV2M 0 0 0 DV2 0x31 0x00 R/W 95 0 0 0 0 0 0 0 0 0 0 PA1EN PA2EN INAEXT INBEXT 0 EQCLP2 AVLG AVRG DVEQ2 AVL AVR PGAM1 PGAM2 0x32 0x33 0x34 0x35 0x36 0x00 0x00 0x00 0x00 0x00 0x00 0x00 R/W R/W R/W R/W R/W R/W R/W 94 77 77 70 70 72 72 0 0 0 0 0 0 PGAINA PGAINB 0x37 0x38 HPLM 0 0 HPVOLL 0x39 0x00 R/W 111 HPRM 0 0 HPVOLR 0x3A 0x00 R/W 111 Left Receiver Amplifier RECLM Volume Control Right Receiver Amplifier Volume Control 0 0 RECVOLL 0x3B 0x00 R/W 99 RECRM 0 0 RECVOLR 0x3C 0x00 R/W 99 ���������������������������������������������������������������� Maxim Integrated Products 63 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 1. Register Map (continued) REGISTER Left Speaker Amplifier Volume Control Right Speaker Amplifier Volume Control B7 SPLM B6 0 B5 0 B4 B3 B2 SPVOLL B1 B0 ADDRESS DEFAULT R/W PAGE 0x3D 0x00 R/W 102 SPRM 0 0 SPVOLR 0x3E 0x00 R/W 102 MICROPHONE AGC Configuration AGCSRC Threshold Excursion Limiter Filter Excursion Limiter Threshold ALC Power Limiter Power Limiter Distortion Limiter CONFIGURATION Audio Input Microphone INADIFF INBDIFF MICCLK 0 ZDEN 0 0 0 SPLEN 0 0 MIC2BYP 0 0 SPREN BIASEN 0 0 0 0 0 MBEN 0 0 0 0 0 0 0 EXTMIC EQ2EN EQ1EN RECBYP SPKBYP JDEB ADLEN DALEN 0 ADREN DAREN JDWK 0 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F CGM1_ EN 0x50 0x51 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xF0 0x00 0x0F 0x00 R/W R/W 72 70 DIGMICL DIGMICR AGCRLS ANTH AGCATK AGCTH AGCHLD 0x3F 0x40 0x00 0x00 R/W 74, 75 R/W 75 SPEAKER SIGNAL PROCESSING 0 0 ALCEN 0 DHPUCF 0 ALCRLS PWRTH PWRT2 THDCLP 0 0 0 0 0 ALCMB 0 0 DHPLCF DHPTH ALCTH PWRK PWRT1 0 THDT1 0x41 0x42 0x43 0x44 0x45 0x46 0x00 0x00 0x00 0x00 0x00 0x00 R/W R/W 104 104 R/W 93, 104 R/W R/W R/W 105 106 107 Level Control VS2EN VSEN Bypass INABYP 0 Switches Jack JDETEN 0 Detection POWER MANAGEMENT Input Enable Output Enable Top-Level Bias Control DAC Low Power Mode 1 DAC Low Power Mode 2 System Shutdown 0 INAEN HPLEN INBEN HPREN R/W 94, 113 71, R/W 112 R/W R/W R/W R/W R/W R/W R/W 115 67 68 68 87 87 67, 116 RECLEN RECREN 0 0 BGEN SPREGEN VCMEN DAI2_DAC_LP 0 0 0 DAI1_DAC_LP 0 0 DAC2_IP_ DAC1_IP_ CGM2_ DITH_EN DITH_EN EN SHDN VBATEN PERFMODE HPPLYBACK PWRSV8K PWRSV ���������������������������������������������������������������� Maxim Integrated Products 64 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 1. Register Map (continued) REGISTER B7 B6 B5 B4 B3 B2 B1 B0 ADDRESS DEFAULT R/W PAGE 0x52/0x84 0x53/0x85 0x54/0x86 0x55/0x87 0x56/0x88 0x57/0x89 0x58/0x8A 0x59/0x8B 0x5A/0x8C 0x5B/0x8D 0x5C/0x8E 0x5D/0x8F 0x5E/0x90 0x5F/0x91 0x60/0x92 0x61/0x93 0x62/0x94 0x63/0x95 0x64/0x96 0x65/0x97 0x66/0x98 0x67/0x99 0x68/0x9A 0x69/0x9B 0x6A/0x9C 0x6B/0x9D 0x6C/0x9E 0x6D/0x9F 0x6E/0xAE 0x6F/0xA1 0x70/0xA2 0x71/0xA3 0x72/0xA4 0x73/0xA5 0x74/0xA6 0x75/0xA7 0x76/0xA8 0x77/0xA9 0x78/0xAA 0x79/0xAB 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 DSP COEFFICIENTS K_1[15:8] K_1[7:0] K1_1[15:8] K1_1[7:0] EQ Band 1 (DAI1/DAI2) K2_1[15:8] K2_1[7:0] c1_1[15:8] c1_1[7:0] c2_1[15:8] c2_1[7:0] K_2[15:8] K_2[7:0] K1_2[15:8] K1_2[7:0] EQ Band 2 (DAI1/DAI2) K2_2[15:8] K2_2[7:0] c1_2[15:8] c1_2[7:0] c2_2[15:8] c2_2[7:0] K_3[15:8] K_3[7:0] K1_3[15:8] K1_3[7:0] EQ Band 3 (DAI1/DAI2) K2_3[15:8] K2_3[7:0] c1_3[15:8] c1_3[7:0] c2_3[15:8] c2_3[7:0] K_4[15:8] K_4[7:0] K1_4[15:8] K1_4[7:0] EQ Band 4 (DAI1/DAI2) K2_4[15:8] K2_4[7:0] c1_4[15:8] c1_4[7:0] c2_4[15:8] c2_4[7:0] ���������������������������������������������������������������� Maxim Integrated Products 65 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 1. Register Map (continued) REGISTER B7 B6 B5 B4 B3 K_5[7:0] K1_5[15:8] K1_5[7:0] EQ Band 5 (DAI1/DAI2) K2_5[15:8] K2_5[7:0] c1_5[15:8] c1_5[7:0] c2_5[15:8] c2_5[7:0] a1[15:8] a1[7:0] a2[15:8] Excursion Limiter Biquad (DAI1/DAI2) a2[7:0] b0[15:8] b0[7:0] b1[15:8] b1[7:0] b2[15:8] b2[7:0] REVISION ID Rev ID REV 0xFF 0x40 R 118 B2 B1 B0 K_5[15:8] 0x7A/0xAC 0x7C/0xAE 0x7D/0xAF 0x7E/0xB0 0x7F/0xB1 0x80/0xB2 0x81/0xB3 0x82/0xB4 0x83/0xB5 0xB6/0xC0 0xB7/0xC1 0xB8/0xC2 0xB9/0xC3 0xBA/0xC4 0xBB/0xC5 0xBC/0xC6 0xBD/0xC7 0xBE/0xC8 0xBF/0xC9 ADDRESS DEFAULT R/W PAGE 0xXX R/W 93 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX 0xXX R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 93 0x7B/0xAD ���������������������������������������������������������������� Maxim Integrated Products 66 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The IC includes comprehensive power management to allow the disabling of all unused circuits, minimizing supply current. Power Management Table 2. Power Management Registers REGISTER BIT 7 6 3 NAME DESCRIPTION Global Shutdown. Disables everything except the headset detection circuitry, which is controlled separately. 0 = Device Shutdown 1 = Device Enabled See the Battery Measurement section. Performance Mode. Selects DAC to headphone playback performance mode. 0 = High performance playback mode. 1 = Low power playback mode. Headphone Only Playback Mode. Configures System Bias Control register bits for low power playback when using DAC to headphone playback path only. When enabled, this bit overrides the System Bias Control register settings. When disabled, the System Bias Control register is used to enable system bias blocks. Set both HPPLYBCK and PERFMODE for lowest power consumption when using DAC to headphone playback path only. 0 = Disabled 1 = Enabled 8kHz Power Save Mode. PWRSV8K configures the ADC for reduced power consumption when fS = 8kHz. PWRSV8K can be used in conjunction with PWRSV when fS = 8kHz for more power savings. 0 = Normal, high-performance mode. 1 = Low power mode. Power Save Mode. PWRSV configures the ADC for reduced power consumption for all sample rates. PWRSV can be used in conjunction with PWRSV8K for more power savings. 0 = Normal, high-performance mode. 1 = Low-power mode. Line Input A Enable 0 = Disabled 1 = Enabled Line Input B Enable 0 = Disabled 1 = Enabled Microphone Bias Enable 0 = Disabled 1 = Enabled Left ADC Enable 0 = Disabled 1 = Enabled Right ADC Enable 0 = Disabled 1 = Enabled SHDN VBATEN PERFMODE 0x51 2 HPPLYBCK 1 PWRSV8K 0 PWRSV 7 INAEN 6 INBEN 0x4C 3 MBEN 1 ADLEN 0 ADREN ���������������������������������������������������������������� Maxim Integrated Products 67 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 2. Power Management Registers (continued) REGISTER BIT 7 NAME HPLEN Left Headphone Enable 0 = Disabled 1 = Enabled Right Headphone Enable 0 = Disabled 1 = Enabled Left Speaker Enable 0 = Disabled 1 = Enabled Right Speaker Enable 0 = Disabled 1 = Enabled Receiver/Left Line Output Enable. Use this bit to enable the differential receiver output or left line output. 0 = Disabled 1 = Enabled Right Line Output Enable. Use this bit to enable the right line output. 0 = Disabled 1 = Enabled Left DAC Enable 0 = Disabled 1 = Enabled Right DAC Enable 0 = Disabled 1 = Enabled Bandgap Enable. Must be enabled for proper operation of the 2.5V regulator and associated circuitry. 0 = Disabled 1 = Enabled 2.5V Regulator Enable. SPREGEN enables a 2.5V internal regulator required for the ADC, speaker and receiver/line out amplifier. The 2.5V regulator is powered by SPKLVDD. 0 = Disabled 1 = Enabled Common-Mode Voltage Resistor String Enable. VCMEN enables the common mode voltage for the input and output amplifiers in the codec. 0 = Disabled 1 = Enabled Chip Bias Enable. BIASEN needs to be set for the codec amplifiers to be enabled. 0 = Disabled 1 = Enabled See the Jack Detection section. DESCRIPTION 6 HPREN 5 SPLEN 4 0x4D 3 SPREN RECLEN 2 RECREN 1 DALEN 0 DAREN 7 BGEN 6 0x4E 5 SPREGEN VCMEN 4 0 BIASEN JDWK ���������������������������������������������������������������� Maxim Integrated Products 68 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The device includes three differential microphone inputs and a low-noise microphone bias for powering the microphones (Figure 6). One microphone input can also be configured as a digital microphone input accepting signals from up to two digital microphones. Any two microphones, analog or digital, can be recorded simultaneously. In the typical application, one microphone input is used for the handset microphone and the other is used as an accessory microphone. In systems using a background noise microphone, INA can be retasked as another microphone input. In systems where the codec is not the only device recording microphone signals, connect microphones to Microphone Inputs MIC2P/MIC2N and EXTMICP/EXTMICN. MIC1P/MIC1N then become outputs that route the microphone signals to an external device as needed. Two devices can then record microphone signals without needing external analog switches. Analog microphone signals are amplified by two stages of gain and then routed to the ADCs. The first stage offers selectable 0dB, 20dB, or 30dB settings. The second stage is a programmable-gain amplifier (PGA) adjustable from 0dB to 20dB in 1dB steps. To maximize the signalto-noise ratio, use the gain in the first stage whenever possible. Zero-crossing detection is included on the PGA to minimize zipper noise while making gain changes. MCLK MICBIAS MBEN MIC1P/ DIGMICDATA MIC1N/ DIGMICCLK AGC CONTROL EXTMIC MIC2BYP ADLEN ADCL PA1EN: 0/20/30dB REG CLOCK CONTROL PGAM1: +20dB TO 0dB MIC2P MIX MIC2N EXTMIC PA2EN: 0/20/30dB PGAM1: +20dB TO 0dB MIXADL INABYP PGAINA: +20dB TO -6dB INA1/EXTMICP INADIFF MIXADR MIX ADCR ADREN INA2/EXTMICN PGAINA: +20dB TO -6dB Figure 6. Microphone Input Block Diagram ���������������������������������������������������������������� Maxim Integrated Products 69 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 3. Microphone Input Registers REGISTER BIT 6 PA1EN/PA2EN 5 4 NAME DESCRIPTION MIC1/MIC2 Preamplifier Gain Course microphone gain adjustment. 00 = Preamplifier disabled 01 = 0dB 10 = 20dB 11 = 30dB MIC1/MIC2 PGA Fine microphone gain adjustment. VALUE 3 0x35/0x36 2 0x00 0x01 0x02 PGAM1/PGAM2 0x03 0x04 0x05 1 0x06 0x07 0x08 0 0x09 GAIN (dB) +20 +19 +18 +17 +16 +15 +14 +13 +12 +11 VALUE 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 to 0x1F GAIN (dB) +9 +8 +7 +6 +5 +4 +3 +2 +1 0 7 MICCLK 6 0x0A +10 Digital Microphone Clock Frequency Select a frequency that is within the digital microphone’s clock frequency range. Set OSR1 = 1 when using a digital microphone. 00 = PCLK/8 01 = PCLK/6 10 = 64 x LRCLK 11 = Reserved Left Digital Microphone Enable Set PA1EN = 00 for proper operation. 0 = Disabled 1 = Enabled Right Digital Microphone Enable Set PA1EN = 00 for proper operation. 0 = Disabled 1 = Enabled External Microphone Connection Routes INA_/EXTMIC_ to the microphone preamplifiers. Set INAEN = 0 when using INA_/EXTMIC_ as a microphone input. 00 = Disabled 01 = MIC1 input 10 = MIC2 input 11 = Reserved 5 0x48 4 DIGMICL DIGMICR 1 EXTMIC 0 ���������������������������������������������������������������� Maxim Integrated Products 70 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 3. Microphone Input Registers (continued) REGISTER BIT 7 NAME INABYP DESCRIPTION INA�/EXTMIC� to MIC1� Bypass Switch 0 = Disabled 1 = Enabled MIC1� to MIC2� Bypass Switch 0 = Disabled 1 = Enabled 4 0x4A 1 MIC2BYP RECBYP See the Output Bypass Switches section. 0 SPKBYP The device includes two sets of line inputs (Figure 7). Each set can be configured as a stereo single-ended input or as a mono differential input. Each input includes adjustable gain to match a wide range of input signal levels. If a custom gain is needed, the external gain mode provides a trimmed feedback resistor. Set the gain Line Inputs by choosing the appropriate input resistor and using the following formula: AVPGAIN = 20 x log (20kI/RIN) The external gain mode also allows summing multiple signals into a single input, by connecting multiple input resistors as show in Figure 8, and/or inputting signals larger than 1VP-P by adjusting the ration of the 20kI/RIN less than 1. INABYP PGAINA: +20dB TO -6dB INADIFF PGAINA: +20dB TO -6dB INA1/ EXTMICP INA2/ EXTMICN LEFT INPUT 1 LEFT INPUT 2 INA1/EXTMICP VCM 20kI 1VP-P (max) PGAINB: +20dB TO -6dB INB1 INBDIFF RIGHT INPUT 1 RIGHT INPUT 2 INA2/EXTMICN 20kI 1VP-P (max) VCM PGAINB: +20dB TO -6dB INB2 Figure 7. Line Input Block Diagram Figure 8. Summing Multiple Input Signals into INA/INB ���������������������������������������������������������������� Maxim Integrated Products 71 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 4. Line Input Registers REGISTER BIT NAME DESCRIPTION Line Input A/B External Gain Switches out the internal input resistor and selects a trimmed 20kI feedback resistor. Use an external input resistor to set the gain of the line input. 0 = Disabled 1 = Enabled Line Input A/B Internal Gain Settings 000 = +20dB 001 = +14dB 010 = +3dB 011 = 0dB 100 = -3dB 101 = -6dB 110 = -6dB 111 = -6dB Line Input A Differential Enable 0 = Stereo single-ended input 1 = Mono differential input Line Input B Differential Enable 0 = Stereo single-ended input 1 = Mono differential input 6 INAEXT/INBEXT 0x37/0x38 2 1 PGAINA/PGAINB 0 7 0x47 6 INADIFF INBDIFF The IC’s stereo ADC accepts input from the microphone amplifiers, line inputs amplifiers, and directly from the INA1 and INA2. The ADC mixer routes any combination of the eight audio inputs to the left and right ADCs (Figure 9). ADC Input Mixers PGAM1: +20dB TO 0dB PA1EN: 0/20/30dB MIX PGAM2: +20dB TO 0dB MIXADL ADLEN ADCL PA2EN: 0/20/30dB MIX PGAINA: +20dB TO -6dB INADIFF MIXADR ADCR ADREN + PGAINA: +20dB TO -6dB PGAINB: +20dB TO -6dB INBDIFF + PGAINB: +20dB TO -6dB Figure 9. ADC Input Mixer Block Diagram ���������������������������������������������������������������� Maxim Integrated Products 72 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 5. ADC Input Mixer Register REGISTER BIT 7 6 5 0x23/0x24 4 3 2 1 0 MIXADL/MIXADR NAME DESCRIPTION Left/Right ADC Input Mixer Selects which analog inputs are recorded by the left/right ADC. 1xxxxxxx = MIC1 x1xxxxxx = MIC2 xx1xxxxx = INA1 pin direct xxx1xxxx = INA2 pin direct xxxx1xxx = INA1 xxxxx1xx = INA2 (INADIFF = 0) or INA2 - INA1 (INADIFF = 1) xxxxxx1x = INB1 xxxxxxx1 = INB2 (INBDIFF = 0) or INB2 - INB1 (INBDIFF = 1) The device’s record signal path includes both automatic gain control (AGC) for the microphone inputs and a digital noise gate at the output of the ADC (Figure 10). Record Path Signal Processing Microphone AGC The IC’s AGC monitors the signal level at the output of the ADC and then adjusts the MIC1 and MIC2 analog PGA settings automatically. When the signal level is below the predefined threshold, the gain is increased up to its maximum (20dB). If the signal exceeds the threshold, the gain is reduced to prevent the output signal level exceeding the threshold. When AGC is enabled, the microphone PGA is not user programmable. The AGC provides a more constant signal level and improves the available ADC dynamic range. Noise Gate Since the AGC increases the levels of all signals below a user-defined threshold, the noise floor is effectively increased by 20dB. To counteract this, the noise gate reduces the gain at low signal levels. Unlike typical noise gates that completely silence the output below a defined level, the noise gate in the IC applies downward expansion. The noise gate attenuates the output at a rate of 1dB for each 2dB the signal is below the threshold with a maximum attenuation of 12dB. The noise gate can be used in conjunction with the AGC or on its own. When the AGC is enabled, the noise gate reduces the output level only when the AGC has set the gain to the maximum setting. Figure 11 shows the gain response resulting from using the AGC and noise gate. AGC AND NOISE GATE AMPLITUDE RESPONSE PA1EN: 0/20/30dB 0 PGAM1: +20dB TO -6dB AUTOMATIC GAIN CONTROL MODE1 AVFLT NOISE GATE AUDIO/ VOICE FILTERS AVRG: 0/6/ 12/18dB AVR:0dB TO -15dB AGC ONLY -20 OUTPUT AMPLITUDE (dBFS) AGC AND NOISE GATE -40 -60 -80 -100 -120 -120 -100 -80 -60 -40 -20 0 INPUT AMPLITUDE (dBFS) AGC AND NOISE GATE DISABLED NOISE GATE ONLY PA2EN: 0/20/30dB PGAM2: +20dB TO 0dB MIX ADCL ADLEN AVLG: 0/6/ 12/18dB AVL:0dB TO -15dB MIXADL SRMIX_ MODE SAMPLE RATE CONVERTER MIX ADCR ADREN MIXADR Figure 10. Record Path Signal Processing Block Diagram Figure 11. AGC and Noise Gate Input vs. Output Gain ���������������������������������������������������������������� Maxim Integrated Products 73 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 6. Record Path Signal Processing Registers REGISTER BIT 7 NAME DESCRIPTION Noise Gate Attenuation Reports the current noise gate attenuation. 000 = 0dB 001 = 1dB 010 = 2dB 011 = 3dB to 5dB 100 = 6dB to 7dB 101 = 8dB to 9dB 110 = 10dB to 11dB 111 = 12dB AGC Gain Reports the current AGC gain setting. VALUE 0x00 3 0x01 0x02 2 AGC 0x03 0x04 0x05 0x06 1 0x07 0x08 0 0x09 0x0A GAIN (dB) +20 +19 +18 +17 +16 +15 +14 +13 +12 +11 +10 VALUE 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 to 0x1F GAIN (dB) +9 +8 +7 +6 +5 +4 +3 +2 +1 0 6 NG 5 4 0x01 7 AGCSRC AGC/Noise Gate Signal Source Determines which ADC channel the AGC and noise gates analyze. Gain is adjusted on both channels regardless of the AGCSRC setting. 0 = Left ADC output 1 = Maximum of either the left or right ADC output AGC Release Time Defined as the duration from start to finish of gain increase in the region shown in Figure 12. 000 = 78ms 001 = 156ms 010 = 312ms 011 = 625ms 100 = 1.25s 101 = 2.5s 110 = 5s 111 = 10s 6 0x3F 5 AGCRLS 4 ���������������������������������������������������������������� Maxim Integrated Products 74 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 6. Record Path Signal Processing Registers (continued) REGISTER BIT 3 AGCATK 2 0x3F 1 AGCHLD 0 NAME DESCRIPTION AGC Attack Time Defined as the time required to reduce gain by 63% of the total gain reduction (one time constant of the exponential response). Attack times are longer for low AGC threshold levels. See Figure 12 for details. 00 = 2ms 01 = 7.2ms 10 = 31ms 11 = 123ms AGC Hold Time The delay before the AGC release begins. The hold time counter starts whenever the signal drops below the AGC threshold and is reset by any signal that exceeds the threshold. Set AGCHLD to enable the AGC circuit. See Figure 12 for details. 00 = AGC disabled 01 = 50ms 10 = 100ms 11 = 400ms Noise Gate Threshold Gain is reduced for signals below the threshold to quiet noise. The thresholds are relative to the ADC’s full-scale output voltage. VALUE 6 ANTH 5 0x0 0x1 0x2 0x3 0x4 0x5 4 0x40 3 0x6 0x7 THRESHOLD (dBFS) Noise gate disabled Reserved Reserved -64 -62 -58 -53 -50 VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF THRESHOLD (dBFS) -45 -41 -38 -34 -30 -27 -22 -16 7 AGC Threshold Gain is reduced when signals exceed the threshold to prevent clipping. The thresholds are relative to the ADC’s full-scale voltage. VALUE THRESHOLD (dBFS) -3 -4 -5 -6 -7 -8 -9 -10 VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF THRESHOLD (dBFS) -11 -12 -13 -14 -15 -16 -17 -18 2 AGCTH 1 0x0 0x1 0x2 0x3 0x4 0x5 0 0x6 0x7 ���������������������������������������������������������������� Maxim Integrated Products 75 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ATTACK TIME HOLD TIME RELEASE TIME Figure 12. AGC Timing The IC includes separate digital level control for the left and right ADC outputs (Figure 13). To optimize dynamic range, use analog gain to adjust the signal level and set ADC Record Level Control NOISE GATE AUTOMATIC GAIN CONTROL AUDIO/ VOICE FILTERS AVRG: 0/6/ 12/18dB AVR:0dB TO -15dB SAMPLE RATE CONVERTER MODE1 AVFLT ADCL ADLEN AVLG: 0/6/ 12/18dB AVL:0dB TO -15dB SRMIX_ MODE ADCR ADREN Figure 13. ADC Record Level Control Block Diagram ���������������������������������������������������������������� Maxim Integrated Products 76 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 7. ADC Record Level Control Register REGISTER BIT 5 AVLG/AVRG 4 3 0x33/0x34 2 AVL/AVR NAME Left/Right ADC Gain 00 = 0dB 01 = 6dB 10 = 12dB 11 = 18dB Left/Right ADC Level VALUE 0x0 0x1 0x2 0x3 0x4 0x5 0 0x6 0x7 GAIN (dB) +3 +2 +1 0 -1 -2 -3 -4 VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF GAIN (dB) -5 -6 -7 -8 -9 -10 -11 -12 DESCRIPTION 1 the digital level control to 0dB whenever possible. Digital level control is primarily used when adjusting the record level for digital microphones. Sidetone Enable sidetone during full-duplex operation to add a low-level copy of the recorded audio signal to the playback audio signal (Figure 14). Sidetone is commonly used in telephony to allow the speaker to hear himself speak, providing a more natural user experience. The DVST: 0dB TO -60dB SIDETONE DSTS MIX DV1G: 0/6/12/18dB + MULTI BAND ALC DVEQ1: 0dB TO -15dB DVEQ2: 0dB TO -15dB AUTOMATIC GAIN CONTROL MODE1 AVFLT ADLEN ADCL AVLG: 0/6/ 12/18dB AVL:0dB TO -15dB SRMIX_ MODE NOISE GATE AUDIO/ VOICE FILTERS 5-BAND PARAMETRIC EQ EQ1EN 5-BAND PARAMETRIC EQ EQ2EN MIX AUDIO/ FILTERS DCB2 MIXDAL DACL DALEN EXCURSION LIMITER AVRG: 0/6/ 12/18dB AVR:0dB TO -15dB DV2: 0dB TO -15dB SAMPLE RATE CONVERTER ADCR ADREN DV1: 0dB TO -15dB AUDIO/ VOICE FILTERS MODE1 DVFLT MIX MIXDAR DACR DAREN Figure 14. Sidetone Block Diagram ���������������������������������������������������������������� Maxim Integrated Products 77 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 8. Sidetone Register REGISTER BIT 7 DSTS 6 NAME DESCRIPTION Sidetone Source Selects which ADC output is fed back as sidetone. When mixing the left and right ADC outputs, each is attenuated by 6dB to prevent full-scale signals from clipping. 00 = Sidetone disabled 01 = Left ADC 10 = Right ADC 11 = Left + Right ADC Sidetone Level Adjusts the sidetone signal level. All levels are referenced to the ADC’s full-scale output. VALUE 0x00 3 0x2E 0x01 0x02 0x03 0x04 2 0x05 DVST 0x06 0x07 0x08 1 0x09 0x0A 0x0B 0x0C 0 0x0D 0x0E 0x0F LEVEL (dB) Sidetone disabled -0.5 -2.5 -4.5 -6.5 -8.5 -10.5 -12.5 -14.5 -16.5 -18.5 -20.5 -22.5 -24.5 -26.5 -28.5 VALUE 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F LEVEL (dB) -30.5 -32.5 -34.5 -36.5 -38.5 -40.5 -42.5 -44.5 -46.5 -48.5 -50.5 -52.5 -54.5 -56.6 -58.5 -60.5 4 IC implements sidetone digitally. Doing so helps prevent unwanted feedback into the playback signal path and better matches the playback audio signal. The IC includes two separate playback signal paths and one record signal path. Digital audio interface 1 (DAI1) is used to transmit the recorded stereo audio signal and receive a stereo audio signal for playback. Digital audio interface 2 (DAI2) is used to receive a second stereo audio signal. Use DAI1 for all full-duplex operations and for all voice signals. Use DAI2 for music and to mix two playback audio signals. The digital audio interfaces are separate from the audio ports to enable either interface to communicate with any external device connected to either audio port. Digital Audio Interfaces Each audio interface can be configured in a variety of formats including left justified, I2S, PCM, and time division multiplexed (TDM). TDM mode supports up to 4 mono audio slots in each frame. The IC can use up to 2 mono slots per interface, leaving the remaining two slots available for another device. Table 9 shows how to configure the device for common digital audio formats. Figures 16 and 17 show examples of common audio formats. By default, SDOUTS1 and SDOUTS2 are set high impedance when the IC is not outputting data to facilitate sharing the bus. Configure the interface in TDM mode using only slot 1 to transmit and receive mono PCM voice data. The IC’s digital audio interfaces support both ADC to DAC loop-through and digital loopback. Loop-through allows the signal converted by the ADC to be routed to the DAC for playback. The signal is routed from the record path to ���������������������������������������������������������������� Maxim Integrated Products 78 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology the playback path in the digital audio interface to allow the IC’s full complement of digital signal processing to be used. Loopback allows digital data input to either SDINS1 or SDINS2 to be routed from one interface to the other for output on SDOUTS2 or SDOUTS1. Both interfaces must be configured for the same sample rate, but the interface format need not be the same. This allows the IC to route audio data from one device to another, converting the data format as needed. Figure 15 shows the available digital signal routing options. BCLKS1 LRCLKS1 SDOUTS1 SDINS1 DVDDS1 BCLKS2 LRCLKS2 SDOUTS2 SDINS2 DVDDS2 SEL1 LRCLK1 SDOUT1 BCLK1 SDIN1 SEL2 BCLK2 LRCLK2 SDOUT2 SDIN2 HIZOFF2 SDOEN2 DATA INPUT SDIEN2 DAI1 MAS1 BIT CLOCK FRAME CLOCK MAS1 HIZOFF1 SDOEN1 DATA INPUT SDIEN1 DAI2 MAS2 BIT CLOCK FRAME CLOCK MAS2 DATA OUTPUT DATA OUTPUT LBEN1 LBEN2 MUX + LTEN1 DAI1 RECORD PATH DAI1 PLAYBACK PATH DAI2 PLAYBACK PATH Figure 15. Digital Audio Signal Routing Table 9. Common Digital Audio Formats MODE Left Justified I2S PCM TDM X = Don’t care. ���������������������������������������������������������������� Maxim Integrated Products 79 WCI1/WCI2 1 0 X X BCI1/BCI2 0 0 1 1 DLY1/DLY2 0 1 X X TDM1/TDM2 0 0 1 1 SLOTL1/SLOTL2 SLOTR1/SLOTR2 X X 0 Set as desired X X 0 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 10. Digital Audio Interface Registers REGISTER BIT NAME DESCRIPTION DAI1/DAI2 Master Mode In master mode, DAI1/DAI2 outputs LRCLK and BCLK. In slave mode, DAI1/DAI2 accept LRCLK and BCLK as inputs. 0 = Slave mode 1 = Master mode DAI1/DAI2 Word Clock Invert TDM1/TDM2 = 0: 0 = Left-channel data is transmitted while LRCLK is low. 1 = Right-channel data is transmitted while LRCLK is low. TDM1/TDM2 = 1: Always set WCI = 0. DAI1/DAI2 Bit Clock Invert BCI1/BCI2 must be set to 1 when TDM1/TDM2 = 1. 0 = SDIN is accepted on the rising edge of BCLK. SDOUT is valid on the rising edge of BCLK. 1 = SDIN is accepted on the falling edge of BCLK. SDOUT is valid on the falling edge of BCLK. Master Mode: 0 = LRCLK transitions on the falling edge of BCLK. 1 = LRCLK transitions on the rising edge of BCLK. DAI1/DAI2 Data Delay DLY1/DLY2 has no effect when TDM1/TDM2 = 1. 0 = The most significant data bit is clocked on the first active BCLK edge after an LRCLK transition. 1 = The most significant data bit is clocked on the second active BCLK edge after an LRCLK transition. DAI1/DAI2 Time-Division Multiplex Mode (TDM Mode) Set TDM1/TDM2 when communicating with devices that use a frame synchronization pulse on LRCLK instead of a square wave. 0 = Disabled 1 = Enabled (BCI1/BCI2 must be set to 1) DAI1/DAI2 Wide Frame Sync Pulse Increases the width of the frame sync pulse to the full data width when TDM1/TDM2 = 1. FSW1/FSW2 has no effect when TDM1/TDM2 = 0. 0 = Disabled 1 = Enabled DAI1/DAI2 Audio Data Bit Depth Determines the maximum bit depth of audio being transmitted and received. Data is always 16 bit when TDM1/TMD2 = 0. 0 = 16 bits 1 = 24 bits 7 MAS1/MAS2 6 WCI1/WCI2 5 BCI1/BCI2 0x14/0x1C 4 DLY1/DLY2 2 TDM1/TDM2 1 FSW1/FSW2 0 WS1/WS2 ���������������������������������������������������������������� Maxim Integrated Products 80 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 10. Digital Audio Interface Registers (continued) REGISTER BIT 7 OSR1 6 NAME DESCRIPTION ADC Oversampling Ratio Use the higher setting for maximum performance. Use the lower setting for reduced power consumption at the expense of performance. 00 = 96x 01 = 64x 10 = Reserved 11 = Reserved DAC Oversample Clock (Select PCLK/2 for higher performance. Select PCLK/4 for lower power consumption.) 1 = DAC input clock = PCLK/2 0 = DAC input clock = PCLK/4 DAI1/DAI2 BCLK Output Frequency When operating in master mode, BSEL1/BSEL2 set the frequency of BCLK. When operating in slave mode, BSEL1/BSEL2 have no effect. Select the lowest BCLK frequency that clocks all data input to the DAC and output by the ADC. 000 = BCLK disabled 001 = 64 x LRCLK 010 = 48 x LRCLK 011 = 128 x LRCLK (invalid for DHF1/DHF2 = 1) 100 = PCLK/2 101 = PCLK/4 110 = PCLK/8 111 = PCLK/16 DAI1/DAI2 Audio Port Selector Selects which port is used by DAI1/DAI2. 00 = None 01 = Port S1 10 = Port S2 11 = Reserved DAI1 Digital Loopthrough Connects the output of the record signal path to the input of the playback path. Data input to DAI1 from an external device is mixed with the recorded audio signal. 0 = Disabled 1 = Enabled DAI1/DAI2 Digital Audio Interface Loopback LBEN1 routes the digital audio input to DAI1 back out on DAI2. LBEN2 routes the digital audio input to DAI2 back out on DAI1. Selecting LBEN2 disables the ADC output data. 0 = Disabled 1 = Enabled DAI1/DAI2 DAC Mono Mix Mixes the left and right digital input to mono and routes the combined signal to the left and right playback paths. The left and right input data is attenuated by 6dB prior to the mono mix. 0 = Disabled 1 = Enabled 5 0x15/0x1D 2 DAC_OSR1/ DAC_OSR2 1 BSEL1/ BSEL2 0 7 SEL1/SEL2 6 5 LTEN1 0x16/0x1E 4 LBEN1/ LBEN2 3 DMONO1/ DMONO2 ���������������������������������������������������������������� Maxim Integrated Products 81 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 10. Digital Audio Interface Registers (continued) REGISTER BIT NAME HIZOFF1/ HIZOFF2 DESCRIPTION Disable DA1/DAI2 Output High-Impedance Mode Normally SDOUT is set high impedance between data words. Set HIZOFF1/HIZOFF2 to force a level on SDOUT at all times. 0 = Disabled 1 = Enabled DAI1/DAI2 Record Path Output Enable DAI2 outputs data only if LBEN1 = 1. 0 = Disabled 1 = Enabled DAI1/DAI2 Playback Path Input Enable 0 = Disabled 1 = Enabled TDM Left Time Slot Selects which of the four slots is used for left data on DAI1/DAI2. If the same slot is selected for left and right audio, left audio is placed in the slot. 00 = Slot 1 01 = Slot 2 10 = Slot 3 11 = Slot 4 TDM Right Time Slot Selects which of the four slots is used for right data on DAI1/DAI2. If the same slot is selected for left and right audio, left audio is placed in the slot. 00 = Slot 1 01 = Slot 2 10 = Slot 3 11 = Slot 4 TDM Slot Delay Adds 1 BCLK cycle delay to the data in the specified TDM slot. 1xxx = Slot 4 delayed x1xx = Slot 3 delayed xx1x = Slot 2 delayed xxx1 = Slot 1 delayed 2 0x16/0x1E 1 SDOEN1/ SDOEN2 0 SDIEN1/ SDIEN2 7 SLOTL1/ SLOTL2 6 5 0x17/0x1F 4 3 2 1 0 SLOTDLY1/ SLOTDLY2 SLOTR1/ SLOTR2 ���������������������������������������������������������������� Maxim Integrated Products 82 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology WCI_ = 0, BCI_ = 0, DLY_ = 0, TDM_ = 0, FSW_ = 0, WS_ = 0, HIZOFF_ = 1, SLOTL_ = 0, SLOTR_ = 0 LRCLK SDOUT BCLK SDIN D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LEFT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 RIGHT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 WCI_ = 1, BCI_ = 0, DLY_ = 0, TDM_ = 0, FSW_ = 0, WS_ = 0, HIZOFF_ = 1, SLOTL_ = 0, SLOTR_ = 0 LRCLK SDOUT BCLK SDIN D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LEFT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 RIGHT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 WCI_ = 0, BCI_ = 1, DLY_ = 0, TDM_ = 0, FSW_ = 0, WS_ = 0, HIZOFF_ = 1, SLOTL_ = 0, SLOTR_ = 0 LRCLK SDOUT BCLK SDIN D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LEFT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 RIGHT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 WCI_ = 0, BCI_ = 0, DLY_ = 1, TDM_ = 0, FSW_ = 0, WS_ = 0, HIZOFF_ = 1, SLOTL_ = 0, SLOTR_ = 0 LRCLK SDOUT BCLK SDIN D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LEFT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 RIGHT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Figure 16. Non-TDM Data Format Examples ���������������������������������������������������������������� Maxim Integrated Products 83 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology WCI_ = 0, BCI_ = 1, DLY_ = 0, TDM_ = 1, FSW_ = 0, WS_ = 0, HIZOFF_ = 0, SLOTL_ = 0, SLOTR_ = 1 LRCLK SDOUT BCLK SDIN HI-Z L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 HI-Z L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 WCI_ = 0, BCI_ = 1, DLY_ = 0, TDM_ = 1, FSW_ = 1, WS_ = 0, HIZOFF_ = 0, SLOTL_ = 0, SLOTR_ = 1 LRCLK SDOUT BCLK SDIN HI-Z L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 HI-Z L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 WCI_ = 0, BCI_ = 1, DLY_ = 0, TDM_ = 1, FSW_ = 0, WS_ = 0, HIZOFF_ = 1, SLOTL_ = 0, SLOTR_ = 1 LRCLK L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 SDOUT BCLK SDIN L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 WCI_ = 0, BCI_ = 1, DLY_ = 0, TDM_ = 1, FSW_ = 0, WS_ = 0, HIZOFF_ = 0, SLOTL_ = 2, SLOTR_ = 3 LRCLK SDOUT HI-Z L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 HI-Z 32 CYCLES BCLK SDIN L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 WCI_ = 0, BCI_ = 1, DLY_ = 0, TDM_ = 1, FSW_ = 0, WS_ = 0, HIZOFF_ = 0, SLOTL_ = 0, SLOTR_ = 1 LRCLK 16 CYCLES SDOUT BCLK SDIN HI-Z L L L L L L L L R R R R R R R R HI-Z L L L L L L L L R R R 16 CYCLES R R R R R 16 CYCLES HI-Z 16 CYCLES Figure 17. TDM Mode Data Format Examples ���������������������������������������������������������������� Maxim Integrated Products 84 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The digital signal paths in the IC require a master clock (MCLK) between 10MHz and 60MHz to function. The MAX98089 requires an internal clock between 10MHz and 20MHz. A prescaler divides MCLK by 1, 2, or 4 to create the internal clock (PCLK). PCLK is used to clock all portions of the IC. The MAX98089 includes two digital audio signal paths, both capable of supporting any sample rate from 8kHz to 96kHz. Each path is independently configured to allow different sample rates. To accommodate a wide range of system architectures, four main clocking modes are supported: U PLL Mode: When operating in slave mode, enable the PLL to lock onto any LRCLK input. This mode requires the least configuration, but provides the lowest performance. Use this mode to simplify initial setup or when normal mode and exact integer mode cannot be used. Clock Control U Normal Mode: This mode uses a 15-bit clock divider to set the sample rate relative to PCLK. This allows high flexibility in both the PCLK and LRCLK frequencies and can be used in either master or slave mode. U Exact Integer Mode (DAI1 only): In both master and slave modes, common MCLK frequencies (12MHz, 13MHz, 16MHz, and 19.2MHz) can be programmed to operate in exact integer mode for both 8kHz and 16kHz sample rates. In these modes, the MCLK and LRCLK rates are selected by using the FREQ1 bits instead of the NI, and PLL control bits. U DAC Low-Power Mode: This mode bypasses the PLL for reduce power consumptions and uses fixed counters to generate the clocks. The DAI__DAC_LP bits override the other clock settings. Table 11. Clock Control Registers REGISTER BIT 5 0x10 4 PSCLK NAME DESCRIPTION MCLK Prescaler Generates PCLK, which is used by all internal circuitry. 00 = PCLK disabled 01 = 10MHz P MCLK P 20MHz (PCLK = MCLK) 10 = 20MHz P MCLK P 40MHz (PCLK = MCLK/2) 11 = 40MHz P MCLK P 60MHz (PCLK = MCLK/4) DAI1/DAI2 Sample Rate Used by the ALC to correctly set the dual-band crossover frequency and the excursion limiter to set the predefined corner frequencies. VALUE 0x0 0x11/0x19 5 SR1/SR2 0x1 0x2 0x3 0x4 0x5 4 0x6 0x7 SAMPLE RATE (kHz) Reserved 8 11.025 16 22.05 24 32 44.1 VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF SAMPLE RATE (kHz) 48 88.2 96 Reserved Reserved Reserved Reserved Reserved 7 6 ���������������������������������������������������������������� Maxim Integrated Products 85 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 11. Clock Control Registers (continued) REGISTER BIT NAME DESCRIPTION Exact Integer Mode Overrides PLL1 and NI1 and configures a specific PCLK to LRCLK ratio. 3 VALUE 0x0 0x1 0x2 0x11 2 FREQ1 0x3 0x4 0x5 1 0x6 0x7 SAMPLE RATE Disabled Reserved Reserved Reserved Reserved Reserved Reserved Reserved VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF SAMPLE RATE PCLK = 12MHz, LRCLK = 8kHz PCLK = 12MHz, LRCLK = 16kHz PCLK = 13MHz, LRCLK = 8kHz PCLK = 13MHz, LRCLK = 16kHz PCLK = 16MHz, LRCLK = 8kHz PCLK = 16MHz, LRCLK = 16kHz PCLK = 19.2MHz, LRCLK = 8kHz PCLK = 19.2MHz, LRCLK = 16kHz 7 PLL1/PLL2 PLL Mode Enable (Slave Mode Only) PLL1/PLL2 enables a digital PLL that locks on to the externally supplied LRCLK frequency and automatically sets the LRCLK divider (NI1/NI2). 0 = Disabled 1 = Enabled Normal Mode LRCLK Divider When PLL1/PLL2 = 0, the frequency of LRCLK is determined by NI1/NI2. See Table 12 for common NI values. SAMPLE RATE DHF1/DHF2 NI1/NI2 FORMULA 0x12/0x1A 6 5 4 3 2 1 0 7 6 5 4 3 2 1 NI1/ NI2 8kHz P LRCLK P 48kHz 0 NI = 65,536 x 96 x fLRCLK fPCLK 65,536 x 48 x fLRCLK fPCLK 48kHz < LRCLK P 96kHz 1 NI = 0x13/0x1B fLRCLK = LRCLK frequency fPCLK = Prescaled MCLK frequency (PCLK) Rapid Lock Mode Program NI1/NI2 to the nearest valid ratio and set NI1[0]/NI2[0] when PLL1/PLL2 = 1 to enable rapid lock mode. Normally, the PLL automatically calculates and dynamically adjusts NI1/NI2. When rapid lock mode is properly configured, the PLL starting point is much closer to the correct value, thus speeding up lock time. Wait one LRCLK period after programming NI1/NI2 before setting PLL1/PLL2 = 1. 0 NI1[0]/NI2[0] ���������������������������������������������������������������� Maxim Integrated Products 86 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 11. Clock Control Registers (continued) REGISTER BIT 7 NAME DESCRIPTION DAI� DAC Low Power Select. These bits setup the clocks to be generated from fixed counters that bypass the PLL for DAC low power mode. VALUE 6 DAI2_DAC_LP 0x0 0x1 0x2 0x3 3 0x4 2 1 0 DAI1_DAC_LP 0x5 0x6 0x7 SETTING PLL derived clock PCLK = 128 x LRCLK PCLK = 192 x LRCLK PCLK = 256 x LRCLK PCLK = 384 x LRCLK PCLK = 768 x LRCLK PCLK = 1152 x LRCLK PCLK = 1536 x LRCLK FILTER SELECT — Audio 96kHz Audio 96kHz Audio 48kHz Audio 48kHz Voice Voice Voice VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF SETTING PCLK = 2304 x LRCLK Reserved Reserved Reserved Reserved Reserved Reserved Reserved FILTER SELECT Voice — — — — — — — 5 4 0x4F 3 DAC2DITHEN DAI2 DAC Input Dither Enable DAC2DITHEN is recommended to be set when DAI2_DAC_LP = 0000. 0 = Disabled 1 = Enabled DAI1 DAC Input Dither 1 Enable DAC1DITHEN is recommended to be set when DAI1_DAC_LP = 0000. 0 = Disabled 1 = Enabled DAI2 Clock Gen Module Enable CGM1_EN has to be set along with CGM2_EN to enable the clock generation for the DAI2 DAC playback path. 0 = Disabled 1 = Enabled DAI1/Device Clock Gen Module Enable CGM1_EN enables the device clock generation, and needs to be set for DAC playback or ADC record. 0 = Disabled 1 = Enabled 2 DAC1DITHEN 0x50 1 CGM2_EN 0 CGM1_EN ���������������������������������������������������������������� Maxim Integrated Products 87 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 12. Common NI1/NI2 Values LRCLK (kHz) PCLK (MHz) 8 10 11 11.2896 12 12.288 13 16 16.9344 18.432 20 13A9 11E0 116A 1062 1000 0F20 0C4A 0B9C 0AAB 09D5 11.025 1B18 18A2 1800 1694 160D 14D8 10EF 1000 0EB3 0D8C 12 1D7E 1ACF 1A1F 1893 1800 16AF 126F 116A 1000 0EBF 16 2752 23BF 22D4 20C5 2000 1E3F 1893 1738 1555 13A9 DHF1/2 = 0 22.05 3631 3144 3000 2D29 2C1A 29AF 21DE 2000 1D66 1B18 24 3AFB 359F 343F 3127 3000 2D5F 24DD 22D4 2000 1D7E 32 4EA5 477E 45A9 4189 4000 3C7F 3127 2E71 2AAB 2752 44.1 6C61 6287 6000 5A51 5833 535F 43BD 4000 3ACD 3631 48 75F7 6B3E 687D 624E 6000 5ABE 49BA 45A9 4000 3AFB 64 4EA5 477E 45A9 4189 4000 3C7F 3127 2E71 2AAB 2752 DHF1/2 = 1 88.2 6C61 6287 6000 5A51 5833 535F 43BD 4000 3ACD 3631 96 75F7 6B3E 687D 624E 6000 5ABE 49BA 45A9 4000 3AFB Note: Values in bold are exact integers that provide maximum full-scale performance. The sample rate conversion circuit allows for both sample rate conversion and mixing of asynchronous audio data from DAI1 (SDIN1) and DAI2 (SDIN2). The resulting Sample Rate Converter audio can be output through DAI1 to either SDOUTS1 or SDOUTS2. The sample rate converter can be enabled on a per channel basis, allowing for one channel of DAI1 to output microphone data while the other channel is outputting sample rate converted data. DVST: 0dB TO -60dB SIDETONE DSTS MIX DV1G: 0/6/12/18dB + MULTI BAND ALC DVEQ1: 0dB TO -15dB DVEQ2: 0dB TO -15dB AUTOMATIC GAIN CONTROL MODE1 AVFLT ADLEN ADCL AVLG: 0/6/ 12/18dB AVL:0dB TO -15dB SRMIX_ NOISE GATE AUDIO/ VOICE FILTERS 5-BAND PARAMETRIC EQ EQ1EN 5-BAND PARAMETRIC EQ EQ2EN MIX AUDIO/ FILTERS DCB2 MIXDAL DACL DALEN EXCURSION LIMITER AVRG: 0/6/ 12/18dB AVR:0dB TO -15dB DV2: 0dB TO -15dB SAMPLE RATE CONVERTER AUDIO/ VOICE FILTERS MODE1 DVFLT ADCR ADREN DV1: 0dB TO -15dB MIX MIXDAR DACR DAREN Figure 18. Sample Rate Converter ���������������������������������������������������������������� Maxim Integrated Products 88 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 13. Sample Rate Converter Register REGISTER BIT 4 NAME SRMIX_MODE DESCRIPTION Sample Rate Mix Mode. Sets mixing configuration applied to the sample rate converted channel(s). 0 = (DAI1 + DAI2) 1 = (DAI1 + DAI2)/2 Sample Rate Mix Enable. If enabled, mixes data on DAI1 and DAI2. If cleared, SCR data source is DAI2 only. 0 = SRC mix disable 1 = SRC mix enable Sample Rate Converter Enable. Select if the SCR is enabled on a per channel basis. 0 = Sample rate converter disable 1 = Sample rate converter enable 3 0x21 2 1 0 SRMIX_ENL SRMIX_ENR SRC_ENL SRC_ENR Each digital signal path in the IC includes options for defining the path bandwidth (Figure 19). The playback and record paths connected to DAI1 support both voice and music filtering while the playback path connected to DAI2 supports music filtering only. The voice IIR filters provide greater than 70dB stopband attenuation at frequencies above fS/2 to reduce aliasing. Three selectable highpass filters eliminate unwanted lowfrequency signals. Passband Filtering Use music mode when processing high-fidelity audio content. The music FIR filters reduce power consumption and are linear phase to maintain stereo imaging. An optional DC-blocking filter is available to eliminate unwanted DC offset. In music mode, a second set of FIR filters are available to support sample rates greater than 50kHz. The filters can be independently selected for DAI1 and DAI2 and support both the playback and record audio paths. DVST: 0dB TO -60dB SIDETONE DSTS MIX DV1G: 0/6/12/18dB + MULTI BAND ALC DVEQ1: 0dB TO -15dB DVEQ2: 0dB TO -15dB AUTOMATIC GAIN CONTROL MODE1 AVFLT ADLEN ADCL AVLG: 0/6/ 12/18dB AVL:0dB TO -15dB SRMIX_ MODE NOISE GATE AUDIO/ VOICE FILTERS 5-BAND PARAMETRIC EQ EQ1EN 5-BAND PARAMETRIC EQ EQ2EN MIX AUDIO/ FILTERS DCB2 MIXDAL DACL DALEN EXCURSION LIMITER AVRG: 0/6/ 12/18dB AVR:0dB TO -15dB DV2: 0dB TO -15dB SAMPLE RATE CONVERTER AUDIO/ VOICE FILTERS MODE1 DVFLT ADCR ADREN DV1: 0dB TO -15dB MIX MIXDAR DACR DAREN Figure 19. Digital Passband Filtering Block Diagram ���������������������������������������������������������������� Maxim Integrated Products 89 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 14. Passband Filtering Registers REGISTER BIT 7 6 5 AVFLT1 4 0x18 3 DHF1 NAME MODE1 DESCRIPTION DAI1 Passband Filtering Mode 0 = Voice filters 1 = Music filters (recommended for fS > 24kHz) DAI1 ADC Highpass Filter Mode MODE1 0 1 DAI1 High Sample Rate Mode Selects the sample rate range. 0 = 8kHz P LRCLK P 48kHz 1 = 48kHz P LRCLK P 96kHz DAI1 DAC Highpass Filter Mode MODE1 DVFLT1 0 1 DAI2 High Sample Rate Mode Selects the sample rate range. 0 = 8kHz P LRCLK P 48kHz 1 = 48kHz < LRCLK P 96kHz DAI2 DC Blocking Filter Enables a DC-blocking filter on the DAI2 playback audio path. 0 = Disabled 1 = Enabled See Table 15. Select a nonzero value to enable the DCblocking filter. DVFLT1 See Table 15. Select a nonzero value to enable the DC- blocking filter. AVFLT1 2 1 0 3 0x20 0 DHF2 DCB2 ���������������������������������������������������������������� Maxim Integrated Products 90 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 15. Voice Highpass Filters AVFTL/DVFLT VALUE 000 INTENDED SAMPLE RATE N/A 10 0 -10 -20 -30 -40 -50 -60 0 200 400 600 800 1000 FREQUENCY (Hz) FILTER RESPONSE Disabled 001/011 16kHz/8kHz AMPLITUDE (dB) AMPLITUDE (dB) 10 0 -10 -20 -30 -40 -50 -60 0 200 400 600 800 1000 FREQUENCY (Hz) 10 0 -10 -20 -30 -40 -50 LRCLK = 48kHz -60 0 200 400 600 800 1000 FREQUENCY (Hz) 010/100 16kHz/8kHz 101 8kHz to 48kHz 110/111 N/A AMPLITUDE (dB) Reserved ���������������������������������������������������������������� Maxim Integrated Products 91 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The IC playback signal path includes automatic level control (ALC) and a 5-band parametric equalizer (EQ) (Figure 20). The DAI1 and DAI2 playback paths include separate ALCs controlled by a single set of registers. Two completely separate parametric EQs are included for the DAI1 and DAI2 playback paths. Automatic Level Control The automatic level control (ALC) circuit ensures maximum signal amplitude without producing audible clipping. This is accomplished by a variable gain stage that works on a sample by sample basis to increase the gain up to 12dB. A look-ahead circuit determines if the next sample exceeds full scale and reduces the gain so that the sample is exactly full scale. A programmable low signal threshold determines the minimum signal amplitude that is amplified. Select a threshold that prevents the amplification of background noise. When the signal level drops below the low signal threshold, the ALC reduces the gain to 0dB until the signal increases above the threshold. Figure 21 shows an example of ALC input vs. output curves. Playback Path Signal Processing The ALC can optionally be configured in dual-band mode. In this mode, the input signal is filtered into two bands with a 5kHz center frequency. Each band is routed through independent ALCs and then summed together. In multiband mode, both bands use the same parameters. OUTPUT SIGNAL (dBFS) 0 LOW-LEVEL -12 0 THRESHOLD ALC WITH ALCTH ≠ 000 OUTPUT SIGNAL (dBFS) 0 INPUT SIGNAL (dBFS) DV1G: 0/6/12/18dB + MULTI BAND ALC DVEQ1: 0dB TO -15dB 5-BAND PARAMETRIC EQ EQ1EN EXCURSION LIMITER AUDIO/ FILTERS DCB2 DVEQ2: 0dB TO -15dB LOW-LEVEL THRESHOLD OUTPUT SIGNAL (dBFS) DACL DALEN -12 0 INPUT SIGNAL (dBFS) 5-BAND PARAMETRIC EQ EQ2EN MIX MIXDAL ALC WITH ALCTH = 000 0 DV2: 0dB TO -15dB DV1: 0dB TO -15dB AUDIO/ VOICE FILTERS MODE1 DVFLT MIX MIXDAR DACR DAREN LOW-LEVEL THRESHOLD -12 0 INPUT SIGNAL (dBFS) ALC DISABLED Figure 20. Playback Path Signal Processing Block Diagram Figure 21. ALC Input vs. Output Examples ���������������������������������������������������������������� Maxim Integrated Products 92 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 16. Automatic Level Control Registers REGISTER BIT 7 NAME ALCEN DESCRIPTION ALC Enable Enables ALC on both the DAI1 and DAI2 playback paths. 0 = Disabled 1 = Enabled ALC and Excursion Limiter Release Time Sets the release time for both the ALC and Excursion Limiter. See the Excursion Limiter section for Excursion Limiter release times. ALC release time is defined as the time required to adjust the gain from 12dB to 0dB. VALUE 000 001 010 011 100 101 110 111 ALC RELEASE TIME (s) 8 4 2 1 0.5 0.25 Reserved Reserved 6 5 ALCRLS 0x43 4 3 ALCMB Multiband Enable Enables dual-band processing with a 5kHz center frequency. SR1 and SR2 must be configured properly to achieve the correct center frequency for each playback path. 0 = Single-band ALC 1 = Dual-band ALC Low Signal Threshold Selects the minimum signal level to be boosted by the ALC. 000 = -JdB (low-signal threshold disabled) 001 = -12dB 010 = -18dB 011 = -24dB 100 = -30dB 101 = -36dB 110 = -42dB 111 = -48dB 1000 MAXIMUM RECOMMENDED FILTER Q fs = 8kHz 100 fs = 48kHz 10 fs = 96kHz 1 2 1 ALCTH 0 Parametric Equalizer The parametric EQ contains five independent biquad filters with programmable gain, center frequency, and bandwidth. Each biquad filter has a gain range of Q12dB and a center frequency range from 20Hz to 20kHz. Use a filter Q less than that shown in Figure 22 to achieve ideal frequency responses. Setting a higher Q results in nonideal frequency response. The biquad filters are series connected, allowing a total gain of Q60dB. 0.1 100 1000 10,000 100,000 CENTER FREQUENCY (Hz) Figure 22. Maximum Recommended Filter Q vs. Frequency ���������������������������������������������������������������� Maxim Integrated Products 93 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Use the attenuator at the EQ’s input to avoid clipping the signal. The attenuator can be programmed for fixed attenuation or dynamic attenuation based on signal level. If the dynamic EQ clip detection is enabled, the signal level from the EQ is fed back to the attenuator circuit to determine the amount of gain reduction necessary to avoid clipping. The MAX98089 EV kit software includes a graphical interface for generating the EQ coefficients. The coefficients are sample rate dependent and stored in registers 0x52 through 0xB5. Table 17. EQ Registers REGISTER BIT 4 NAME EQCLP1/ EQCLP2 DESCRIPTION DAI1/DAI2 EQ Clip Detection Automatically controls the EQ attenuator to prevent clipping in the EQ. 0 = Enabled 1 = Disabled DAI1/DAI2 EQ Attenuator Provides attenuation to prevent clipping in the EQ when full-scale signals are boosted. DVEQ1/DVEQ2 operates only when EQ1EN/EQ2EN = 1 and EQCLP1/EQCLP2 = 1. VALUE 2 DVEQ1/DVEQ2 1 0x0 0x1 0x2 0x3 0x4 0x5 0 7 6 5 0x49 1 VS2EN VSEN ZDEN EQ2EN DAI2 EQ Enable 0 = Disabled 1 = Enabled DAI1 EQ Enable 0 = Disabled 1 = Enabled See the Click-and-Pop Reduction section. 0x6 0x7 GAIN (dB) 0 -1 -2 -3 -4 -5 -6 -7 VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF GAIN (dB) -8 -9 -10 -11 -12 -13 -14 -15 3 0x30/0x32 0 EQ1EN ���������������������������������������������������������������� Maxim Integrated Products 94 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The IC includes separate digital level control for the DAI1 and DAI2 playback audio paths. The DAI1 signal path Playback Level Control allows boost when MODE1 = 0 and attenuation in any mode. The DAI2 signal path allows attenuation only. DV1G: 0/6/12/18dB + MULTI BAND ALC DVEQ1: 0dB TO -15dB 5-BAND PARAMETRIC EQ EQ1EN EXCURSION LIMITER AUDIO/ FILTERS DCB2 DVEQ2: 0dB TO -15dB 5-BAND PARAMETRIC EQ EQ2EN MIX MIXDAL DACL DALEN DV2: 0dB TO -15dB DV1: 0dB TO -15dB AUDIO/ VOICE FILTERS MODE1 DVFLT MIX MIXDAR DACR DAREN Figure 23. Playback Level Control Block Diagram Table 18. DAC Playback Level Control Register REGISTER BIT 7 NAME DV1M/DV2M DAI1/DAI2 Mute 0 = Disabled 1 = Enabled DAI1 Voice Mode Gain DV1G only applies when MODE1 = 0. 00 = 0dB 01 = 6dB 10 = 12dB 11 = 18dB DAI1/DAI2 Attenuation VALUE 0x0 2 DV1/DV2 1 0x1 0x2 0x3 0x4 0x5 0 0x6 0x7 GAIN (dB) 0 -1 -2 -3 -4 -5 -6 -7 VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF GAIN (dB) -8 -9 -10 -11 -12 -13 -14 -15 DESCRIPTION 5 DV1G 4 0x2F/0x31 3 ���������������������������������������������������������������� Maxim Integrated Products 95 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The IC’s stereo DAC accepts input from two digital audio paths. The DAC mixer routes any audio path to the left and right DACs (Figure 24). DAC Input Mixers DV1G: 0/6/12/18dB + MULTI BAND ALC DVEQ1: 0dB TO -15dB 5-BAND PARAMETRIC EQ EQ1EN EXCURSION LIMITER AUDIO/ FILTERS DCB2 DVEQ2: 0dB TO -15dB 5-BAND PARAMETRIC EQ EQ2EN MIX MIXDAL DACL DALEN DV2: 0dB TO -15dB DV1: 0dB TO -15dB AUDIO/ VOICE FILTERS MODE1 DVFLT MIX MIXDAR DACR DAREN Figure 24. DAC Input Mixer Block Diagram Table 19. DAC Input Mixer Register REGISTER BIT 7 6 5 0x22 4 3 2 1 0 MIXDAR MIXDAL NAME Left DAC Input Mixer 1xxx = DAI1 left channel x1xx = DAI1 right channel xx1x = DAI2 left channel xxx1 = DAI2 right channel Right DAC Input Mixer 1xxx = DAI1 left channel x1xx = DAI1 right channel xx1x = DAI2 left channel xxx1 = DAI2 right channel DESCRIPTION ���������������������������������������������������������������� Maxim Integrated Products 96 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The IC includes a single differential receiver amplifier. The receiver amplifier is designed to drive a 32I earpiece speaker. In cases where a single transducer is used for the loudspeaker and receiver, use the SPKBYP switch to route the receiver amplifier output to the left speaker outputs. The receiver amplifier can also be configured as stereo singleended line outputs using the I2C interface. Receiver Amplifier RECVOLL: +8dB TO -62dB MIX 0dB RECLEN MIXRECL RECVOLR: +8dB TO -62dB MIX LINEMODE MIXRECR 0dB RECREN SPKBYP RECBYP RECP/ LOUTL/ RXINP RECN/ LOUTR/ RXINN SPKLP +6dB SPLEN DACL DALEN SPKLN DACR DAREN Figure 25. Receiver Amplifier Block Diagram ���������������������������������������������������������������� Maxim Integrated Products 97 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Receiver Output Mixer The IC’s receiver amplifier accepts input from the stereo DAC, the line inputs (single-ended or differential), and the MIC inputs. Configure the mixer to mix any combination of the available sources. When more than one signal is selected, the mixed signal can be configured to attenuate 6dB, 9dB, or 12dB. Table 20. Receiver Output Mixer Register REGISTER BIT 7 6 5 0x28 4 3 2 1 0 7 6 5 0x29 4 3 2 1 0 7 LINE_MODE MIXRECR MIXRECL NAME DESCRIPTION Left Receiver Output Mixer 1xxxxxxx = Right DAC x1xxxxxx = MIC2 xx1xxxxx = MIC1 xxx1xxxx = INB2 (INBDIFF = 0) or INB2-INB1 (INADIFF = 1) xxxx1xxx = INB1 xxxxx1xx = INA2 (INADIFF = 0) or INA2-INA1 (INADIFF = 1) xxxxxx1x = INA1 xxxxxxx1 = Left DAC Right Receiver Output Mixer 1xxxxxxx = Left DAC x1xxxxxx = MIC2 xx1xxxxx = MIC1 xxx1xxxx = INB2 (INBDIFF = 0) or INB2-INB1 (INBDIFF = 1) xxxx1xxx = INA1 xxxxx1xx = INA2 (INADIFF = 0) or INA2-INA1 (INADIFF = 1) xxxxxx1x = INA1 xxxxxxx1 = Right DAC Receiver Output Mode. Configures receive path output mode between BTL and stereo line output. 0 = BTL 1 = Stereo line output Right Receiver Mixer Gain Select 00 = 0dB 01 = -6dB 10 = -9dB 11 = -12dB Left Receiver Mixer Gain Select 00 = 0dB 01 = -6dB 10 = -9dB 11 = -12dB 3 0x2A 2 1 0 0 MIXRECR _GAIN MIXRECL _GAIN ���������������������������������������������������������������� Maxim Integrated Products 98 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Receiver Output Volume Table 21. Receiver Output Level Register REGISTER BIT 7 4 NAME RECLM/ RECRM Receiver Output Mute 0 = Disabled 1 = Enabled Receiver Output Volume Level VALUE 0x00 3 0x01 0x02 0x03 0x04 0x3B/0x3C 2 0x05 RECVOLL/ RECVOLR 0x06 0x07 0x08 1 0x09 0x0A 0x0B 0x0C 0 0x0D 0x0E 0x0F VOLUME (dB) -62 -58 -54 -50 -46 -42 -38 -35 -32 -29 -26 -23 -20 -17 -14 -12 VALUE 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F VOLUME (dB) -10 -8 -6 -4 -2 0 +1 +2 +3 +4 +5 +6 +6.5 +7 +7.5 +8 DESCRIPTION ���������������������������������������������������������������� Maxim Integrated Products 99 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The IC integrates a stereo filterless Class D amplifier that offers much higher efficiency than Class AB without the typical disadvantages. The high efficiency of a Class D amplifier is due to the switching operation of the output stage transistors. In a Class D amplifier, the output transistors act as current steering switches and consume negligible additional power. Any power loss associated with the Class D output stage is mostly due to the I2R loss of the MOSFET on-resistance, and quiescent current overhead. Speaker Amplifiers The theoretical best efficiency of a linear amplifier is 78%, however, that efficiency is only exhibited at peak output power. Under normal operating levels (typical music reproduction levels), efficiency falls below 30%, whereas the IC’s Class D amplifier still exhibits 80% efficiency under the same conditions. Traditional Class D amplifiers require the use of external LC filters or shielding to meet EN55022B and FCC electromagnetic-interference (EMI) regulation standards. Maxim’s patented active emissions limiting edge-rate control circuitry reduces EMI emissions, allowing operation without any output filtering in typical applications. SPVOLL: +8dB TO -62dB MIX DACL DALEN MIXSPL +6dB SPLEN POWER/ DISTORTION LIMITER SPKLVDD SPKLP SPKLN SPKLGND SPKRVDD SPKRP DACR DAREN MIX SPVOLR: +8dB TO -62dB +6dB SPREN SPKRN SPKRGND MIXSPR Figure 26. Speaker Amplifier Path Block Diagram ��������������������������������������������������������������� Maxim Integrated Products 100 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Speaker Output Mixers The IC’s speaker amplifiers accept input from the stereo DAC, the line inputs (single-ended ore differential), and the MIC inputs. Configure the mixer to mix any combination of the available sources. When more than one signal is selected, the mixer can be configured to attenuate the signal by 6dB, 9dB or 12dB. Table 22. Speaker Output Mixer Register REGISTER BIT 7 6 5 0x2B 4 3 2 1 0 7 6 5 0x2C 4 3 2 1 0 3 2 0x2D 1 0 MIXSPL _GAIN MIXSPR _GAIN MIXSPR MIXSPL NAME DESCRIPTION Left Speaker Output Mixer 1xxxxxxx = Right DAC x1xxxxxx = MIC2 xx1xxxxx = MIC1 xxx1xxxx = INB2 (INBDIFF = 0) or INB2-INB1 (INBDIFF = 1) xxxx1xxx = INB1 xxxxx1xx = INA2 (INBDIFF = 0) or INA2-INA1 (INADIFF = 1) xxxxxx1x = INA1 xxxxxxx1 = Left DAC Right Speaker Output Mixer 1xxxxxxx = Left DAC x1xxxxxx = MIC2 xx1xxxxx = MIC1 xxx1xxxx = INB2 (INBDIFF = 0) or INB2-INB1 (INBDIFF = 1) xxxx1xxx = INB1 xxxxx1xx = INA2 (INADIFF = 0) or INA2-INA1 (INADIFF = 1) xxxxxx1x = INA1 xxxxxxx1 = Right DAC Right Speaker Mixer Gain Select 00 = 0dB 01 = -6dB 10 = -9dB 11 = -12dB Left Speaker Mixer Gain Select 00 = 0dB 01 = -6dB 10 = -9dB 11 = -12dB ��������������������������������������������������������������� Maxim Integrated Products 101 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Speaker Output Volume Table 23. Speaker Output Level Register REGISTER BIT 7 NAME SPLM/SPRM DESCRIPTION Left/Right Speaker Output Mute 0 = Disabled 1 = Enabled Left/Right Speaker Output Volume Level 4 VALUE 0x00 0x01 0x02 0x03 0x3D/0x3E 3 SPVOLL/SPVOLR 0x04 0x05 0x06 0x07 0x08 2 0x09 0x0A 0x0B 0x0C 1 0x0D 0x0E 0x0F VOLUME (dB) -62 -58 -54 -50 -46 -42 -38 -35 -32 -29 -26 -23 -20 -17 -14 -12 VALUE 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F VOLUME (dB) -10 -8 -6 -4 -2 0 +1 +2 +3 +4 +5 +6 +6.5 +7 +7.5 +8 The IC includes signal processing to improve the sound quality of the speaker output and protect transducers from damage. An excursion limiter dynamically adjusts the highpass corner frequency, while a power limiter and distortion limiter prevent the amplifier from outputting too much distortion or power. The excursion limiter is located in the DSP while the distortion limiter and power limiter control the analog volume control (Figure 28). All three limiters analyze the speaker amplifier’s output signal to determine when to take action. Excursion Limiter The excursion limiter is a dynamic highpass filter that monitors the speaker outputs and increases the highpass corner frequency when the speaker amplifier’s output exceeds a predefined threshold. The filter smoothly Speaker Amplifier Signal Processing transitions between the high and low corner frequency to prevent unwanted artifacts. The filter can operate in four different modes: U Fixed-Frequency Preset Mode. The highpass corner frequency is fixed at the upper corner frequency and does not change with signal level. U Fixed-Frequency Programmable Mode. The highpass corner frequency is fixed to that specified by the programmable biquad filter. U Preset Dynamic Mode. The highpass filter automatically slides between a preset upper and lower corner frequency based on output signal level. U User-Programmable Dynamic Mode. The highpass filter slides between a user-programmed biquad filter on the low side to a predefined corner frequency on the high side. ��������������������������������������������������������������� Maxim Integrated Products 102 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The transfer function for the user-programmable biquad is: b + b1z -1 + b 2z -2 H(z) = 0 1 + a 1z -1 + a 2z -2 The coefficients b0, b1, b2, a1, and a2 are sample rate dependent and stored in registers 0xB4 through 0xC7. Store b0, b1, and b2 as positive numbers. Store a1 and a2 as negated two’s complement numbers. Separate filters can be stored for the DAI1 and DAI2 playback paths. The MAX98089 EV kit software includes a graphic interface for generating the user-programmable biquad coefficients. Note: Only change the excursion limiter settings when the signal path is disabled to prevent undesired artifacts. DV1G: 0/6/12/18dB + MULTI BAND ALC DVEQ1: 0dB TO -15dB 5-BAND PARAMETRIC EQ EQ1EN EXCURSION LIMITER AUDIO/ FILTERS DCB2 DVEQ2: 0dB TO -15dB MIX SPVOLL: +8dB TO -62dB +6dB SPLEN MIXSPL MIX MIXDAL DACL DALEN SPKRP MIX SPVOLR: MIXSPR +8dB TO -62dB AUDIO/ VOICE FILTERS MODE1 DVFLT MIX MIXDAR DACR DAREN +6dB SPREN SPKRGND SPKRN SPKLGND POWER/ DISTORTION LIMITER SPKRVDD SPKLVDD SPKLP SPKLN 5-BAND PARAMETRIC EQ EQ2EN DV2: 0dB TO -15dB DV1: 0dB TO -15dB Figure 27. Speaker Amplifier Signal Processing Block Diagram ��������������������������������������������������������������� Maxim Integrated Products 103 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 24. Excursion Limiter Registers REGISTER BIT 6 NAME DESCRIPTION Excursion Limiter Corner Frequency The excursion limiter has limited sliding range and minimum corner frequencies. Listed below are all the valid filter combinations. LOWER CORNER UPPER CORNER MINIMUM BIQUAD CORDHPUCF DHPLCF FREQUENCY FREQUENCY NER FREQUENCY Excursion limiter disabled — 000 00 400Hz — 001 00 600Hz — 010 00 800Hz 1kHz Programmable using biquad 200Hz 400Hz 400Hz 400Hz DHPLCF 0 Programmable using biquad Programmable using biquad Programmable using biquad Programmable using biquad 600Hz 800Hz 400Hz 600Hz 800Hz 1kHz — — 100Hz — — — 200Hz 300Hz 400Hz 500Hz 011 100 000 001 010 011 001 010 011 100 00 00 11 01 10 10 11 11 11 11 5 DHPUCF 4 0x41 1 6 ALC and Excursion Limiter Release Time Sets the release time for both the ALC and Excursion Limiter. See the Automatic Level Control section for ALC release times. Excursion limiter release time is defined as the time required to slide from the high corner frequency to the low corner frequency. VALUE 000 EXCURSION LIMITER RELEASE TIME (s) 4 2 1 0.5 0.25 0.25 Reserved Reserved 0x43 5 ALCRLS 001 010 011 100 101 110 111 4 3 2 0x42 1 DHPTH 0 Excursion Limiter Threshold Measured at the Class D speaker amplifier outputs. Signals above the threshold use the upper corner frequency. Signals below the threshold use the lower corner frequency. VBAT must correctly reflect the voltage of SPKLVDD to achieve accurate thresholds. 000 = 0.34VP 001 = 0.71VP 010 = 1.30VP 011 = 1.77VP 100 = 2.33VP 101 = 3.25VP 110 = 4.25VP 111 = 4.95VP ��������������������������������������������������������������� Maxim Integrated Products 104 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Power Limiter The IC’s power limiter tracks the continuous power delivered to the loudspeaker and briefly mutes the speaker amplifier output if the speaker is at risk of sustaining permanent damage. Loudspeakers are typically damaged when the voice coil overheats due to extended operation above the rated power. During normal operation, heat generated in the voice coil is transferred to the speaker’s magnet, which transfers heat to the surrounding air. For the voice coil to overheat, both the voice coil and the magnet must overheat. The result is that a loudspeaker can operate above its rated power for a significant time before it heats sufficiently to cause damage. The IC’s power limiter includes user-programmable time constants and power thresholds to match a wide range of loudspeakers. Program the power limiter’s threshold to match the loudspeaker’s rated power handling. This can be determined through measurement or the loudspeaker’s specification. Program time constant 1 to match the voice coil’s thermal time constant. Program time constant 2 to match the magnet’s thermal time constant. The time constants can be determined by plotting the voice coil’s resistance vs. time as power is applied to the speaker. Table 25. Power Limiter Registers REGISTER BIT NAME DESCRIPTION Power Limiter Threshold If the continuous output power from the speaker amplifiers exceeds this threshold, the output is briefly muted to protect the speaker. The threshold is measured in watts assuming an 8I load. VBAT must correctly reflect the voltage of SPKLVDD/SPKRVDD to achieve accurate thresholds. VALUE 6 PWRTH 0x0 0x1 5 0x2 0x3 0x4 0x44 0x5 4 0x6 0x7 2 THRESHOLD (W) Power limiter disabled 0.05 0.06 0.09 0.11 0.13 0.18 0.22 VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF THRESHOLD (W) 0.27 0.35 0.48 0.72 1.00 1.43 1.57 1.80 7 Power Limiter Weighting Factor Determines the balance between time constant 1 and 2 to match the dominance of each time constant in the loudspeaker. VALUE 000 T1 (%) 50 62.5 75 87.5 100 12.5 25 37.5 T2 (%) 50 37.5 25 12.5 0 87.5 75 62.5 1 PWRK 001 010 011 100 101 110 111 0 ��������������������������������������������������������������� Maxim Integrated Products 105 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 25. Power Limiter Registers (continued) REGISTER BIT 7 NAME DESCRIPTION Power Limiter Time Constant 2 Select a value that matches the thermal time constant of the loudspeaker’s magnet. VALUE 6 PWRT2 5 0x0 0x1 0x2 0x3 0x4 0x5 4 0x45 3 0x6 0x7 TIME CONSTANT (min) Disabled 0.50 0.67 0.89 1.19 1.58 2.11 2.81 VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF TIME CONSTANT (min) 3.75 5.00 6.66 8.88 Reserved Reserved Reserved Reserved Power Limiter Time Constant 1 Select a value that matches the thermal time constant of the loudspeaker’s voice coil. VALUE TIME CONSTANT (s) Disabled 0.50 0.67 0.89 1.19 1.58 2.11 2.81 VALUE 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF TIME CONSTANT (s) 3.75 5.00 6.66 8.88 Reserved Reserved Reserved Reserved 2 PWRT1 1 0x0 0x1 0x2 0x3 0x4 0x5 0 0x6 0x7 Distortion Limiter The IC’s distortion limiter ensures that the speaker amplifier’s output does not exceed the programmed THD+N limit. The distortion limiter analyzes the Class D output duty cycle to determine the percentage of the waveform that is clipped. If the distortion exceeds the programmed threshold, the output gain is reduced. ��������������������������������������������������������������� Maxim Integrated Products 106 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 26. Distortion Limiter Registers REGISTER BIT 7 6 NAME Distortion Limit Measured in % THD+N. VALUE 0x0 0x1 5 0x46 4 THDCLP 0x2 0x3 0x4 0x5 0x6 0x7 THD+N LIMIT (%) Limiter disabled 10FH. Typical 8I speakers exhibit series inductances in the 20FH to 100FH range. GSM radios transmit using time-division multiple access (TDMA) with 217Hz intervals. The result is an RF signal with strong amplitude modulation at 217Hz and its harmonics that is easily demodulated by audio amplifiers. The IC is designed specifically to reject RF signals; however, PCB layout has a large impact on the susceptibility of the end product. Filterless Class D Operation In RF applications, improvements to both layout and component selection decrease the IC’s susceptibility to RF noise and prevent RF signals from being demodulated into audible noise. Trace lengths should be kept below 1/4 of the wavelength of the RF frequency of interest. Minimizing the trace lengths prevents them from functioning as antennas and coupling RF signals into the IC. The wavelength (l) in meters is given by: l = c/f where c = 3 x 108 m/s, and f = the RF frequency of interest. Route audio signals on middle layers of the PCB to allow ground planes above and below to shield them from RF interference. Ideally, the top and bottom layers of the PCB should primarily be ground planes to create effective shielding. Additional RF immunity can also be obtained by relying on the self-resonant frequency of capacitors as it exhibits a frequency response similar to a notch filter. Depending on the manufacturer, 10pF to 20pF capacitors typically exhibit self resonance at the RF frequencies of interest. These capacitors, when placed at the input pins, can effectively shunt the RF noise to ground. For these capacitors to be effective, they must have a lowimpedance, low-inductance path to the ground plane. Avoid using microvias to connect to the ground plane whenever possible as these vias do not conduct well at RF frequencies. To ensure proper device initialization and minimal clickand-pop, program the IC’s SHDN = 1 after configuring all registers. Table 38 lists an example startup sequence for the device. To shut down the IC, simply set SHDN = 0. RF Susceptibility Startup/Shutdown Sequencing Table 38. Example Startup Sequence SEQUENCE 1 2 3 4 5 6 7 8 9 10 Ensure SHDN = 0 Configure clocks Configure digital audio interface Configure digital signal processing Load coefficients Configure mixers Configure gain and volume controls Configure miscellaneous functions Enable desired functions Set SHDN = 1 DESCRIPTION 0x51 0x10 to 0x13, 0x19 to 0x1B 0x14 to 0x17, 0x1C to 0x1F 0x18, 0x20, 0x3F to 0x46 0x52 to 0xC9 0x22 to 0x2D 0x2E to 0x3E 0x47 to 0x4B 0x4C, 0x50 0x51 REGISTERS ��������������������������������������������������������������� Maxim Integrated Products 123 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Many configuration options in the ICs can be made while the devices are operating, however, some registers should only be adjusted when the corresponding audio path is disabled. Table 39 lists the registers that are sensitive during operation. Either disable the corresponding audio path or set SHDN = 0 while changing these registers. that removes the DC bias from an incoming analog signal. The AC coupling capacitor allows the amplifier to automatically bias the signal to an optimum DC level. Assuming zero-source impedance, the -3dB point of the highpass filter is given by: 1 f-3dB = 2πRINCIN Choose CIN so that f-3dB is well below the lowest frequency of interest. For best audio quality use capacitors whose dielectrics have low-voltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with highvoltage coefficients, such as ceramics, may result in increased distortion at low frequencies. Charge-Pump Capacitor Selection Use capacitors with an ESR less than 100mI for optimum performance. Low-ESR ceramic capacitors minimize the output resistance of the charge pump. Most surfacemount ceramic capacitors satisfy the ESR requirement. For best performance over the extended temperature range, select capacitors with an X7R dielectric. Component Selection Optional Ferrite Bead Filter In applications where speaker leads exceed 20mm, additional EMI suppression can be achieved by using a filter constructed from a ferrite bead and a capacitor to ground (Figure 42). Use a ferrite bead with low DC resistance, high-frequency (> 600MHz) impedance between 100I and 600I, and rated for at least 1A. The capacitor value varies based on the ferrite bead chosen and the actual speaker lead length. Select a capacitor less than 1nF based on EMI performance. Input Capacitor An input capacitor, CIN, in conjunction with the input impedance of the IC line inputs forms a highpass filter Table 39. Registers That Are Sensitive to Changes During Operation REGISTER 0x10 to 0x13, 0x19 to 0x1B 0x14 to 0x17, 0x1C to 0x1F 0x18, 0x20 0x25 to 0x2D 0x52 to 0xC9 DESCRIPTION Clock Control Registers Digital Audio Interface Configuration Digital Passband Filters Analog Mixers Digital Signal Processing Coefficients SPK_P MAX98089 SPK_N Figure 42. Optional Class D Ferrite Bead Filter ��������������������������������������������������������������� Maxim Integrated Products 124 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Charge-Pump Flying Capacitor The value of the flying capacitor (connected between C1N and C1P) affects the output resistance of the charge pump. A value that is too small degrades the device’s ability to provide sufficient current drive, which leads to a loss of output voltage. Increasing the value of the flying capacitor reduces the charge-pump output resistance to an extent. Above 1FF, the on-resistance of the internal switches and the ESR of external charge- pump capacitors dominate. Charge-Pump Holding Capacitors The holding capacitors (bypassing HPVSS to HPGND and HPVDD to HPGND) value and ESR directly affect the ripple at HPVSS and HPVDD. Increasing the capacitor’s value reduces output ripple. Likewise, decreasing the ESR reduces both ripple and output resistance. Lower capacitance values can be used in systems with low maximum output power levels. See the Output Power vs. Load Resistance graph in the Typical Operating Characteristics section for more information Table 40 shows how to connect the IC’s pins when circuit blocks are unused. Unused Pins Table 40. Unused Pins NAME SPKRP SPKRVDD SPKLVDD SPKLP RECN/RXINN HPVDD C1P HPGND SPKRN SPKRGND SPKLGND SPKLN RECP/RXINP C1N HPL HPVSS SDINS1 LRCLKS1 HPSNS INB2 HPR DVDDS1 SDOUTS1 BCLKS1 JACKSNS CONNECTION Unconnected Always connect Always connect Unconnected Unconnected Unconnected Unconnected AGND Unconnected Always connect Always connect Unconnected Unconnected Unconnected Unconnected Unconnected AGND Unconnected AGND Unconnected Unconnected DVDD Unconnected Unconnected Unconnected NAME INB1 INA2/MICEXTN LRCLKS2 MCLK SDINS2 IRQ MIC1P/DIGMICDATA INA1/MICEXTP DGND BCLKS2 SDA SCL REG REF MIC1N/DIGMICCLK MIC2P SDOUTS2 DVDDS2 DVDD AVDD PVDD AGND MICBIAS MIC2N CONNECTION Unconnected Unconnected Unconnected Always connect AGND Unconnected Unconnected Unconnected Always connect Unconnected Always connect Always connect Always connect Always connect Unconnected Unconnected Unconnected DVDD Always connect Always connect Always connect Always connect Unconnected Unconnected ��������������������������������������������������������������� Maxim Integrated Products 125 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The MAX98089EWY uses a 63-bump WLP package. Figure 43 provides an example of how to connect to all active bumps using 3 layers of the PCB. To ensure uninterrupted ground returns, use layer 2 as a connecting layer between layer 1 and layer 2 and flood the remaining area with ground. Recommended PCB Routing Proper layout and grounding are essential for optimum performance. When designing a PCB for the ICs, partition the circuitry so that the analog sections of the IC are separated from the digital sections. This ensures that the analog audio traces are not routed near digital traces. Use a large continuous ground plane on a dedicated layer of the PCB to minimize loop areas. Connect AGND, DGND, HPGND, SPKLGND, and SPKRGND directly to the ground plane using the shortest trace length possible. Proper grounding improves audio performance, minimizes crosstalk between channels, and prevents any digital noise from coupling into the analog audio signals. Ground the bypass capacitors on MICBIAS, REG, and REF directly to the ground plane with minimum trace length. Also be sure to minimize the path length to AGND. Bypass AVDD directly to AGND. Connect all digital I/O termination to the ground plane with minimum path length to DGND. Bypass DVDD, DVDDS1, and DVDDS2 directly to DGND. Place the capacitor between C1P and C1N as close as possible to the ICs to minimize trace length from C1P to C1N. Inductance and resistance added between C1P and C1N reduce the output power of the headphone amplifier. Bypass HPVDD and HPVSS with a capacitor located close to HPVSS with a short trace length to HPGND. Close decoupling of HPVSS minimizes supply ripple and maximizes output power from the headphone amplifier. Supply Bypassing, Layout, and Grounding LAYER 1 LAYER 2 HPSNS senses ground noise on the headphone jack and adds the same noise to the output audio signal, thereby making the output (headphone output minus ground) noise free. Connect HPSNS to the headphone jack shield to ensure accurate pickup of headphone ground noise. Bypass SPKLVDD and SPKRVDD to SPKLGND and SPKRGND, respectively, with as little trace length as possible. Connect SPKLP, SPKLN, SPKRP, and SPKRN to the stereo speakers using the shortest traces possible. Reducing trace length minimizes radiated EMI. Route SPKLP/SPKLN and SPKRP/SPKRN as differential pairs on the PCB to minimize loop area, thereby the inductance of the circuit. If filter components are used on the speaker outputs, be sure to locate them as close as possible to the IC to ensure maximum effectiveness. Minimize the trace length from any ground-connected passive components to SPKLGND and SPKRGND to further minimize radiated EMI. LAYER 3 Figure 43. Suggested Routing for the MAX98089EWY ��������������������������������������������������������������� Maxim Integrated Products 126 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Route microphone signals from the microphone to the ICs as a differential pair, ensuring that the positive and negative signals follow the same path as closely as possible with equal trace length. When using single-ended microphones or other single-ended audio sources, ground the negative microphone input as close as possible to the audio source and then treat the positive and negative traces as differential pairs. An evaluation kit (EV kit) is available to provide an example layout for the IC. The EV kit allows quick setup of the IC and includes easy-to-use software allowing all internal registers to be controlled. For the latest application details on WLP construction, dimensions, tape carrier information, PCB techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, refer to the Application Note 1891: WaferLevel Packaging (WLP) and Its Applications. Figure 44 shows the dimensions of the WLP balls used on the MAX98089EWY. 0.24mm WLP Applications Information 0.21mm Figure 44. MAX98089EWY WLP Ball Dimensions Ordering Information PART MAX98089EWY+T MAX98089ETN+T TEMP RANGE -40NC to +85NC -40NC to +85NC PIN-PACKAGE 63 WLP 56 TQFN-EP* T = Tape and reel. +Denotes lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. ��������������������������������������������������������������� Maxim Integrated Products 127 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 56 TQFN 63 WLP PACKAGE CODE T5677+1 W633A3+1 OUTLINE NO. 21-0144 21-0462 LAND PATTERN NO. 90-0042 — ��������������������������������������������������������������� Maxim Integrated Products 128 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Package Information (continued) For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. ��������������������������������������������������������������� Maxim Integrated Products 129 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Package Information (continued) For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. ��������������������������������������������������������������� Maxim Integrated Products 130 MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Revision History REVISION NUMBER 0 REVISION DATE 6/11 Initial release DESCRIPTION PAGES CHANGED — Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 131 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.