MAX9939

19-4329; Rev 1; 2/09 SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp General Description The MAX9939 is a general-purpose, differential-input programmable-gain amplifier (PGA) that is ideal for conditioning a variety of wide dynamic range signals such as those found in motor current-sense, medical instrumentation, and sonar data acquisition applications. It features SPI™-programmable differential gains from 0.2V/V to 157V/V, input offset-voltage compensation, and an output amplifier that can be configured either as a high-order active filter or to provide a differential output. The PGA is optimized for high-signal bandwidth and its gain can be programmed to be 0.2V/V, 1V/V, 10V/V, 20V/V, 30V/V, 40V/V, 60V/V, 80V/V, 119V/V, and 157V/V. Precision resistor matching provides extremely low gain tempco and high CMRR. Although the MAX9939 operates from a single supply VCC between 2.9V to 5.5V, it can process signals both above and below ground due to the use of an input level-shifting amplifier stage. Furthermore, its inputs are protected to ±16V, allowing it to withstand fault conditions and signal overranges. The output amplifier is designed for high bandwidth and low-bias currents, making it ideal for use in multiple-feedback active filter topologies that offer much higher Qs and stopband attenuation than Sallen-Key architectures. The MAX9939 draws 3.4mA of quiescent supply current at 5V, and includes a software-programmable shutdown mode that reduces its supply current to only 13µA. The MAX9939 is available in a 10-pin µMAX® package and operates over the -40°C to +125°C automotive temperature range. o Extremely Low Gain Tempco o Integrated Amplifier for R/C Programmable Active Filter o Input Offset-Voltage Compensation o Input Protection to ±16V o 13µA Software Shutdown Mode o -40°C to +125°C Operating Temperature Range o 10-Pin µMAX Package Features o SPI-Programmable Gains: 0.2V/V to 157V/V MAX9939 Ordering Information PART MAX9939AUB+ TEMP RANGE -40°C to +125°C PIN-PACKAGE 10 µMAX +Denotes a lead(Pb)-free/RoHS-compliant package. Applications Sensorless Motor Control Medical Signal Conditioning Sonar and General Purpose Data Acquisition Differential to Single-Ended Conversion Differential-Input, Differential-Output Signal Amplification Sensor Interface and Signal Processing SCLK 1 DIN GND INAINA+ 2 3 4 5 Pin Configuration TOP VIEW + 10 CS 9 VCC OUTA INB OUTB MAX9939 8 7 6 μMAX SPI is a trademark of Motorola, Inc. µMAX is a registered trademark of Maxim Integrated Products, Inc. Functional Diagram appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp MAX9939 ABSOLUTE MAXIMUM RATINGS VCC to GND ..............................................................-0.3V to +6V INB, OUTA, OUTB, SCLK, DIN, CS ............-0.3V to (VCC + 0.3V) INA+, INA- to GND ..................................................-16V to +16V Output Short-Circuit Current Duration........................Continuous Continuous Input Current into Any Terminal.....................±20mA Continuous Power Dissipation (TA = +70°C) 10-Pin µMAX (derate 5.6mW/°C above +70°C) ...........707mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 5V, VGND = 0, VINA+ = VINA-, Gain = 10V/V, ROUTA = ROUTB = 1kΩ to VCC/2, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER PGA CHARACTERISTICS Gain Error Gain Temperature-Coefficient Input Offset Voltage (Note 2) Input Offset-Voltage Drift Input Offset-Voltage Trim Range Input Common-Mode Range VCM Guaranteed by CMRR test (Note 3) -1V ≤ VCM ≤ VCC - 2.2 Common-Mode Rejection Ratio Output Short-Circuit current Input-Voltage Noise Density Gain-Bandwidth Product Slew Rate Settling Time Distortion Max Capacitive Load Output Swing CMRR ISC VN GBW SR tS THD CL(MAX) VOH, VOL Voltage output high = VCC - VOUTA, voltage output low = VOUTA - VGND (Note 4) TA = +25°C TA = TMIN to TMAX 70 To 1%, 2V output step f = 1kHz, VOUTA = 2.5VP-P f = 10kHz, gain = 157V/V Gain = 0.2V/V Gain = 1V/V Gain = 157V/V -VCC/2 ≤ VCM ≤ VCC - 2.2, TA = +25°C -VCC/2 ≤ VCM ≤ VCC - 2.2 -VCC/2 50 50 39 70 54 2.15 279 9 0.45 89 1 25 60 V/µs µs dB nF mV mA nV/√Hz MHz 60 60 dB GE Tc-GE VOS-A With no VOS trim, TA = +25°C With no VOS trim, TA = TMIN to TMAX 10 ±17 VCC - 2.2 TA = +25°C, 0.2V ≤ VOUTA ≤ VCC - 0.2V 0.05 2.2 1.5 0.38 17 9 15 % ppm/°C mV µV/C mV V SYMBOL CONDITIONS MIN TYP MAX UNITS OUTPUT AMPLIFIER CHARACTERISTICS Input Bias Current Input Offset Voltage (Note 2) Output Short-Circuit Current Ib VOS-B ISC 1 1.5 9 15 pA mV mA 2 _______________________________________________________________________________________ SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp ELECTRICAL CHARACTERISTICS (continued) (VCC = 5V, VGND = 0, VINA+ = VINA-, Gain = 10V/V, ROUTA = ROUTB = 1kΩ to VCC/2, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER Unity-Gain Bandwidth Slew Rate Settling Time Input-Voltage Noise Density Distortion Max Capacitive Load Output Swing POWER SUPPLY Supply Voltage Range Power-Supply Rejection Ratio Supply Current Shutdown Supply Current SPI CHARACTERISTICS Input-Voltage Low Input-Voltage High Input Leakage Current Input Capacitance SPI TIMING CHARACTERISTICS SCLK Frequency SCLK Period SCLK Pulse-Width High SCLK Pulse-Width Low CS Fall to SCLK Rise Setup CS Fall to SCLK Rise Hold DIN to SCLK Setup DIN Hold after SCLK SCLK Rise to CS Fall Delay CS Rise to SCLK Rise Hold CS Pulse-Width High fSCLK tCP tCH tCL tCSS tCSH tDS tDH tCS0 tCS1 tCSW (Note 5) 200 80 80 80 20 + (0.5 x tCP) 55 0 20 80 200 5 MHz ns ns ns ns ns ns ns ns ns ns VIL VIH IIN CIN 5 VCC = 5V VCC = 3.3V 2.0 1.65 ±1 0.8 V V µA pF VCC PSRR ICC ISHDN Guaranteed by PSRR 1kΩ between OUTA and INB, 1kΩ between OUTB and INB, measured differentially between OUTA and OUTB OUTA and OUTB unloaded Soft shutdown through SPI 2.9 60 80 3.4 13 6.7 24 5.5 V dB mA µA SYMBOL UGBW SR tS VN THD CL(MAX) VOH, VOL Voltage output high = VCC - VOUTB, voltage output low = VOUTB - VGND f = 1kHz, VOUTA = 2.5VP-P, gain = -1V/V To 1%, 2V output step CONDITIONS MIN TYP 2.2 6.4 0.86 36 90 1 25 60 MAX UNITS MHz V/µs µs nV/√Hz dB nF mV MAX9939 Note 1: Note 2: Note 3: Note 4: Note 5: All devices are 100% production tested at TA = +25°C. Temperature limits are guaranteed by design. The input offset voltage includes the effects of mismatches in the internal VCC/2 resistor dividers. For gain of 0.25V/V, the input common-mode range is -1V to VCC - 2V. The input current of a CMOS device is too low to be accurately measured on an ATE and is typically on the order of 1pA. Parts are functional with fSCLK = 10MHz. _______________________________________________________________________________________ 3 SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp MAX9939 CS tCSS tCSO SCLK tCL tCH tCP tCSH tCSW tCS1 tDS DIN tDH Figure 1. SPI Interface Timing Diagram Typical Operating Characteristics (VCC = 5V, VGND = 0, VIN+ = VIN- = 0, Gain = 10V/V, ROUTA = ROUTB = 1kΩ to VCC/2, TA = +25°C, unless otherwise noted.) PGA GAIN vs. FREQUENCY MAX9939 toc01 PGA GAIN vs. FREQUENCY 1V/V ≤ GAIN ≤ 157V/V RL = 10kΩ to VCC/2 GAIN =30V/V GAIN (dB) MAX9939 toc02 AMPLIFIER B GAIN vs. FREQUENCY RL = 10kΩ to VCC/2 MAX9939 toc03 60 40 20 GAIN (dB) 3 2 1 GAIN (dB) 0 -1 -2 -3 60 40 20 0 -20 -40 -60 -80 0 -20 -40 -60 RL = 10kΩ to VCC/2 -80 0.01 0.1 1 FREQUENCY (MHz) 10 100 GAIN = 160V/V -4 0.01 0.1 1 10 FREQUENCY (MHz) 0.01 0.1 1 FREQUENCY (MHz) 10 100 AMPLIFIER B GAIN vs. FREQUENCY MAX9939 toc04 COMMON-MODE REJECTION RATIO vs. FREQUENCY 1V/V ≤ GAIN ≤ 157V/V -10 -20 CMRR (dB) -30 -40 -50 -60 -70 GAIN ERROR (%) MAX9939 toc05 GAIN ERROR vs. TEMPERATURE MAX9939 toc06 3 2 1 GAIN (dB) 0 -1 -2 -3 -4 RL = 10kΩ to VCC/2 0 0.20 0.15 0.10 0.05 0.01 0.1 1 10 -80 0.001 0 0.01 0.1 1 10 100 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) FREQUENCY (MHz) FREQUENCY (MHz) 4 _______________________________________________________________________________________ SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp Typical Operating Characteristics (continued) (VCC = 5V, VGND = 0, VIN+ = VIN- = 0, Gain = 10V/V, ROUTA = ROUTB = 1kΩ to VCC/2, TA = +25°C, unless otherwise noted.) INPUT VOS vs. TEMPERATURE MAX9939 toc07 MAX9939 INPUT VOS TRIM RESPONSE 3.0 2.5 2.0 1.5 1.0 0.5 MAX9939 toc08 OFFSET (mV) OUTA 10mV/div GAIN = 1V/V 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 1ms/div DIFFERENTIAL PSRR vs. FREQUENCY MAX9939 toc09 TOTAL HARMONIC DISTORTION vs. FREQUENCY 1V/V ≤ GAIN ≤ 157V/V MAX9939 toc10 0 0 -20 DISTORTION (dB) -40 10V/V ≤ GAIN ≤ 157V/V -20 PSRR (dB) -40 GAIN = 157V/V -60 -80 -100 GAIN = 1V/V -120 -60 -80 -100 0.01 0.1 1 10 100 1000 10,000 FREQUENCY (kHz) 0.01 0.1 1 FREQUENCY (kHz) 10 100 NOISE VOLTAGE DENSITY MAX9939 toc11 NOISE VOLTAGE DENSITY AMPLIFIER B NOISE DENSITY (nV/√Hz) MAX9939 toc12 10,000 PGA 10V/V ≤ GAIN ≤ 157V/V NOISE DENSITY (nV/√Hz) 1000 1000 100 100 10 10 100 1000 FREQUENCY (Hz) 10,000 100,000 10 10 100 1000 FREQUENCY (Hz) 10,000 100,000 _______________________________________________________________________________________ 5 SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp MAX9939 Typical Operating Characteristics (continued) (VCC = 5V, VGND = 0, VIN+ = VIN- = 0, Gain = 10V/V, ROUTA = ROUTB = 1kΩ to VCC/2, TA = +25°C, unless otherwise noted.) OUTPUT IMPEDANCE vs. FREQUENCY MAX9939 toc13 1% SETTLING TIME vs. GAIN (PGA) 900 800 SETTLING TIME (ns) 700 600 500 400 300 200 100 VOUT = 2VP-P MAX9939 toc14 100 AMPLIFIER B 10 IMPEDANCE (Ω) 1000 1 0.1 0.01 0.001 0 0.01 0.1 FREQUENCY (MHz) 1 10 0 20 40 60 80 100 120 140 160 GAIN (V/V) RECOVERY FROM INPUT OVERLOAD (PGA, GAIN = 1V/V) MAX9939 toc15 RECOVERY FROM INPUT OVERLOAD (PGA, GAIN = 157V/V) MAX9939 toc16 INA+ - INA2V/div INA+ - INA2mV/div OUTA 1V/div OUTA 1V/div 1μs/div 400ns/div RECOVERY FROM INPUT OVERLOAD (OUTPUT AMPLIFIER) MAX9939 toc17 GAIN ADJUST RESPONSE MAX9939 toc18 IN 2V/div INA+ - INA2mV/div GAIN = 10V/V OUTB 2V/div GAIN = 1V/V GAIN = 40V/V OUTA 1V/div GAIN = 157V/V 1μs/div 200μs/div 6 _______________________________________________________________________________________ SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp MAX9939 Typical Operating Characteristics (continued) (VCC = 5V, VGND = 0, VIN+ = VIN- = 0, Gain = 10V/V, ROUTA = ROUTB = 1kΩ to VCC/2, TA = +25°C, unless otherwise noted.) COMMON-MODE REJECTION RESPONSE MAX9939 toc19 SHUTDOWN CURRENT vs. SUPPLY VOLTAGE MAX9939 toc20 VCM = 1VP-P, 1kHz VDM = 25mVP-P, 10kHz SHUTDOWN CURRENT (μA) INA+ 1V/div INA1V/div 20 16 12 8 OUTA 2V/div GAIN = 157V/V 200μs/div 4 0 2.8 3.2 3.6 4.0 4.4 4.8 5.2 VOLTAGE (V) Pin Description PIN 1 2 3 4 5 6 7 8 9 10 NAME SCLK DIN GND INAINA+ OUTB INB OUTA VCC CS Serial-Clock Input Serial-Data Input. Data is clocked into the serial interface on the rising edge of SCLK. Ground PGA Inverting Input PGA Noninverting Input Buffer Output Buffer Input PGA Output Power Supply. Bypass to GND with 0.1µF and 1µF capacitors. Active-Low Chip-Select Input. Drive CS low to enable the serial interface. Drive CS high to disable the serial interface. FUNCTION Detailed Description The MAX9939 is a general-purpose PGA with input offset trim capability. Its gain and input offset voltage (VOS) are SPI programmable. The device also includes an uncommitted output operational amplifier that can be used as either a high-order active filter or to provide a differential output. The device can be put into shutdown through SPI. The gain of the amplifier is programmable between 0.2V/V and 157V/V. The input offset is programmable between ±17mV and can be used to regain output dynamic range in high gain settings. An input offset-voltage measurement mode enables input offset voltage to be calibrated out in firmware to obtain excellent DC accuracy. The main amplifier accepts a differential input and provides a single-ended output. The relationship between the differential input and singled-ended output is given by the representative equation: VOUTA = VCC/2 + Gain x (VINA+ - VINA-) + Gain x VOS Architecture The MAX9939 features three internal amplifiers as shown in the Functional Diagram. The first amplifier (amplifier LVL) is configured as a differential amplifier for differential to single-ended conversion with an input offset-voltage trim network. It has extremely high 7 _______________________________________________________________________________________ SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp MAX9939 CS SCLK DIN D7 D6 D5 D5 D4 D3 D2 D1 D0 Figure 2. SPI Interface Timing Diagram (CPOL = CPHA = 0) CMRR, gain accuracy, and very low temperature drift due to precise resistor matching. The output of this amplifier is level shifted to VCC/2. This amplifier is followed by a programmable-gain inverting amplifier (amplifier A) with programmable RF and RI resistors whose gain varies between 0.2V/V and 157V/V. The output of this amplifier is biased at VCC/2 and has extremely high gain accuracy and low temperature drift. The MAX9939 has an uncommitted op amp (amplifier B) whose noninverting input is referenced to VCC/2. Its inverting input and output are externally accessible, allowing it to be configured either as an active filter or as a differential output. A robust input ESD protection scheme allows input voltages at INA+ and INA- to reach ±16V without damaging the MAX9939, thus making the part extremely attractive for use in front-ends that can be exposed to high voltages during fault conditions. In addition, its input-voltage range extends down to -VCC/2 (e.g., -2.5V when powered from a 5V single supply) allowing the MAX9939 to translate below ground signals to a 0V to 5V output signal. This feature simplifies interfacing ground-referenced signals with unipolar-input ADCs. of 8 bits (1 byte). Pull CS high after the 8th bit has been clocked in to latch the data and before sending the next byte of instruction. Note that the internal register is not updated if CS is pulled high before the falling edge of the 8th clock pulse. Register Description The MAX9939 consists of three registers: a shift register and two internal registers. The shift register accepts data and transfers it to either of the two internal registers. The two internal registers store data that is used to determine the gain, input offset voltage, and operating modes of the amplifier. The two internal registers are the Input VOS Trim register and Gain register. The format of the 8-bit write to these registers is shown in Tables 1 and 2. Data is sent to the shift register LSB first. SEL: The SEL bit selects which internal register is written to. Set SEL to 0 to write bits D5:D1 to the input VOS trim register. Set SEL to 1 to write D4:D1 to the Gain register (D5 is don’t care when SEL = 1). Table 1. Input VOS Trim Register D7 MSB D6 D5 V4 D4 V3 D3 V2 D2 V1 D1 V0 D0 LSB SEL = 0 SPI-Compatible Serial Interface The MAX9939 has a write-only interface, consisting of three inputs: the clock signal (SCLK), data input (DIN), and chip-select input (CS). The serial interface works with the clock polarity (CPOL) and clock phase (CPHA) both set to 0 (see Figure 1). Initiating a write to the MAX9939 is accomplished by pulling CS low. Data is clocked in on the rising edge of each clock pulse, and is written LSB first. Each write to the MAX9939 consists 8 SHDN MEAS Table 2. Gain Register D7 MSB D6 D5 X D4 G3 D3 G2 D2 G1 D1 G0 D0 LSB SEL = 1 SHDN MEAS X = Don’t care. _______________________________________________________________________________________ SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp SHDN: Set SHDN to 0 for normal operation. Set SHDN to 1 to place the device in a low-power 13µA shutdown mode. In shutdown mode, the outputs OUTA and OUTB are high impedance, however, the SPI decode circuitry is still active. Each instruction requires a write to the SHDN bit. MEAS: The MAX9939 provides a means for measuring its own input offset voltage. When MEAS is set to 1, the INA- input is disconnected from the input signal path and internally shorted to INA+. This architecture thus allows the input common-mode voltage to be compensated at the application-specific input common-mode voltage of interest. The input offset voltage of the PGA is the output offset voltage divided by the programmed gain without any VOS trim (i.e., V3:V0 set to 0): VOS-INHERENT = (VOUTA - VCC/2)/Gain Program VOS to offset VOS-INHERENT. The input VOS also includes the effect of mismatches in the resistordividers. Setting MEAS to 0 switches the inputs back to the signals on INA+ and INA-. Each instruction requires a write to the MEAS bit. Programming Input Offset Voltage (VOS) The input offset voltage is set by the bits V4:V0 in the Input Offset Voltage Trim register. Bit V4 determines the polarity of the offset. Setting V4 to 0 makes the offset positive, while setting V4 to 1 makes the offset negative. Table 4 shows the relationship between V3:V0 and VOS. To determine the effect of VOS at the output of the amplifier for gains other than 1, use the following formula: VOUTA = VCC/2 + Gain x (VOS-INHERENT + VOS) where VOS-INHERENT is the inherent input offset voltage of the amplifier, which can be measured by setting MEAS to 1. MAX9939 Applications Information Use of Output Amplifier as Active Filter The output amplifier can be configured as a multiplefeedback active filter as shown in Figure 3, which traditionally has better stopband attenuation characteristics than Sallen-Key filters. These filters also possess inherently better distortion performance since there are no common-mode induced effects (i.e., the commonmode voltage of the operational amplifier is always fixed at VCC/2 instead of it being signal dependent such as in Sallen-Key filters). Choose external resistors and capacitors to create lowpass, bandpass, or highpass filters. Programming Gain The PGA’s gain is set by the bits G3:G0 in the Gain register. Table 3 shows the relationship between the bits G3:G0 and the amplifier’s gain. The slew rate and small-signal bandwidth (SSBW) of the PGA depend on its gain setting as shown in Table 3. Table 3. Gain G3:G0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 GAIN (V/V) 1 10 20 30 40 60 80 120 157 0.2 (VCC = 5V) 0.25 (VCC = 3.3V) 1 SLEW RATE (V/µs) 2.90 8.99 8.70 12.80 12.50 13.31 12.15 18.53 16.49 2.86 2.90 SMALL-SIGNAL BANDWIDTH (MHz) 2.15 2.40 1.95 3.40 2.15 2.60 1.91 2.30 1.78 1.95 2.15 _______________________________________________________________________________________ 9 SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp MAX9939 Table 4. Input Offset-Voltage Trim INPUT OFFSET VOLTAGE (V4 = 0 TRIMS POSITIVE, V4 = 1 TRIMS NEGATIVE) V3:V0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 VOS (mV) 0 1.3 2.5 3.8 4.9 6.1 7.3 8.4 10.6 11.7 12.7 13.7 14.7 15.7 16.7 17.6 Use of Output Operational Amplifier as TIA CMOS inputs on the output op amp makes it ideal for use as an input transimpedance amplifier (TIA) in certain current-output sensor applications. In such a situation, keep in mind that the inverting input operates at fixed voltage of VCC/2. Use a high-value resistor as a feedback gain element, and use a feedback capacitor in parallel with this resistor if necessary to aid amplifier stability in the presence of high photodiode or cable capacitance. The output of this TIA can be routed to INA+ or INA- for further processing and signal amplification. Power-Supply Bypassing Bypass VCC to GND with a 0.1µF capacitor in parallel with a 1µF low-ESR capacitor placed as close as possible to the MAX9939. Differential-Input, Differential-Output PGA The output amplifier can be configured so that the MAX9939 operates as a differential-input, differentialoutput programmable gain amplifier. As shown in Figure 4, use a 10kΩ resistor between OUTA and INB, and between INB and OUTB. Such a differential-output configuration is ideal for use in low-voltage applications that can benefit from the 2X output voltage dynamic range when compared to single-ended output format. 10 ______________________________________________________________________________________ SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp MAX9939 VCC 0.1μF 1μF VCC MAX9939 VCC 20kΩ 20kΩ VCC/2 20kΩ VCC/2 20kΩ 10kΩ INA+ RI 10kΩ INALVL RF A OUTA 66.5kΩ ASIC INB 121kΩ 4.7nF 10kΩ VCC 220pF 66.5kΩ 1.21kΩ ADC 100nF 20kΩ VCC/2 GAIN INPUT OFFSETVOLTAGE TRIM 20kΩ SHUTDOWN B OUTB SPI REGISTERS SCLK DIN CS GND CS DOUT SCLK Figure 3. Using the MAX9939 Output Amplifier as an Anti-Aliasing Filter (Corner Frequency = 1.3kHz) to Maximize Nyquist Bandwidth ______________________________________________________________________________________ 11 SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp MAX9939 VCC 0.1μF 1μF VCC MAX9939 VCC 20kΩ 20kΩ VCC/2 20kΩ VCC/2 20kΩ 10kΩ INA+ RI 10kΩ INALVL RF A OUTA 10kΩ ASIC INB 10kΩ VCC 10kΩ GAIN INPUT OFFSETVOLTAGE TRIM 20kΩ SHUTDOWN VCC/2 B ADC OUTB SPI REGISTERS SCLK DIN CS 20kΩ GND CS DOUT SCLK Figure 4. Using the MAX9939 as a Differential-Input, Differential-Output PGA Chip Information PROCESS: BiCMOS 12 ______________________________________________________________________________________ SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp Functional Diagram VCC MAX9939 VCC MAX9939 VCC 20kΩ 20kΩ VCC/2 20kΩ VCC/2 20kΩ 10kΩ INA+ RI 10kΩ INALVL RF A OUTA 10kΩ INB VCC GAIN INPUT OFFSETVOLTAGE TRIM 20kΩ SHUTDOWN VCC/2 B OUTB SPI REGISTERS SCLK DIN CS 20kΩ GND ______________________________________________________________________________________ 13 SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp MAX9939 Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 10 µMAX PACKAGE CODE U10+2 DOCUMENT NO. 21-0061 α α 14 ______________________________________________________________________________________ 10LUMAX.EPS SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp Revision History REVISION NUMBER 0 1 REVISION DATE 11/08 2/09 Initial release Corrected gain value in Table 3 DESCRIPTION PAGES CHANGED — 9 MAX9939 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.