19-2765; Rev 3; 8/11
EVALUATION KIT AVAILABLE
MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
General Description
The MAX174/MX574A/MX674A are complete 12-bit analog-to-digital converters (ADCs) that combine high speed, low-power consumption, and on-chip clock and voltage reference. The maximum conversion times are 8µs (MAX174), 15µs (MX674A), and 25µs (MX574A). Maxim’s BiCMOS construction reduces power dissipation 3 times (150mW) over comparable devices. The internal buried zener reference provides low-drift and low-noise performance. External component requirements are limited to only decoupling capacitors and fixed resistors. The versatile analog input structure allows for 0 to +10V or 0 to +20V unipolar or ±5V or ±10V bipolar input ranges with pin strapping. The MAX174/MX574A/MX674A use standard microprocessor interface architectures and can be interfaced to 8-, 12-, and 16-bit wide buses. Three-state data outputs are controlled by CS, CE, and R/C logic inputs.
Ordering Information appears at end of data sheet.
Features
S Complete ADC with Reference and Clock S 12-Bit Resolution and Linearity S No Missing Codes Over Temperature S 150mW Power Dissipation S 8µs (MAX174), 15µs (MX674A), and 25µs (MX574A) Max Conversion Times S Precision Low TC Reference: 10ppm/NC S Monolithic BiCMOS Construction S 150ns Maximum Data Access Time
Applications
Digital Signal Processing High-Accuracy Process Control High-Speed Data Acquisition Electro-Mechanical Systems
Functional Diagram
VL 1 R 2R 9.950kI 5kI
12-BIT DAC AGND 9
DGND 15
VCC 7
VEE 11
BIPOFF 12
10VIN 20VIN 13 14 5kI
REFIN
10
12 SAR 2 3 4
REFOUT
8
+10V REF
MAX174 MX574A MX674A
4 LOW NIBBLE 16 D0 19 D3
4 MIDDLE NIBBLE 20 D4 D7 23
4 HIGH NIBBLE 24 D8 27 D11
CLOCK AND CONTROL LOGIC
12/8 CS A0
28 6
5
STS CE R/C
For related parts and recommended products to use with this part, refer to www.maxim-ic.com/MAX174.related.
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For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
ABSOLUTE MAXIMUM RATINGS
VCC to DGND ..............................................................0 to 16.5V VEE to DGND ...............................................................0 to 16.5V VL to DGND ......................................................................0 to 7V DGND to AGND ................................................................... Q1V Control Inputs to DGND (CE, CS, A0, 12/8, R/C) ........................ -0.3V to (VCC + 0.3V) Digital Output Voltage to DGND (DB11–DB0, STS)..................................... -0.3V to (VL + 0.3V) Analog Inputs to AGND (REFIN, BIPOFF, 10VIN) ........... Q16.5V 20VIN to AGND................................................................... Q24V REFOUT................................... Indefinite short to VCC or AGND Power Dissipation (any package) to +75NC ................. 1000mW Derates above +75NC .............................................. 10mW/NC Operating Temperature Ranges MAX174_C, MX_74AJ/K/L...................................... 0 to +70NC MAX174_E, MX_74AJE/KE/LE ........................ -40NC to +85NC MAX174_M, MX_74AS/T/U............................ -55NC to +125NC Storage Temperature Range............................ -55NC to +160NC Lead Temperature (soldering, 10s) ................................+300NC Soldering Temperature (reflow) PDIP, Wide SO .............................................................+260NC PLCC ............................................................................+245NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—MAX174
(VL = +5V, VEE = +15V or +12V, VEE = -15V or -12V, TA = +25NC, unless otherwise noted.) PARAMETER ACCURACY Resolution RES TA = +25°C Integral Nonlinearity INL MAX174A/B MAX174C MAX174AC/BC TA = TMIN to TMAX MAX174AE/BE/AM/BM MAX174C Differential Nonlinearity Unipolar Offset Error (Note 1) Bipolar Offset Error (Notes 2, 3) Full-Scale Calibration Error (Note 3) TEMPERATURE COEFFICIENTS (Using Internal Reference) (Notes 2, 3, 4) Unipolar Offset Change MAX174A/B MAX174C MAX174AC/BC MAX174CC Bipolar Offset Change MAX174AE/AM MAX174BE/BM MAX174CE/CM ±1 ±2 ±1 ±2 ±1 ±2 ±4 LSB LSB DNL 12 bits, no missing codes over temperature MAX174A/B MAX174C MAX174A MAX174B/C 12 ±1/2 ±1 ±1/2 ±3/4 ±1 ±1 ±1 ±2 ±3 ±4 ±0.25 LSB LSB LSB % LSB Bits SYMBOL CONDITIONS MIN TYP MAX UNITS
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
ELECTRICAL CHARACTERISTICS—MAX174 (continued)
(VL = +5V, VEE = +15V or +12V, VEE = -15V or -12V, TA = +25NC, unless otherwise noted.) PARAMETER SYMBOL MAX174AC MAX174BC MAX174CC MAX174AE Full-Scale Calibration Change MAX174BE MAX174CE MAX174AM MAX174BM MAX174CM INTERNAL REFERENCE Output Voltage Output Current (Note 5) No load MAX174A MAX174B/C 9.98 9.97 10.00 10.00 10.02 10.03 2 V mA CONDITIONS MIN TYP MAX ±2 (10) ±5 (27) ±9 (50) ±7 (19) ±10 (38) ±20 (75) ±5 (12) ±10 (25) ±20 (50) LSB (ppm/°C UNITS
Available for external loads, in addition to REFIN and BIPOFF load
ELECTRICAL CHARACTERISTICS—MX574A, MX674A
(VL = + 5V, VEE = +15V or +12V, VEE = -15V or -12V, TA = +25NC, unless otherwise noted.) PARAMETER ACCURACY Resolution RES TA = +25°C Integral Nonlinearity INL TA = TMIN to TMAX Differential Nonlinearity Unipolar Offset Error (Note 1) Bipolar Offset Error (Notes 2, 3) Full-Scale Calibration Error (Note 3) MX574AK/L/T/U, MX674AK/L/T/U MX574AJ/S, MX674AJ/S MX574AK/L/KE/LE MX674AK/L/KE/LE MX574AT/U, MX674AT/U MX574AJ/S, MX674AJ/S DNL 12 bits, no missing codes over temperature MX574AK/L/T/U, MX674AK/L/T/U MX574AJ/S, MX674AJ/S MX574AL/U, MX674AL/U MX574AJ/K/S/T, MX674AJ/K/S/T MX574AL/U MX574AJ/K/S/T, MX674A MX574AK/L/T/U, MX674AK/L/T/U MX574AJ/S, MX674AJ/S 12 ±1/2 ±1 ±1/2 ±1/2 ±3/4 ±1 ±1 ±1 ±2 ±3 ±4 ±0.125 ±0.25 ±1 ±2 LSB LSB LSB % LSB Bits SYMBOL CONDITIONS MIN TYP MAX UNITS
TEMPERATURE COEFFICIENTS (Using Internal Reference) (Notes 2, 3, 4) Unipolar Offset Change LSB
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
ELECTRICAL CHARACTERISTICS—MX574A, MX674A (continued)
(VL = + 5V, VEE = +15V or +12V, VEE = -15V or -12V, TA = +25NC, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MX574AK/L, MX674AK/L MX574AJ, MX674AJ Bipolar Offset Change MX574AU/LE, MX674AU/LE MX574AT/KE, MX674AT/KE MX574AS/JE, MX674AS/JE MX574AL, MX674AL MX574AK, MX674AK MX574AJ, MX674AJ MX574ALE, MX674ALE Full-Scale Calibration Change MX574AKE, MX674AKE MX574AJE, MX674AJE MX574AU, MX674AU MX574AT, MX674AT MX574AS, MX674AS INTERNAL REFERENCE MX574AL/U Output Voltage No load MX574AJ/K/S/T, MX674AL/U MX674AJ/K/S/T Output Current (Note 5) Available for external loads, in addition to REFIN and BIPOFF load 9.99 9.98 9.97 10.00 10.00 10.00 10.01 10.02 10.03 2 mA V MIN TYP MAX ±1 ±2 ±1 ±2 ±4 ±2 (10) ±5 (27) ±9 (50) ±7 (19) ±10 (38) ±20 (75) ±5 (12) ±10 (25) ±20 (50) LSB (ppm/°C LSB UNITS
ELECTRICAL CHARACTERISTICS—MAX174/MX574/MX674A
(VL = +5V, VCC = +15V or +12V, VEE = -15V or -12V, TA = +25NC, unless otherwise noted.) PARAMETER ANALOG INPUT Bipolar Input Range Unipolar Input Range Input Impedance Using 10V input Using 20V input Using 10V input Using 20V input 10V input 20V input 15V ±1.5V or 12V ±0.6V 5V ±0.5V VIL VIH CS, CE, R/C, A0, 12/8 CS, CE, R/C, A0, 12/8 2.0 MAX174A/B, MX_74AK/L/TU MAX174C, MX_74AJ/S 0 0 3 6 5 10 ±1/8 ±1/8 ±1/8 ±1/8 ±5 ±10 +10 +20 7 14 ±1 ±2 ±1/2 ±1/2 0.8 V V kW SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER-SUPPLY REJECTION (Max Change in Full-Scale Calibration) VCC Only VEE Only VL Only LOGIC INPUTS Input Low Voltage Input High Voltage V V LSB LSB LSB
15V ±1.5V or 12V ±0.6V
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
ELECTRICAL CHARACTERISTICS—MAX174/MX574/MX674A (continued)
(VL = +5V, VCC = +15V or +12V, VEE = -15V or -12V, TA = +25NC, unless otherwise noted.) PARAMETER Input Current Input Capacitance LOGIC OUTPUTS Output Low Voltage Output High Voltage Floating State Leakage Current Floating State Output Capacitance CONVERSION TIME MX574A 12-Bit Cycle tCONV MX674A MAX174 MX574A 8-Bit Cycle POWER REQUIREMENTS VCC Operating Range VL Operating Range VEE Operating Range VCC Supply Current (Note 5) VL Supply Current (Note 5) VEE Supply Current (Note 5) Power Dissipation (Note 5) Note Note Note Note Note 1: 2: 3: 4: 5: ICC IL IEE PD VCC = +15V and VEE = -15V 11.4 4.5 -11.4 3 3 6 150 16.5 5.5 -16.5 5 8 10 265 V V V mA mA mA mW tCONV MX674A MAX174 15 9 6 10 6 4 20 12 7 14 8 5 25 15 8 18 11 6 µs µs VOL VOH ILKG COUT DB11–DB0, STS DB11–DB0, STS DB11–DB0, STS DB11–DB0 ISINK = 1.6mA ISOURCE = 500µA VOUT = 0 to VL 8 4 ±10 0.4 V V µA pF SYMBOL IIN CIN CONDITIONS CS, CE, R/C, A0, 12/8, VIN = 0 to VL CS, CE, R/C, A0, 12/8 7 MIN TYP MAX ±5 UNITS µA pF
Adjustable to zero. With 50ω fixed resistor from REFOUT to BIPOFF. Adjustable to zero. With 50ω fixed resistor from REFOUT to REFIN. Adjustable to zero. Maximum change in specification from TA = +25°C to TMIN or TA = +25°C to TMAX. External load current should not change during a conversion. For Q12V supply operation, REFOUT need not be buffered except when external load in addition to REFIN and BIPOFF inputs have to be driven.
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
TIMING CHARACTERISTICS—MAX174/MX574A/MX674A (Note 6)
(VL = +5V, VCC = +15V or +12V, VEE = -15V or -12V.) PARAMETER SYMBOL CONDITIONS TA = +25°C MIN CONVERT START TIMING—FULL CONTROL MODE STS Delay from CE CE Pulse Width CS to CE Setup CS Low During CE High R/C to CE Setup R/C Low During CE High A0 to CE Setup A0 Valid During CE High Access Time (From CE) Data Valid After CE Low Output Float Delay CS to CE Setup R/C to CE Setup A0 to CE Setup CS Valid After CE Low R/C High After CE Low A0 Valid After CE Low STAND-ALONE MODE Low R/C Pulse Width STS Delay from R/C Data Valid After R/C Low STS Delay After Data Valid High R/C Pulse Width Data Access Time tHRL tDS tHDR MX574A tHS tHRH tDDR CL = 100pF MX674A MAX174 25 300 30 30 150 60 120 50 15 115 40 600 320 140 1000 600 300 200 20 300 30 30 150 150 1000 600 300 50 250 15 300 30 30 200 200 1000 600 400 ns ns ns 50 320 ns ns ns tDSC tHEC tSSC tHSC tSRC tHRC tSAC tHAC tDD tHD tHL tSSR tSRR tSAR tHSR tHRR tHAR 50 0 50 0 0 0 CL = 100pF 25 CL = 50pF 50 50 50 50 50 0 50 60 40 75 50 0 50 0 0 0 120 20 100 50 0 50 0 0 0 100 15 200 50 50 50 50 50 0 50 150 15 120 250 50 50 50 50 50 0 50 200 320 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns TYP MAX TA = -40°C TO +85°C T = -55°C TO +125°C TA = 0°C TO +70° C A UNITS MIN TYP MAX MIN TYP MAX
READ TIMING—FULL CONTROL MODE
Note 6: Timing specifications guaranteed by design. All input control signals specified with tR = tF = 5ns (10% to 90% of +5V) and timed from a voltage level of +1.6V. See loading circuits in Figures 1 and 2.
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
+5V 3kI DN 3kI 100pF DN 100pF DN 3kI 100pF DN 100pF +5V 3kI
HIGH-Z TO LOGIC 1
HIGH-Z TO LOGIC 1
LOGIC 1 TO HIGH - Z
LOGIC 0 TO HIGH - Z
Figure 1. Load Circuit for Access Time Test
Figure 2. Load Circuit for Output Float Delay Test
Pin Configurations
TOP VIEW
+
VL 1 12/8 2 CS 3 A0 4 R/C 5 CE 6 VCC 7 REFOUT 8 AGND 9 REFIN 10 VEE 11 BIPOFF 12 10VIN 13 20VIN 14 28 STS 27 D11 26 D10 25 D9
TOP VIEW
12/8 STS D11 27 4 3 2 1 28 D10 26 25 D9 24 D8 23 D7 22 D6 21 D5 20 D4 19 D3 12 BIPOFF 13 10VIN 14 20VIN 15 DGND 16 D0 17 D1 18 D2 CS A0 VL
MAX174 MX574A MX674A
24 D8 23 D7 22 D6 21 D5 20 D4 19 D3 18 D2 17 D1 16 D0 15 DGND
R/C CE VCC REFOUT AGND
5 6 7 8 9
MAX174 MX574A MX674A
REFIN 10 VEE 11
PLCC DIP/SO
Pin Description
PIN 1 2 3 4 5 NAME VL 12/8 CS A0 R/C Logic Supply, +5V Data Mode Select Input Chip-Select Input. Must be low to select device. Byte Address/Short-Cycle Input. When starting a conversion, controls number of bits converted (low = 12 bits, high = 8 bits). When reading data, if 12/8 = low, enables low byte (A0 = high) or high byte (A0 = low). Read/Convert Input. When high, the device will be in the data-read mode. When low, the device will be in the conversion start mode. FUNCTION
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
Pin Description (continued)
PIN 6 7 8 9 10 11 12 13 14 15 16–27 28 NAME CE VCC REFOUT AGND REFIN VEE BIPOFF 10VIN 20VIN DGND D0–D11 STS +12V or +15V Supply +10V Reference Output Analog Ground Reference Input -12V or -15V Supply Bipolar Offset Input. Connect to REFOUT for bipolar input range. 10V Span Input 20V Span Input Digital Ground Three-State Data Outputs Status Output FUNCTION Chip-Enable Input. Must be high to select device.
Detailed Description
The MAX174/MX574A/MX674A use a successive approximation technique to convert an unknown analog input to a 12-bit digital output code. The control logic provides easy interface to most microprocessors. Most applications require only a few external passive components to perform the analog-to-digital (A/D) function. The internal voltage output DAC is controlled by a successive approximation register (SAR) and has an output impedance of 2.5kω. The analog input is connected to the DAC output with a 5kω resistor for the 10V input and 10kω resistor for the 20V input. The comparator is essentially a zero-crossing detector, and its output is fed back to the SAR input. The SAR is set to half-scale as soon as a conversion starts. The analog input is compared to 1/2 of the full-scale voltage. The bit is kept if the analog input is greater than halfscale or dropped if smaller. The next bit, bit 10, is then set with the DAC output either at 1/4 scale, if the most significant bit (MSB) is dropped, or 3/4 scale if the MSB is kept. The conversion continues in this manner until the least significant bit (LSB) is tried. At the end of the conversion, the SAR output is latched into the output buffers. CE, CS, and R/C control the operation of the MAX174/ MX574A/MX674A. While both CE and CS are asserted,
Converter Operation
the state of R/C selects whether a conversion (R/C = 0) or a data read (R/C = 1) is in progress. The register control inputs, 12/8 and A0, select the data format and conversion length. A0 is usually tied to the LSB of the address bus. To perform a full 12-bit conversion, set A0 low during a convert start. For a shorter 8-bit conversion, A0 must be high during a convert start. During a data read, A0 also selects whether the threestate buffers contain the 8 MSBs (A0 = 0) or the 4 LSBs (A0 = 1) of the digital result. The 4 LSBs are followed by 4 trailing 0s. Output data is formatted according to the 12/8 pin. If this input is low, the output will be a word broken into two 8-bit bytes. This allows direct interlace to 8-bit buses without the need for external three-state buffers. If 12/8 is high, the output will be one 12-bit word. A0 can change state while a data-read operation is in effect. To begin a conversion, the microprocessor must write to the ADC address. Then, since a conversion usually takes longer than a single clock cycle, the microprocessor must wait for the ADC to complete the conversion. Valid data will be made available only at the end of the conversion, which is indicated by STS. STS can be ether polled or used to generate an interrupt upon completion. Or, the microprocessor can be kept idle by inserting the appropriate number of No Operation (NOP) instructions between the conversion-start and data-read commands.
Output Data Format
Digital Interface
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
BIPOFF REFIN 5kI 2R* -50I R*
DAC 2.5kI
20VIN
10VIN
9.950kI 5kI
REFIN 2
1.6kI
SAR
Figure 3. Analog Equivalent Circuit
Table 1. Truth Table
CE 0 X 1 1 1 1 1 CS X 1 0 0 0 0 0 R/C X X 0 0 1 1 1 12/8 X X X X 1 0 0 A0 X X 0 1 X 0 1 None None Initiate 12-bit conversion Initiate 12-bit conversion Enable 12-bit conversion Enable 8 MSBs Enable 4 LSBs + 4 trailing 0s OPERATION
Table 2. MAX174/MX574A/MX674A Data Format for 8-Bit Bus
D7 High Byte (A0 = 0) Low Byte (A0 = 1) MSB D3 D6 D10 D2 D5 D9 D1 D4 D8 D0 D3 D7 0 D2 D6 0 D1 D5 0 D0 D4 0
After the conversion is completed, data can be obtained by the microprocessor. The ADCs have the required logic for 8-, 12-, and 16-bit bus interfacing, which is determined by the 12/8 input. If 12/8 is high, the ADCs are configured for a 16-bit bus. Data lines D0–D11 may be connected to the bus as either the 12 MSBs or the 12 LSBs. The other 4 bits must be masked out in software. For 8-bit bus operation, 12/8 is set low. The format is left justified, and the even address, A0 low, contains the 8 MSBs. The odd address, A0 high, contains the 4 LSBs, which is followed by 4 trailing 0s. There is no need to use a software mask when the ADCs are connected to an 8-bit bus. Note that the output cannot be forced to a right-justified format by rearranging the data lines on the 8-bit bus interface.
27 (MSB) 26 (D10) 25 (D9) 24 (D8)
D7 D6 D5 D4 D3 D2 D1 D0 DATA BUS
MAX174 MX574A MX674A
23 (D7) 22 (D6) 21 (D5) 20 (D4) 19 (D3) 18 (D2) 17 (D1) 16 (LSB)
HARDWIRING FOR 8-BIT DATA BUSES
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
Timing and Control
Convert Start Timing—Full Control Mode R/C must be low before asserting both CE and CS. If it is high, a brief read operation occurs possibly resulting in system bus contention. To initiate a conversion, use either CE or CS. CE is recommended since it is shorter by one propagation delay than CS and is the faster input of the two. CE is used to begin the conversion in Figure 4. The STS output is high during the conversion indicating the ADC is busy. During this period, additional convert start commands will be ignored, so that the conversion cannot be prematurely terminated or restarted. However, if the state of A0 is changed after the beginning of the conversion, any additional start conversion transitions will latch the new state of A0, possibly resulting in an incorrect conversion length (8 bits vs. 12 bits) for that conversion. Figure 5 illustrates the read-cycle timing. While reading data, access time is measured from when CE and R/C are both high. Access time is extended 10ns if CS is used to initiate a read.
Read Timing—Full Control Mode
tHEC
CE tSSC CS
CE tHSC tSSR CS tHRC tSRC R/C tHAC tSAC A0 tSAR tHAR tSRR tHRR tHSR
R/C
A0 tDSC tC STS STS D0–D11 D0–D11 HIGH IMPEDANCE HIGH IMPEDANCE tDD tHD,tHL
Figure 4. Convert Start Timing
Figure 5. Read Timing
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
For systems which do not use or require full bus interfacing, the MAX174/MX574A/MX674A can be operated in a stand-alone mode directly linked through dedicated input ports. When configured in the stand-alone mode, conversion is controlled by R/C. In addition, CS and A0 are wired low; CE and 12/8 are wired high. To enable the three-state buffers, set R/C low. A conversion starts when R/C is set high. This allows either a high- or a low-pulse control signal. Shown in Figure 6 is the operation with a low pulse. In this mode, the outputs, in response to the falling edge of R/C, are forced into the high-impedance state and return to valid logic-levels after the conversion is complete. The STS output goes high following the R/C falling edge and returns low when the conversion is complete. A high-pulse conversion initiation is illustrated in Figure 7. When R/C is high, the data lines are enabled. The next conversion starts with the falling edge of R/C. The data lines return and remain in high impedance state until another R/C high pulse.
Stand-Alone Operation
tHRL R/C tDS tC
STS tHDR D0–11 HIGH IMPEDANCE tHS
Figure 6. Low Pulse for R//C in Stand-Alone Mode
tHRH R/C tDS
Analog Considerations
Application Hints
Physical Layout For best system performance, PCBs should be used for the MAX174/MX574A/MX674A. Wirewrap boards are not recommended. The layout of the board should ensure that digital and analog signal lines are kept separated from each other as much as possible. Care should be taken not to run analog and digital lines parallel to each other or digital lines underneath the MAX174/MX574A/ MX674A. Grounding The recommended power-supply grounding practice is shown in Figure 8. The ground reference point for the onchip reference is AGND. It should be connected directly to the analog reference point of the system. The analog and digital grounds should be connected together at the package in order to gain all of the accuracy possible from the MAX174/MX574A/MX674A in high digital noise environments. In situations permitting, they can be connected to the most accessible ground-reference point. The preference is analog power return.
STS tDDR D0–11 tHDR HIGH IMPEDANCE
Figure 7. High Pulse for R//C in Stand-Alone Mode
ANALOG SUPPLY -15V GND +15V
DIGITAL SUPPLY +5V GND
VEE
GND S/H AND ANALOG CIRCUITRY
VCC
VEE
AGND
VCC VL
DGND
+5V
DGND
MAX174 MX574A MX674A
DIGITAL CIRCUITRY
Figure 8. Power-Supply Grounding Practice
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
The MAX174/MX574A/MX674A power supplies must be filtered, well regulated, and free from high-frequency noise, or unstable output codes will result. Unless great care is taken in filtering any switching spikes present in the output, switching power supplies is not suggested for applications requiring 12-bit resolution. Take note that a few millivolts of noise converts to several error counts in a 12-bit ADC. All power-supply pins should use supply decoupling capacitors connected with short lead length to the pins, as shown in Figure 9. The VCC and VEE pins should be decoupled directly to AGND. A 4.7µF tantalum type in parallel with a 0 1µF disc ceramic type is a suitable decoupling. The MAX174/MX574A/MX674A have an internal buried zener reference that provides a 10V, low-noise and lowtemperature drift output. An external reference voltage can also be used for the ADC. When using ±15V supplies, the internal reference can source up to 2mA in addition to the BIPOFF and REFIN inputs over the entire operating temperature range. With ±12V supplies, the reference can drive the BIPOFF and REFIN inputs over temperature, but it CANNOT drive an additional load. Driving the Analog Input The input leads to AGND and 10VIN or 20VIN should be as short as possible to minimize noise pick up. If long leads are needed, use shielded cables.
Power-Supply Bypassing
When using the 20VIN as the analog input, load capacitance on the 10VIN pin must be minimized. Especially on the faster MAX174, leave the 10VIN pin open to minimize capacitance and to prevent linearity errors caused by inadequate settling time. The amplifier driving the analog input must have low enough DC output impedance for low full-scale error. Furthermore, low AC output impedance is also required since the analog input current is modulated at the clock rate during the conversion. The output impedance of an amplifier is the open-loop output impedance divided by the loop gain at the frequency of interest. MX574A and MX674A—The approximate internal clock rate is 600kHz and 1MHz, respectively, and amplifiers like the MAX400 can be used to drive the input. MAX174—The internal clock rate is 2MHz and faster amplifiers like the OP-27, AD711, or OP-42 are required. The analog input to the ADC must be stable to within 1/2 LSB during the entire conversion for specified 12-bit accuracy. This limits the input signal bandwidth to a couple of hertz for sinusoidal inputs even with the faster MAX174. For higher bandwidth signals, a track-and-hold amplifier should be used. The STS output may be used to provide the Hold signal to the track-and-hold amplifier. However, since the A/D’s DAC is switched at approximately the same time as the conversion is initiated, the switching transients at the output of the T/H caused by the DAC switching may result in code dependent errors. It is recommended that the Hold signal to the T/H amplifier precede a conversion or be coincident with the conversion start. The first bit decision by the A/D is made approximately 1.5 clock cycles after the start of the conversion. This is 2.5µs, 1.5µs, and 0.8µs for the MX574A, MX674A, and MAX174, respectively. The T/H hold settling time must be less than this time. For the MX574A and MX674A, the AD585 sample-and-hold is recommended (Figure 10). For the MAX174, a faster T/H amplifier, like the HA5320 or HA5330, should be used (Figure 11). The MAX174/MX574A/MX674A input range can be set using pin strapping. Table 3 shows the possible input ranges and ideal transition voltages. End-point errors can be adjusted in all ranges.
Internal Reference
Track-and-Hold Interface
+5V C4 DIGITAL GROUND RECOMMENDED +12V/15V C5 ANALOG GROUND C6 -12V/15V C3 C2 C1
VL
DGND
VCC
MAX174 MX574A MX674A
AGND
VEE
Input Configurations
C1, C2, C4 – 0.1µF CERAMIC C4, C5, C6 – 4.7µF
Figure 9. Power-Supply Bypassing
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
Table 3. Input Ranges and Ideal Digital Output Codes
ANALOG INPUT VOLTAGE (V) 0 to +10V +10.0000 +9.9963 +5.0012 +4.9988 +4.9963 +0.0012 0.0000 Note Note Note Note 7: 8: 9: 10: For For For For 0 to +20V +20.0000 +19.9927 +10.0024 +9.9976 +9.9927 +0.0024 0.0000 ±5V +5.0000 +4.9963 +0.0012 -0.0012 -0.0037 -4.9988 -5.0000 ±10V +10.0000 +9.9927 +0.0024 -0.0024 -0.0073 -9.9976 -10.0000 DIGITAL OUTPUT MSB LSB 1111 1111 1111 1111 1111 1110* 1000 0000 0000* 0111 1111 1111* 0111 1111 1110* 0000 0000 0000* 0000 0000 0000
unipolar input ranges, output coding is straight binary. bipolar input ranges, output coding is offset binary. 0 to + 10V or ±5V ranges, 1 LSB = 2.44mV. 0 to +20V or ±10V ranges, 1 LSB = 4.88mV.
*The digital outputs will be flickering between the Indicated code and the indicated code plus one.
+15V 4.7µF 0.1µF
+VS
HOLD
STS
CONTROL INPUTS D0 –11
AD585* LREF
HOLD VOUT -VIN 50I +VIN REFOUT 50I GND REFIN AGND DGND VL 0.1µF 20VIN 10VIN
MX574A* MX674A
VCC 0.1µF +15V 4.7µF
-15V 4.7µF 0.1µF
-VS
BIPOFF VEE 0.1µF -15V 4.7µF
ANALOG INPUT
+5V 4.7µF
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 10. MX574/MX674A to AD585 Sample-and-Hold Interface
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
+15V 4.7µF 0.1µF +VS S/H STS CONTROL INPUTS D0 –11 20VIN VOUT -VIN 50I +VIN ANALOG INPUT 50I REFIN AGND DGND VL 0.1µF +5V 4.7µF REFOUT GND 10VIN
HA5320* MAX174*
VCC 0.1µF
+15V 4.7µF
-15V 4.7µF 0.1µF
-VS
BIPOFF VEE 0.1µF -15V 4.7µF
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 11. MAX174 to HA5320 Sample-and-Hold Interface
The unipolar transfer function and input connections are shown in Figures 12 and 13. Because all internal resistors of the MAX174/MX574A/ MX674A are trimmed for absolute calibration, additional trimming is not necessary for most applications. The absolute accuracy for each grade is given in the specification tables. If the offset trim is not needed, BIPOFF can be tied directly to AGND. The two resistors and trimmer for BIPOFF can then be discarded. A 50ω ±1% metal film resistor should be attached between REFOUT and REFIN. For a 0 to +10V input range, the analog input is connected between AGND and 10VIN. For a 0 to +20V input range, the analog input is connected between AGND and 20VIN. These ADCs can easily handle an input signal beyond the supplies. If full-scale trim is not needed, the gain trimmer, R2, should be swapped with a 50ω resistor. Should a 10.24V input range be selected, a 200ω trimmer should be inserted in series with 10VIN. For a fullscale input range of 20.48V, use a 500ω trimmer in series with 20VIN. The nominal input impedance into 10VIN is 5kω and 10kω for 20VIN.
Unipolar Input Operation
In applications where the offset and full-scale range have to be adjusted, use the circuit shown in Figure 12. The offset should be adjusted first. Apply 1/2 LSB at the analog input and adjust R1 until the digital output code flickers between 0000 0000 0000 and 0000 0000 0001. To adjust the full-scale range, apply FS - 3/2 LSB at the analog input and adjust R2 until the output code changes between 1111 1111 1110 and 1111 1111 1111. The bipolar transfer function is shown in Figure 14, and input connections are shown in Figure 15. One or both of the trimmers can be exchanged with a 50ω ±1% fixed resistor if the offset and gain specifications suffice. To begin bipolar calibration, a signal 1/2 LSB above negative full-scale is applied. R1 is trimmed until the digital output flickers between 0000 0000 0000 and 0000 0000 0001. Next, a signal 3/2 LSB below positive full scale is applied. Then, R2 is trimmed until the output flickers between 1111 1111 1110 and 1111 1111 1111.
Offset and Full-Scale Adjustment
Bipolar Input Operation
Offset and Full-Scale Adjustment
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
OUTPUT CODE FS = 4069 LSBs 1111 1111 1111 OUTPUT CODE 1111 1111 1111 1111 1111 1110 1111 1111 1101 0000 0000 0011 0000 0000 0010 0000 0000 0001 0000 0000 0000 0 1 2 3 FS-1 FS 0000 0000 0011 0000 0000 0010 0000 0000 0001 0000 0000 0000 FS 2 FS +2 2 -2 -1 0 FS 1 FS 2 2 2 FS 1 2 FULL-SCALE TRANSITION FS = 4069 LSBs 1111 1111 1110 1111 1111 1101 1000 0000 0001 1000 0000 0000 0111 1111 1111 0111 1111 1110
FS +1 2
ANALOG INPUT VOLTAGE IN LSBs
Figure 12. Ideal Unipolar Transfer Function
Figure 14. Ideal Bipolar Transfer Function
GAIN REFOUT +12V TO +15V OFFSET R1 100kI -12V TO -15V 0 TO +10V 0 TO +20V 10VIN 20VIN AGND 100kI BIPOFF 100I R2 100I REFIN
MAX174* MX574A MX674A
GAIN REFIN R2 100I REFOUT
MAX174* MX574A MX674A
BIPOFF R1 100I OFFSET
ANALOG INPUTS
ANALOG INPUTS
Q5V Q10V
10VIN 20VIN AGND
*ADDITIONAL PINS OMITTED FOR CLARITY
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 13. Unipolar Input Connections
Figure 15. Bipolar Input Connections
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
Ordering Information
PART PINPACKAGE LINEARITY (LSB) TEMPCO (ppm/NC) PART PINPACKAGE 28 CERDIP* 28 CERDIP* 28 CERDIP* 28 Ceramic SB 28 Ceramic SB 28 Ceramic SB LINEARITY (LSB) 1 ¾ ¾ 1 ¾ ¾ TEMPCO (ppm/NC) 50 25 12 50 25 12
8µs Maximum Conversion Time TEMP RANGE: 0NC to +70NC MAX174ACPI+ MAX174BCPI+ MAX174CCPI+ MAX174ACWI+ MAX174BCWI+ MAX174CCWI+ MAX174BC/D MAX174AEPI+ MAX174BEPI+ MAX174CEPI+ MAX174AEWI+ MAX174BEWI+ MAX174CEWI+ MAX174AMJI MAX174BMJI MAX174CMJ 28 Plastic DIP 28 Plastic DIP 28 Plastic DIP 28 Wide SO 28 Wide SO 28 Wide SO Dice* 28 Plastic DIP 28 Plastic DIP 28 Plastic DIP 28 Wide SO 28 Wide SO 28 Wide SO 28 CERDIP 28 CERDIP 28 CERDIP ½ ½ 1 ½ ½ 1 1/2 ½ ½ 1 ½ ½ 1 ¾ ¾ 1/21 10 27 50 10 27 50 — 19 38 75 19 38 75 12 25 50
TEMP RANGE: -55NC to +125NC MX674ASQ MX674ATQ MX674AUQ MX674ASD MX674ATD MX674AUD
25µs Maximum Conversion Time TEMP RANGE: 0NC to +70NC MX574AJN+ MX574AKN+ MX574ALN+ MX574AJCWI+ MX574AKCWI+ MX574ALCWI+ MX574AJP+ MX574AKP+ MX574ALP+ MX574AK/D MX574AJEPI+ MX574AKEPI+ 28 Plastic DIP 28 Plastic DIP 28 Plastic DIP 28 Wide SO 28 Wide SO 28 Wide SO 28 PLCC 28 PLCC 28 PLCC Dice* 28 Plastic DIP 28 Plastic DIP 28 Plastic DIP 28 Wide SO 28 Wide SO 28 Wide SO 28 CERDIP* 28 CERDIP* 28 CERDIP* 28 Ceramic SB 28 Ceramic SB 28 Ceramic SB 1 ½ ½ 1 ½ ½ 1 ½ ½ ½ 1 ½ ½ 1 ½ ½ 1 ¾ ¾ 1 ¾ ¾ 50 27 10 50 27 10 50 27 10 — 75 38 19 75 38 19 50 25 12 50 25 12
TEMP RANGE: -40NC to +85NC
TEMP RANGE: -55NC to +125NC
TEMP RANGE: -40NC to +85NC
15µs Maximum Conversion Time TEMP RANGE: 0NC to +70NC MX674AJN+ MX674AKN+ MX674ALN+ MX674AJCWI+ MX674AKCWI+ MX674ALCWI+ MX674AK/D MX674AJEPI+ MX674AKEPI+ MX674ALEPI+ MX674AJEWI+ MX674AKEWI+ MX674ALEWI+ 28 Plastic DIP 28 Plastic DIP 28 Plastic DIP 28 Wide SO 28 Wide SO 28 Wide SO Dice* 28 Plastic DIP 28 Plastic DIP 28 Plastic DIP 28 Wide SO 28 Wide SO 28 Wide SO 1 ½ ½ 1 ½ ½ ½ 1 ½ ½ 1 ½ ½ 50 27 10 50 27 10 — 75 38 19 75 38 19
MX574ALEPI+ MX574AJEWI+ MX574AKEWI+ MX574ALEWI+ MX574ASQ MX574ATQ MX574AUQ MX574ASD MX574ATD MX574AUD
TEMP RANGE: -55NC to +125NC
TEMP RANGE: -40NC to +85NC
+Denotes a lead(Pb)-free/RoHS-compliant package. *Maxim reserves the right to ship Ceramic SB in lieu of CERDIP packages. **Consult factory for dice specifications.
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 28 PDIP 28 PLCC 28 Wide SO PACKAGE CODE P28+2 Q28+3 W28+2 OUTLINE NO. 21-0044 21-0049 21-0042 LAND PATTERN NO. — 90-0235 90-0109
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MAX174/MX574A/MX674A Industry-Standard, Complete 12-Bit ADCs
Revision History
REVISION NUMBER 0 1 REVISION DATE 3/90 8/11 Initial release Updated the Electrical Characteristics and Ordering Information. Added Revision History. DESCRIPTION PAGES CHANGED — 2–4
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
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