MXD1210CSA

19-0154; Rev 1; 3/96 Nonvolatile RAM Controller _______________General Description The MXD1210 nonvolatile RAM controller is a very lowpower CMOS circuit that converts standard (volatile) CMOS RAM into nonvolatile memory. It also continually monitors the power supply to provide RAM write protection when power to the RAM is in a marginal (out-oftolerance) condition. When the power supply begins to fail, the RAM is write protected, and the device switches to battery-backup mode. ____________________________Features o Battery Backup o Memory Write Protection o 230µA Operating-Mode Quiescent Current o 2nA Backup-Mode Quiescent Current o Battery Freshness Seal o Optional Redundant Battery o Low Forward-Voltage Drop on VCC Supply Switch o 5% or 10% Power-Fail Detection Options o Tests Battery Condition During Power-Up o 8-Pin SO Available MXD1210 Applications µP Systems Computers Embedded Systems _________________Pin Configurations ______________Ordering Information PART TOP VIEW MXD1210CPA MXD1210CSA MXD1210CWE MXD1210C/D MXD1210EPA MXD1210ESA MXD1210EWE MXD1210MJA TEMP. RANGE 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -55°C to +125°C PIN-PACKAGE 8 Plastic DIP 8 SO 16 Wide SO Dice* 8 Plastic DIP 8 SO 16 Wide SO 8 CERDIP V CCO 1 VBATT1 2 TOL 3 GND 4 8 7 V CCI VBATT2 CEO CE MXD1210 6 5 *Contact factory for dice specifications. DIP/SO __________Typical Operating Circuit VCCI VCCO VBATT1 VBATT2 VCC CMOS RAM 6 3 CE N.C. 1 V CCO 2 N.C. 3 VBATT1 4 N.C. 5 TOL 6 N.C. 7 GND 8 16 N.C. 15 V CCI 14 N.C. +5V 8 1 2 MXD1210 7 CE 5 FROM DECODER 4 MXD1210 13 VBATT2 12 N.C. 11 CEO 10 N.C. 9 CE Wide SO GND ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 Nonvolatile RAM Controller MXD1210 ABSOLUTE MAXIMUM RATINGS VCCI to GND ................................................................-0.3V, +7V VBATT1 to GND.......................................................... -0.3V, +7V VBATT2 to GND.......................................................... -0.3V, +7V VCCO to GND..................................................... -0.3V, VS + 0.3V (VS = greater of VCCI, VBATT1, VBATT2) Digital Input and Output Voltages to GND............. 0.3V, VCCI + 0.3V Continuous Power Dissipation (TA = +70°C) 8-Pin Plastic DIP (derate 9.09mW/°C above +70°C) ....727mW 8-Pin SO (derate 5.88mW/°C above +70°C).................471mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C)......762mW 8-Pin CERDIP (derate 8.00mW/°C above +70°C).........640mW Operating Temperature Ranges MXD1210C_ _ ..................................................... 0°C to +70°C MXD1210E_ _ .................................................. -40°C to +85°C MXD1210MJA ................................................ -55°C to +125°C Storage Temperature Range ........................... -65°C to +150°C Lead Temperature (soldering, 10sec) ............................ +300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS RECOMMENDED OPERATING CONDITIONS TOL = GND Supply Voltage Input High Voltage Input Low Voltage Battery Voltage (Note 1) VCCI TOL = VCCO VIH VIL VBATT1 VBATT2 1 or 2 batteries 2.0 4.50 2.2 0.8 4.0 5.50 V V V 4.75 5.50 V ELECTRICAL CHARACTERISTICS (VCCI = +4.75V to +5.5V, TOL = GND; or VCCI = +4.5V to +5.5V, TOL = VCCO; TA = TMIN to TMAX; unless otherwise noted.) PARAMETER SYMBOL CONDITIONS VCCO, CEO open, VBATT1 = VBATT2 = 3V MXD1210C Output Supply Voltage VCCO ICCO1 = 80mA (Note 2) VCCI - VCCO ≤ 0.2V (Note 2) MXD1210E MXD1210M MXD1210C MXD1210E MXD1210M VCCI - 0.20 VCCI - 0.21 VCCI - 0.25 0.23 0.23 80 75 65 ±1.0 ±1.0 IOH = -1mA IOL = 4mA TOL = GND TOL = VCCO 2.4 4.50 4.25 0.4 4.74 4.49 mA µA µA V V V V MIN TYP MAX UNITS NORMAL SUPPLY MODE, TOL = VCCO Supply Current ICCI 0.23 0.5 mA Output Supply Current Input Leakage Current Output Leakage Current High-Level Output Voltage Low-Level Output Voltage VCCI Trip Point 2 ICCO IIL IOL VOH VOL VCCTP _______________________________________________________________________________________ Nonvolatile RAM Controller ELECTRICAL CHARACTERISTICS PARAMETER BATTERY-BACKUP MODE Quiescent Current (Note 1) Output Supply Current (Notes 3, 4) CEO Output Voltage IBATT ICCO2 VO VCCO, CEO open MXD1210C/E VCCI = 0V MXD1210M VBATT - VCCO ≤ 0.2V Output open VBATT - 0.2 2 100 5 300 nA µA µA V SYMBOL (VCCI < VBATT; positive edge rate at VBATT1, VBATT2 > 0.1V/µs, TA = TMIN to TMAX; unless otherwise noted.) CONDITIONS MIN TYP MAX UNITS MXD1210 ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX, unless otherwise noted.) PARAMETER Input Capacitance Output Capacitance SYMBOL CIN COUT CONDITIONS MIN TYP MAX 5 7 UNITS pF pF INPUT/OUTPUT CAPACITANCE (Note 5) VCC POWER TIMING CHARACTERISTICS PARAMETER CE Propagation Delay CE High to Power-Fail (Note 5) SYMBOL tPD tPF (VCCI = +4.75V to +5.5V, TOL = GND; or VCCI = +4.5V to +5.5V, TOL = VCCO; TA = TMIN to TMAX; unless otherwise noted.) CONDITIONS RL = 1kΩ, CL = 50pF MXD1210C MXD1210E MXD1210M MIN 5 5 5 TYP 10 10 10 0 MAX 20 22 25 ns ns UNITS TIMING CHARACTERISTICS (VCCI < +4.75V to +5.5V, TOL = GND; or VCCI < +4.5V , TOL = VCCO; TA = TMIN to TMAX; unless otherwise noted.) PARAMETER Recovery at Power-Up VCC Slew-Rate Power-Down VCC Slew-Rate Power-Up CE Pulse Width (Note 6) SYMBOL tREC tF tFB tR tCE To out-of-tolerance condition Tolerance to battery power CONDITIONS MIN 2 300 10 0 1.5 TYP 5 MAX 20 UNITS ms µs µs µs Note 1: Only one battery input is required. Unused battery inputs must be grounded. Note 2: ICCO1 is the maximum average load current the MXD1210 can supply to the memories. Note 3: ICCO2 is the maximum average load current the MXD1210 can supply to the memories in battery-backup mode. Note 4: CEO can sustain leakage current only in battery-backup mode. Note 5: Guaranteed by design. Note 6: tCE max must be met to ensure data integrity on power loss. _______________________________________________________________________________________ 3 Nonvolatile RAM Controller MXD1210 ______________________________________________________________Pin Description PIN 8-PIN DIP/SO 1 2 3 4 5 6 7 8 – 16-PIN WIDE SO 2 4 6 8 9 11 13 15 1, 3, 5, 7 10, 12, 14, 16 NAME VCCO VBATT1 TOL GND CE CEO VBATT2 VCCI N.C. Backed-up supply to RAM Battery 1 positive connection Tolerance select pin Ground Chip-enable input Chip-enable output Battery 2 positive connection 5V power supply to chip No connect, not internally connected FUNCTION VCCI P VBATT1 P VBATT2 P GND BATTERY SELECT FRESHNESSSEAL MODE VCCO P N MXD1210 BATTERY TEST GND VOLTAGE LEVEL DETECTION CEO CONTROL CE CEO TOL Figure 1. Block Diagram 4 _______________________________________________________________________________________ Nonvolatile RAM Controller ______________ Detailed Description Main Functions The MXD1210 executes five main functions to perform reliable RAM operation and battery backup (see Typical Operating Circuit and Figure 1): 1. RAM Power-Supply Switch: The switch directs power to the RAM from the incoming supply or from the selected battery, whichever is at the greater voltage. The switch control uses the same criterion to direct power to MXD1210 internal circuitry. 2. Power-Failure Detection: The write-protection function is enabled when a power failure is detected. The power-failure detection range depends on the state of the TOL pin as follows: CONDITION TOL = GND TOL = VCCO VCCTP RANGE (V) 4.75 to 4.50 4.50 to 4.25 5. Battery-Status Warning: This notifies the system when the stronger of the two batteries measures ≤ 2.0V. Each time the MXD1210 is repowered (VCCI > VCCTP) after detecting a power failure, the battery voltage is measured. If the battery in use is low, following the MXD1210 recovery period, the device issues a warning to the system by inhibiting the second memory cycle. The sequence is as follows: First access: read memory location n, loc(n) = x Second access: write memory location n, loc (n) = complement (x) Third access: read memory location n, loc (n) = ? If the third access (read) is complement (x), then the battery is good; otherwise, the battery is not good. Return to loc(n) = x following the test sequence. MXD1210 Freshness-Seal Mode The freshness-seal mode relates to battery longevity during storage rather than directly to battery backup. This mode is activated when the first battery is connected, and is defeated when the voltage at V CCI first exceeds VCCTP. In the freshness-seal mode, both batteries are isolated from the system; that is, no current is drained from either battery, and the RAM is not powered by either battery. This means that batteries can be installed and the system can be held in inventory without battery discharge. The positive edge rate at VBATT1 and VBATT2 should exceed 0.1V/µs. The batteries will maintain their full shelf-life while installed in the system. Power-failure detection is independent of the batterybackup function and precedes it sequentially as the power-supply voltage drops during a typical power failure. 3. Write Protection: This holds the chip-enable output (CEO) to within 0.2V of VCCI or of the selected battery, whichever is greater. If the chip-enable input (CE )is low (active) when power failure is detected, then CEO is held low until CE is brought high, at which time CEO is gated high for the duration of the power failure. The preceding sequence completes the current RD/WR cycle, preventing data corruption if the RAM access is a WR cycle. 4. Battery Redundancy: A second battery is optional. When two batteries are connected, the stronger battery is selected to provide RAM backup and to power the MXD1210. The battery-selection circuitry remains active while in the battery-backup mode, selecting the stronger battery and isolating the weaker one. The battery-selection activity is transparent to the user and the system. If only one battery is connected, the second battery input should be grounded. Battery Backup The Typical Operating Circuit shows the MXD1210 connected in order to write protect the RAM when VCC is less than 4.75V, and to provide battery backup to the supply. _______________________________________________________________________________________ 5 Nonvolatile RAM Controller MXD1210 tCE CE VBATT -O.2V VIH CEO tPD tREC 4.75V 4.5V 4.25V VCCI 4.75V 4.5V 4.25V 3V tF CEO VIH CE VIH VIL tPD tCE VIH VIL tPF VBATT -0.2V VCCI tR tFB Figure 2. Power-Up Timing Diagram Figure 3. Power-Down Timing Diagram 6 _______________________________________________________________________________________ Nonvolatile RAM Controller __________________Chip Topography V CCI VBATT2 MXD1210 V CCO V BATT1 0.121" (3.073mm) CEO TOL CE GND 0.080" (2.032mm) TRANSISTOR COUNT: 1436; LEAVE SUBSTRATE UNCONNECTED. _______________________________________________________________________________________ 7 Nonvolatile RAM Controller MXD1210 ________________________________________________________Package Information DIM A A1 B C D E e H h L α INCHES MAX MIN 0.069 0.053 0.010 0.004 0.019 0.014 0.010 0.007 0.197 0.189 0.157 0.150 0.050 BSC 0.244 0.228 0.020 0.010 0.050 0.016 8˚ 0˚ MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.27 0˚ 8˚ 21-325A E H D A e B 0.127mm 0.004in. h x 45˚ α A1 C L 8-PIN PLASTIC SMALL-OUTLINE PACKAGE D1 DIM A A1 A2 A3 B B1 C D D1 E E1 e eA eB L α E D A3 A A2 E1 INCHES MAX MIN 0.200 – – 0.015 0.175 0.125 0.080 0.055 0.022 0.016 0.065 0.050 0.012 0.008 0.390 0.348 0.035 0.005 0.325 0.300 0.280 0.240 0.100 BSC 0.300 BSC 0.400 – 0.150 0.115 15˚ 0˚ MILLIMETERS MIN MAX – 5.08 0.38 – 3.18 4.45 1.40 2.03 0.41 0.56 1.27 1.65 0.20 0.30 8.84 9.91 0.13 0.89 7.62 8.26 6.10 7.11 2.54 BSC 7.62 BSC – 10.16 2.92 3.81 0˚ 15˚ 21-324A L A1 e B α C B1 eA eB 8-PIN PLASTIC DUAL-IN-LINE PACKAGE Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 © 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.