MXD1210_05

19-0154; Rev 2; 11/05 Nonvolatile RAM Controller General Description The MXD1210 nonvolatile RAM controller is a very lowpower CMOS circuit that converts standard (volatile) CMOS RAM into nonvolatile memory. It also continually monitors the power supply to provide RAM write protection when power to the RAM is in a marginal (out-of-tolerance) condition. When the power supply begins to fail, the RAM is write-protected, and the device switches to battery-backup mode. ♦ Battery Backup ♦ Memory Write Protection ♦ 230µA Operating Mode Quiescent Current ♦ 2nA Backup Mode Quiescent Current ♦ Battery Freshness Seal ♦ Optional Redundant Battery ♦ Low Forward-Voltage Drop on VCC Supply Switch ♦ 5% or 10% Power-Fail Detection Options ♦ Tests Battery Condition During Power-Up ♦ 8-Pin SO Available Features MXD1210 Applications Microprocessor Systems Computers Embedded Systems Ordering Information Pin Configurations TOP VIEW PART MXD1210C/D MXD1210CPA MXD1210CSA MXD1210CWE MXD1210EPA VCCO 1 8 7 VCCI VBATT2 CEO CE TEMP RANGE 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -55°C to +125°C PIN-PACKAGE Dice* 8 PDIP 8 SO 16 Wide SO 8 PDIP 8 SO 16 Wide SO 8 CERDIP MXD1210ESA MXD1210EWE MXD1210MJA VBATT1 2 MXD1210 TOL 3 6 5 GND 4 DIP/SO *Contact factory for dice specifications. Devices in PDIP and SO packages are available in both leaded and lead-free packaging. Specify lead free by adding the + symbol at the end of the part number when ordering. Lead free not available for CERDIP package. Typical Operating Circuit +5V N.C. 1 VCCO 2 N.C. 3 VBATT1 4 N.C. 5 TOL 6 N.C. 7 GND 8 16 N.C. 15 VCCI 14 N.C. CE FROM DECODER VCCI 8 1 2 VCCO VBATT1 VCC VBATT2 CE MXD1210 5 4 7 6 3 CMOS RAM MXD1210 13 VBATT2 12 N.C. 11 CEO 10 N.C. 9 CE GND WIDE SO ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Nonvolatile RAM Controller MXD1210 ABSOLUTE MAXIMUM RATINGS VCCI to GND ..........................................................-0.3V to +7.0V VBATT1 to GND.....................................................-0.3V to +7.0V VBATT2 to GND.....................................................-0.3V to +7.0V VCCO to GND ................................................-0.3V to (VS + 0.3V) (VS = greater of VCCI, VBATT1, VBATT2) Digital Input and Output Voltages to GND.....................................-0.3V to (VCCI + 0.3V) Continuous Power Dissipation (TA = +70°C) 8-Pin PDIP (derate 9.09mW/°C above +70°C)..............727mW 8-Pin SO (derate 5.88mW/°C above +70°C).................471mW 8-Pin CERDIP (derate 8.00mW/°C above +70°C).........640mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C) .....762mW Operating Temperature Range C Suffix.................................................................0°C to +70°C E Suffix ..............................................................-40°C to +85°C M Suffix ...........................................................-55°C to +125°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS (TA = TMIN to TMAX, unless otherwise noted.) PARAMETER Supply Voltage Input High Voltage Input Low Voltage Battery Voltage SYMBOL VCCI VIH VIL VBATT1 VBATT2 1 or 2 batteries (Note 1) 2.0 TOL = GND TOL = VCCO CONDITIONS MIN 4.75 4.50 2.2 0.8 4.0 TYP MAX 5.50 5.50 UNITS V V V V ELECTRICAL CHARACTERISTICS—Normal Supply Mode, TOL = VCCO (VCCI = +4.75V to +5.5V, TOL = GND; or VCCI = +4.5V to +5.5V, TOL = VCCO; TA = TMIN to TMAX, unless otherwise noted.) PARAMETER Supply Current SYMBOL ICCI CONDITIONS VCCO, CEO open, VBATT1 = VBATT2 = 3V MXD1210C Output Supply Voltage VCCO ICCO1 = 80mA (Note 2) MXD1210E MXD1210M MXD1210C Output Supply Current Input Leakage Current Output Leakage Current High-Level Output Voltage Low-Level Output Voltage VCCI Trip Point ICCO IIL IOL VOH VOL VCCTP IOH = -1mA IOL = 4mA TOL = GND TOL = VCCO 4.50 4.25 2.4 0.4 4.74 4.49 VCCI - VCCO ≤ 0.2V (Note 2) MXD1210E MXD1210M 0.23 0.23 VCCI 0.20 VCCI 0.21 VCCI 0.25 80 75 65 ±1.0 ±1.0 µA µA V V V mA V MIN TYP 0.23 MAX 0.5 UNITS mA 2 _______________________________________________________________________________________ Nonvolatile RAM Controller ELECTRICAL CHARACTERISTICS—Battery-Backup Mode (VCCI < VBATT, positive edge rate at VBATT1, VBATT2 > 0.1V/µs, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER Quiescent Current (Note 1) Output Supply Current CEO Output Voltage SYMBOL IBATT ICCO2 VO CONDITIONS VCCO, CEO open, VCCI = 0V MXD1210C/E MXD1210M VBATT 0.2 MIN TYP 2 MAX 100 5 300 UNITS nA µA µA V MXD1210 VBATT - VCCO ≤ 0.2V (Notes 3, 4) Output open CAPACITANCE (TA = TMIN to TMAX, unless otherwise noted.) (Note 5) PARAMETER Input Capacitance Output Capacitance SYMBOL CIN COUT CONDITIONS MIN TYP MAX 5 7 UNITS pF pF VCC POWER TIMING CHARACTERISTICS (VCCI = +4.75V to +5.5V, TOL = GND; or VCCI = +4.5V to +5.5V, TOL = VCCO, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER CE Propagation Delay CE High to Power-Fail SYMBOL tPD tPF CONDITIONS MXD1210C RL = 1kΩ, CL = 50pF (Note 5) MXD1210E MXD1210M MIN 5 5 5 TYP 10 10 10 0 MAX 20 22 25 ns ns UNITS TIMING CHARACTERISTICS (VCCI < +4.75V to +5.5V, TOL = GND; or VCCI < +4.5V, TOL = VCCO, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER Recovery at Power-Up VCC Slew-Rate Power-Down VCC Slew-Rate Power-Up CE Pulse Width SYMBOL tREC tF tFB tR tCE (Note 6) To out-of-tolerance condition Tolerance to battery power CONDITIONS MIN 2 300 10 0 1.5 TYP 5 MAX 20 UNITS ms µs µs µs Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Only one battery input is required. Unused battery inputs must be grounded. ICCO1 is the maximum average load current the MXD1210 can supply to the memories. ICCO2 is the maximum average load current the MXD1210 can supply to the memories in battery-backup mode. CEO can sustain leakage current only in battery-backup mode. Guaranteed by design. tCE max must be met to ensure data integrity on power loss. _______________________________________________________________________________________ 3 Nonvolatile RAM Controller MXD1210 Pin Description PIN 8-PIN PDIP/SO 1 2 3 4 5 6 7 8 — 16-PIN WIDE SO 2 4 6 8 9 11 13 15 1, 3, 5, 7, 10, 12, 14, 16 NAME VCCO VBATT1 TOL GND CE CEO VBATT2 VCCI N.C. Backed-Up Supply to RAM Battery 1 Positive Connection Tolerance Select Pin Ground Chip-Enable Input Chip-Enable Output Battery 2 Positive Connection 5V Power Supply to Chip No Connection. Not internally connected. FUNCTION VCCI P VBATT1 P VBATT2 P FRESHNESSSEAL MODE N P VCCO GND BATTERY SELECT MXD1210 BATTERY TEST GND VOLTAGE LEVEL DETECTION CEO CONTROL CE CEO TOL Figure 1. Block Diagram 4 _______________________________________________________________________________________ Nonvolatile RAM Controller Detailed Description Main Functions The MXD1210 executes five main functions to perform reliable RAM operation and battery backup (see the Typical Operating Circuit and Figure 1): 1) RAM Power-Supply Switch: The switch directs power to the RAM from the incoming supply or from the selected battery, whichever is at the greater voltage. The switch control uses the same criterion to direct power to MXD1210 internal circuitry. 2) Power-Failure Detection: The write-protection function is enabled when a power failure is detected. The power-failure detection range depends on the state of the TOL pin as follows: CONDITION TOL = GND TOL = VCCO VCCTP RANGE (V) 4.75 to 4.50 4.50 to 4.25 tery and isolating the weaker one. The batteryselection activity is transparent to the user and the system. If only one battery is connected, the second battery input should be grounded. 5) Battery-Status Warning: This notifies the system when the stronger of the two batteries measures ≤ 2.0V. Each time the MXD1210 is repowered (VCCI > VCCTP) after detecting a power failure, the battery voltage is measured. If the battery in use is low, following the MXD1210 recovery period, the device issues a warning to the system by inhibiting the second memory cycle. The sequence is as follows: First access: read memory location n, loc(n) = x Second access: write memory location n, loc(n) = complement (x) Third access: read memory location n, loc(n) = ? If the third access (read) is complement (x), then the battery is good; otherwise the battery is not good. Return to loc(n) = x following the test sequence. MXD1210 Power-failure detection is independent of the battery-backup function and precedes it sequentially as the power-supply voltage drops during a typical power failure. 3) Write Protection: This holds the chip-enable output (CEO) to within 0.2V of VCCI or of the selected battery, whichever is greater. If the chip-enable input (CE) is low (active) when power failure is detected, then CEO is held low until CE is brought high, at which time C EO is gated high for the duration of the power failure. The preceding sequence completes the current RD/WR cycle, preventing data corruption if the RAM access is a WR cycle. 4) Battery Redundancy: A second battery is optional. When two batteries are connected, the stronger battery is selected to provide RAM backup and to power the MXD1210. The battery-selection circuitry remains active while in the battery-backup mode, selecting the stronger bat- Freshness-Seal Mode The freshness-seal mode relates to battery longevity during storage rather than directly to battery backup. This mode is activated when the first battery is connected, and is defeated when the voltage at VCCI first exceeds VCCTP. In the freshness-seal mode, both batteries are isolated from the system; that is, no current is drained from either battery, and the RAM is not powered by either battery. This means that batteries can be installed and the system can be held in inventory without battery discharge. The positive edge rate at VBATT1 and VBATT2 should exceed 0.1V/µs. The batteries will maintain their full shelf life while installed in the system. Battery Backup The Typical Operating Circuit shows the MXD1210 connected to write-protect the RAM when VCC is less than 4.75V, and to provide battery backup to the supply. _______________________________________________________________________________________ 5 Nonvolatile RAM Controller MXD1210 tCE CE CE VBATT - 0.2V VIH CEO tPD tREC 4.75V 4.5V 4.25V 3V VCCI 4.75V 4.5V 4.25V tF CEO VIH VIH VIL tPD VIH VIL tCE tPF VBATT - 0.2V VCCI tR tFB Figure 2. Power-Up Timing Diagram Figure 3. Power-Down Timing Diagram 6 _______________________________________________________________________________________ Nonvolatile RAM Controller Chip Topography VCCI VBATT2 MXD1210 VCCO VBATT1 0.121" (3.073mm) CEO TOL CE GND 0.080" (2.032mm) TRANSISTOR COUNT: 1436; LEAVE SUBSTRATE UNCONNECTED. _______________________________________________________________________________________ 7 Nonvolatile RAM Controller MXD1210 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) SOICN .EPS INCHES DIM A A1 B C e E H L MAX MIN 0.069 0.053 0.010 0.004 0.014 0.019 0.007 0.010 0.050 BSC 0.150 0.157 0.228 0.244 0.016 0.050 MILLIMETERS MAX MIN 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 1.27 BSC 3.80 4.00 5.80 6.20 0.40 1.27 N E H VARIATIONS: 1 INCHES MILLIMETERS MIN 4.80 8.55 9.80 MAX 5.00 8.75 10.00 N MS012 8 AA 14 AB 16 AC TOP VIEW DIM D D D MIN 0.189 0.337 0.386 MAX 0.197 0.344 0.394 D A e B A1 L C 0∞-8∞ FRONT VIEW SIDE VIEW PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, .150" SOIC APPROVAL DOCUMENT CONTROL NO. REV. 21-0041 B 1 1 8 _______________________________________________________________________________________ Nonvolatile RAM Controller Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) PDIPN.EPS MXD1210 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.