28C011T
1 Megabit (128K x 8-Bit) EEPROM
VCC VSS RES OE CE WE RES A0 Y Decoder Address Buffer and Latch A7 A16 Data Latch Y Gating I/O Buffer and Input Latch Control Logic Timing High Voltage Generator I/O0 I/O7 RDY/Busy
28C011T
A6
X Decoder
Memory Array
Memory
Logic Diagram
FEATURES:
• 128k x 8-bit EEPROM • RAD-PAK® radiation-hardened against natural space radiation • Total dose hardness: - > 100 krad (Si), depending upon space mission • Excellent Single Event Effects: - No Latchup > 120 MeV/mg/cm2 - SEU > 90 MeV/mg/cm2 read mode • Package: - 32-pin RAD-PAK® flat package - 32-pin Rad-Tolerant flat package - JEDEC-approved byte-wide pinout • High speed: - 120, 150, and 200 ns maximum access times available • High endurance: - 10,000 erase/write (in Page Mode), - 10 year data retention • Page write mode: - 1 to 128 bytes • Low power dissipation - 20 mW/MHz active (typical) - 110 µ W standby (maximum)
DESCRIPTION:
Maxwell Technologies’ 28C011T high-density 1 Megabit (128K x 8-Bit) EEPROM microcircuit features a greater than 100 krad (Si) total dose tolerance, depending upon space mission. The 28C011T is capable of in-system electrical byte and page programmability. It has a 128-byte page programming function to make its erase and write operations faster. It also features data polling and a Ready/Busy signal to indicate the completion of erase and programming operations. In the 28C010T, hardware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit on power on and off. Software data protection is implemented using the JEDEC optional standard algorithm. Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK® provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Class S.
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1 Megabit (128K x 8-Bit) EEPROM
TABLE 1. 28C011T PINOUT DESCRIPTION
PIN 12-5, 27, 26, 23, 25, 4, 28, 3, 31, 2 24 22 29 32 16 1 30 SYMBOL A0-A16 OE CE WE VCC VSS RDY/BUSY RES DESCRIPTION Address Output Enable Chip Enable Write Enable Power Supply Ground Ready/Busy Reset
28C011T
TABLE 2. 28C011T ABSOLUTE MAXIMUM RATINGS
PARAMETER Supply Voltage (Relative to VSS) Input Voltage (Relative to VSS) Operating Temperature Range Storage Temperature Range 1. VIN min = -3.0V for pulse width < 50ns.
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SYMBOL
MIN
MAX
UNITS
VCC VIN TOPR TSTG
-0.6 -0.5 -55 -65
1
+7.0 +7.0 +125 +150
V V
°C °C
TABLE 3. DELTA LIMITS
PARAMETER ICC1 ICC2 ICC3A ICC3B VARIATION ±10% ±10% ±10% ±10%
TABLE 4. 28C011T RECOMMENDED OPERATING CONDITIONS
PARAMETER Supply Voltage Input Voltage SYMBOL VCC VIL VIH RES_PIN Operating Temperature Range 1. VIL min = -1.0V for pulse width < 50 ns
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MIN 4.5 -0.31 2.2 VCC -0.5 -55
MAX 5.5 0.8 VCC +0.3 VCC +1 +125
UNITS V V
VH TOPR
°C
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1 Megabit (128K x 8-Bit) EEPROM
TABLE 5. 28C011T CAPACITANCE
(TA = 25 ° C, f = 1 MHZ) PARAMETER Input Capacitance: VIN = 0V 1 Output Capacitance: VOUT = 0V 1 1. Guaranteed by design. SYMBOL CIN COUT MIN ---
28C011T
MAX 6 12 UNITS pF pF
TABLE 6. 28C011T DC ELECTRICAL CHARACTERISTICS
(VCC = 5V ± 10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER Input Leakage Current Output Leakage Current Standby VCC Current Operating VCC Current TEST CONDITION VCC = 5.5V, VIN = 5.5V VCC = 5.5V, VOUT = 5.5V/0.4V CE = VCC CE = VIH IOUT = 0mA, Duty = 100%, Cycle = 1µ s at VCC = 5.5V IOUT = 0mA, Duty = 100%, Cycle = 150ns at VCC = 5.5V Input Voltage RES_PIN Output Voltage IOL = 2.1 mA IOH = -0.4 mA 1. ILI on RES = 100 uA max. 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 SUBGROUPS 1, 2, 3 1, 2, 3 1, 2, 3 SYMBOL IIL ILO ICC1 ICC2 ICC3A ICC3B VIL VIH VH VOL VOH MIN -------2.2 VCC -0.5 -2.4 MAX 21 2 20 1 15 50 0.8 --0.4 -V V UNITS µA µA µA mA mA
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TABLE 7. 28C011T AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1
(VCC = 5V + 10%, TA = -55 TO +125 ° C) PARAMETER Address Access Time CE = OE = VIL, WE = VIH -120 -150 -200 Chip Enable Access Time OE = VIL, WE = VIH -120 -150 -200 SYMBOL tACC SUBGROUPS 9, 10, 11 ---tCE 9, 10, 11 ---120 150 200 120 150 200 ns MIN MAX UNITS ns
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1 Megabit (128K x 8-Bit) EEPROM
(VCC = 5V + 10%, TA = -55 TO +125 ° C) PARAMETER Output Enable Access Time CE = VIL, WE = VIH -120 -150 -200 Output Hold to Address Change CE = OE = VIL, WE = VIH -120 -150 -200 Output Disable to High-Z 2 CE = VIL, WE = VIH -120 -150 -200 CE = OE = VIL, WE = VIH -120 -150 -200 RES to Output Delay3 CE = OE = VIL, WE = VIH -120 -150 -200 SYMBOL tOE SUBGROUPS 9, 10, 11 0 0 0 tOH 9, 10, 11 0 0 0 9, 10, 11 tDF 0 0 0 tDFR 0 0 0 9, 10, 11 ---MIN
28C011T
MAX UNITS ns 75 75 100 ns ---ns 50 50 60
TABLE 7. 28C011T AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1
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300 350 450 ns 400 450 650
tRR
1. Test conditions: Input pulse levels - 0.4V to 2.4V; input rise and fall times < 20ns; output load - 1 TTL gate + 100pF (including scope and jig); reference levels for measuring timing - 0.8V/1.8V. 2. tDF and tDFR are defined as the time at which the output becomes an open circuit and data is no longer driven. 3. Guaranteed by design.
TABLE 8. 28C011T AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND BYTE WRITE OPERATIONS
(VCC = 5V + 10%, TA = -55 TO +125 ° C) PARAMETER Address Setup Time -120 -150 -200 Chip Enable to Write Setup Time (WE controlled) -120 -150 -200 SYMBOL tAS SUBGROUPS 9, 10, 11 0 0 0 tCS 9, 10, 11 0 0 0 ---ns ---MIN 1 MAX UNITS ns
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1 Megabit (128K x 8-Bit) EEPROM
28C011T
TABLE 8. 28C011T AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND BYTE WRITE OPERATIONS
(VCC = 5V + 10%, TA = -55 TO +125 ° C) PARAMETER Write Pulse Width CE controlled -120 -150 -200 WE controlled -120 -150 -200 Address Hold Time -120 -150 -200 Data Setup Time -120 -150 -200 Data Hold Time -120 -150 -200 Chip Enable Hold Time (WE controlled) -120 -150 -2000 Write Enable to Write Setup Time (CE controlled) -120 -150 -200 Write Enable Hold Time (CE controlled) -120 -150 -200 Output Enable to Write Setup Time -120 -150 -200 Output Enable Hold Time -120 -150 -200 SYMBOL tCW 200 250 350 tWP 200 250 350 tAH 9, 10, 11 150 150 200 tDS 9, 10, 11 75 100 150 tDH 9, 10, 11 10 10 10 tCH 9, 10, 11 0 0 0 tWS 9, 10, 11 0 0 0 tWH 9, 10, 11 0 0 0 tOES 9, 10, 11 0 0 0 tOEH 9, 10, 11 0 0 0
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SUBGROUPS 9, 10, 11
MIN 1
MAX
UNITS ns
------ns ----
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ns ---ns ---------ns ---ns ---ns ---ns
ns
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1 Megabit (128K x 8-Bit) EEPROM
28C011T
TABLE 8. 28C011T AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND BYTE WRITE OPERATIONS
(VCC = 5V + 10%, TA = -55 TO +125 ° C) PARAMETER Write Cycle Time2 -120 -150 -200 Data Latch Time -120 -150 -200 Byte Load Window -120 -150 -200 Byte Load Cycle -120 -150 -200 Time to Device Busy -120 -150 -200 Write Start Time3 -120 -150 -200 RES to Write Setup Time -120 -150 -200 VCC to RES Setup Time4 -120 -150 -200 1. Use this device in a longer cycle than this value. 2. tWC must be longer than this value unless polling techniques or RDY/BUSY are used. This device automatically completes the internal write operation within this value. 3. Next read or write operation can be initiated after tDW if polling techniques or RDY/BUSY are used. 4. Gauranteed by design. SYMBOL tWC SUBGROUPS 9, 10, 11 ---tDL 9, 10, 11 250 300 400 tBL 9, 10, 11 100 100 200 tBLC 9, 10, 11 0.55 0.55 0.95 tDB 9, 10, 11 100 120 170 tDW 9, 10, 11 150 150 250 tRP 9, 10, 11 100 100 200 tRES 9, 10, 11 1 1 3 ------µs ---µs ---ns 30 30 30 ns ---µs ---µs 10 10 10 ns MIN 1 MAX UNITS ms
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1 Megabit (128K x 8-Bit) EEPROM
TABLE 9. 28C011T MODE SELECTION 1
PARAMETER Read Standby Write Deselect Write Inhibit Data Polling Program 1. X = Don’t care. CE VIL VIH VIL VIL X X VIL X OE VIL X VIH VIH X VIL VIL X WE VIH X VIL VIH VIH X VIH X I/O DOUT High-Z DIN High-Z --Data Out (I/O7) High-Z RES VH X VH VH X X VH VIL
28C011T
RDY/BUSY High-Z High-Z High-Z --> VOL High-Z --VOL High-Z
FIGURE 1. READ TIMING WAVEFORM
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1 Megabit (128K x 8-Bit) EEPROM
FIGURE 2. BYTE WRITE TIMING WAVEFORM(1) (WE CONTROLLED)
28C011T
Memory
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1 Megabit (128K x 8-Bit) EEPROM
FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED)
28C011T
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©2003 Maxwell Technologies All rights reserved.
1 Megabit (128K x 8-Bit) EEPROM
FIGURE 4. PAGE WRITE TIMING WAVEFORM(1) (WE CONTROLLED)
28C011T
Memory
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1 Megabit (128K x 8-Bit) EEPROM
FIGURE 5. PAGE WRITE TIMING WAVEFORM(2) (CE CONTROLLED)
28C011T
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FIGURE 6. DATA POLLING TIMING WAVEFORM
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©2003 Maxwell Technologies All rights reserved.
1 Megabit (128K x 8-Bit) EEPROM
28C011T
FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM(1) (IN PROTECTION MODE)
FIGURE 8. SOFTWARE DATA PROTECTION TIMING WAVEFORM(2) (IN NON-PROTECTION MODE)
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EEPROM APPLICATION NOTES
This application note describes the programming procedures for the EEPROM modules and with details of various techniques to preserve data protection.
Automatic Page Write
Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle, and allows the undefined data within 128 bytes to be written corresponding to the undefined address (A0 to A6). Loading the first byte of data, the data load window opens 30µ s for the second byte. In the same manner each additional byte of data can be loaded within 30µ s. In case CE and WE are kept high for 100 µ s after data input, EEPROM enters erase and write mode automatically and only the input data are written into the EEPROM.
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1 Megabit (128K x 8-Bit) EEPROM
WE, CE Pin Operation
28C011T
During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of WE or CE.
Data Polling
Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation.
RDY/Busy Signal
RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal has high impedance except in write cycle and is lowered to VOL after the first write signal. At the-end of a write cycle, the RDY/Busy signal changes state to high impedance.
RES Signal
When RES is LOW, the EEPROM cannot be read and programmed. Therefore, data can be protected by keeping RES low when VCC is switched. RES should be high during read and programming because it doesn’t provide a latch function.
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Data Protection
To protect the data during operation and power on/off, the EEPROM has the internal functions described below.
1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation.
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1 Megabit (128K x 8-Bit) EEPROM
28C011T
During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 20ns or less in programming mode. Be careful not to allow noise of a width of more than 20ns on the control pins.
2. Data Protection at VCC on/off
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When VCC is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable state during VCC on/off by using a CPU reset signal to RES pin.
RES should be kept at VSS level when VCC is turned on or off. The EEPROM breaks off programming operation when RES become low, programming operation doesn’t finish correctly in case that RES falls low during programming operation. RES should be kept high for 10 ms after the last data input.
3. Software Data Protection
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©2003 Maxwell Technologies All rights reserved.
1 Megabit (128K x 8-Bit) EEPROM
28C011T
The software data protection function is to prevent unintentional programming caused by noise generated by external circuits. In software data protection mode, 3 bytes of data must be input before write data as follows. These bytes can switch the nonprotection mode to the protection mode.
Software data protection mode can be canceled by inputting the following 6 bytes. Then, the EEPROM turns to the non-protection mode and can write data normally. However, when the data is input in the canceling cycle, the data cannot be written.
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1 Megabit (128K x 8-Bit) EEPROM
28C011T
Memory
32-PIN RAD-PAK® FLAT PACKAGE
DIMENSION SYMBOL MIN A b c D E E1 e L Q S1 N 0.350 0.021 0.005 0.117 0.015 0.004 -0.404 -NOM 0.130 0.017 0.005 0.820 0.410 -0.050BSC 0.370 0.033 0.027 32 0.390 0.036 -MAX 0.143 0.022 0.009 0.830 0.416 0.440
Note: All dimensions in inches
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1 Megabit (128K x 8-Bit) EEPROM
28C011T
Memory
28C011T 32-PIN RAD-TOLERANT FLAT PACKAGE
DIMENSION SYMBOL MIN A b c D E E1 e L S1 N 0.390 0.005 0.078 0.015 0.004 -0.404 -NOM 0.087 0.017 0.005 0.820 0.410 -0.050BSC 0.400 0.027 32 0.410 -MAX 0.096 0.022 0.009 0.830 0.416 0.426
Note: All dimensions in inches.
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©2003 Maxwell Technologies All rights reserved.
1 Megabit (128K x 8-Bit) EEPROM
Important Notice:
28C011T
These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.
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1 Megabit (128K x 8-Bit) EEPROM
Product Ordering Options
Model Number 28C011T XX F X -XX Feature Access Time
28C011T
Option Details
12 = 120 ns 15 = 150 ns 20 = 200 ns
Screening Flow
Monolithic S = Maxwell Class S B = Maxwell Class B I = Industrial (testing @ -55°C, +25°C, +125°C) E = Engineering (testing @ +25°C)
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Package
F = Flat Pack
Radiation Feature
RP = RAD-PAK® package RT = No Radiation Guarentee CLass E and I Only RT1 = Guaranteed to 10 krad at die level RT2 = Guaranteed to 25 krad at die level RT4 = Guaranteed to 40 krad at 1 Megabit (128k x 8-bit) EEPROM
Base Product Nomenclature
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