97SD3240_06

97SD3240 1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks Logic Diagram (One Amplifier) Memory FEATURES: • 1.25 Gigabit ( 8-Meg X 40-Bit X 4-Banks) • RAD-PAK® radiation-hardened against natural space radiation • Total Dose Hardness: >100 krad (Si), depending upon space mission • Excellent Single Event Effects: SELTH > 85 MeV/mg/cm2 @ 25°C • JEDEC Standard 3.3V Power Supply • Clock Frequency: 100 MHz Operation • Operating tremperature: -55 to +125 °C • Auto Refresh • Single pulsed RAS • 2 Burst Sequence variations Sequential (BL =1/2/4/8) Interleave (BL = 1/2/4/8) • Programmable CAS latency: 2/3 • Power Down and Clock Suspend Modes • LVTTL Compatible Inputs and Outputs • Package: 132 Lead Quad Stack Pack Flat Package DESCRIPTION: Maxwell Technologies’ Synchronous Dynamic Random Access Memory (SDRAM) is ideally suited for space applications requiring high performance computing and high density memory storage. As microprocessors increase in speed and demand for higher density memory escalates, SDRAM has proven to be the ultimate solution by providing bit-counts up to 1.25 Gigabits and speeds up to 100 Megahertz. SDRAMs represent a significant advantage in memory technology over traditional DRAMs including the ability to burst data synchronously at high rates with automatic column-address generation, the ability to interleave between banks masking precharge time Maxwell Technologies’ patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding for a lifetime in orbit or space mission. In a typical GEO orbit, RAD-PAK® provides greater than 100 krads(Si) radiation dose tolerance. This product is available with screening up to Maxwell Technologies self-defined Class K. All data sheets are subject to change without notice 05.10.06 Rev 4 1 (858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com ©2006 Maxwell Technologies All rights reserved. 1.25Gb (8-Meg X 40-Bit X 4-Banks) SDRAM 97SD3240 Pinout Description Vcc NC Vss NC D47 D31 D15 VSSQ VCCQ NC CS6 CS4 CS2 CLK2 NC DQM6 DQM4 DQM2 D46 D30 D14 VCCQ VSSQ D45 D29 D13 D44 D28 D12 NC Vss NC Vcc Vcc Vss NC CKE4 CKE2 NC CKE5 CKE3 CKE1 WE A12 VSSQ VCCQ A11 A10 A9 A8 A7 A6 A5 VCCQ VSSQ A4 A3 A2 A1 A0 BA1 BA0 RAS CAS Vss Vcc 97SD3240 Vcc NC Vss NC NC VSSQ VCCQ NC CS5 CS3 CS1 CLK1 NC DQM5 DQM3 DQM1 D35 D19 D3 VCCQ VSSQ D34 D18 D2 D33 D17 D1 D32 D16 D0 Vss NC Vcc Memory Vcc Vss NC D43 D27 D11 D42 D26 D10 D41 D25 D9 VSSQ VCCQ D40 D24 D8 D39 D23 D7 VCCQ VSSQ D38 D22 D6 D37 D21 D5 D36 D20 D4 Vss Vcc The 97SD3240 Consists of 5, 8-Meg X 8-Bit X 4-Banks, die. The 132 Pin 3-layer stack package contains 2die in layer one and two and one die in layer three. CLK1 clocks die 1, 3 and 5, while CLK2 clocks die 2 and 4. CKE 1-5, CS 1-5 and DQM 1-5 correspond to one of the die: CKE1, CS1 and DQM1 control D0 - D7 CKE2, CS2 and DQM2 control D8 - D15 CKE3, CS3 and DQM3 control D16 - D23 CKE4, CS4 and DQM4 control D24 - D31 CKE5, CS5 and DQM5 control D32 - D39 05.10.06 Rev 4 All data sheets are subject to change without notice 2 ©2006 Maxwell Technologies All rights reserved. 1.25Gb (8-Meg X 40-Bit X 4-Banks) SDRAM ‘ 97SD3240 TABLE 1. ABSOLUTE MAXIMUM RATINGS PARAMETER Voltage on any pin relative to VSS Supply voltage relative to VSS Short circuit output current Operating Temperature Storage Temperature SYMBOL VIN VOUT VCC IOUT TOPR TSTG MAX -0.5 to VCC + 0.5 (< 4.6(max)) -0.5 to +4.6 50 -55 to +125 -65 to +150 UNIT V V mA °C °C TABLE 2. RECOMMENDED OPERATING CONDITIONS (VCC = 3.3V + 0.3V, VCCQ = 3.3V + 0.3V, TA = -55 TO 125°C, UNLESS OTHERWISE SPECIFIED) PARAMETER Supply Voltage SYMBOL M IN M AX VCC, VCCQ1,2 3.0 3.6 VSS, VSSQ3 0 0 Input High Voltage VIH1,4 2.0 VCC + 0.3 Input Low Voltage VIL1,5 -0.3 0.8 1. All voltage referred to VSS 2. The supply voltage with all VCC and VCCQ pins must be on the same level 3. The supply voltage with all V SS a nd V SSQ pins must be on the same level 4. 5. VIH ( max) = VCC+2.0V for pulse width