27C8000-10

MX27C8000 8M-BIT [1M x8] CMOS EPROM FEATURES • • • • • • 1M x 8 organization Single +5V power supply +12.5V programming voltage Fast access time: 100/120/150 ns Totally static operation Completely TTL compatible • Operating current: 60mA • Standby current: 100uA • Package type: - 32 pin plastic DIP - 32 pin PLCC/SOP - 32 pin TSOP GENERAL DESCRIPTION The MX27C8000 is a 5V only, 8M-bit, One Time Programmable Read Only Memory. It is organized as 1M words by 8 bits per word, operates from a single +5 volt supply, has a static standby mode, and features fast single address location programming. All programming signals are TTL levels, requiring a single pulse. For programming outside from the system, existing EPROM programmers may be used. The MX27C8000 supports a intelligent fast programming algorithm which can result in programming time of less than two minutes. This EPROM is packaged in industry standard 32 pin dual-in-line packages, 32 lead PLCC, 32 lead TSOP and 32 lead SOP packages. PIN CONFIGURATIONS 32 PDIP/SOP A19 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A18 A17 A14 A13 A8 A9 A11 OE/VPP A10 CE Q7 Q6 Q5 Q4 Q3 32 PLCC VCC A12 A15 A16 A19 A18 A17 32 TSOP A11 A9 A8 A14 A13 A13 A14 A17 A8 A18 A9 VCC A19 A11 A16 OE/VPP A15 A10 A12 A7 CE A6 Q7 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE/VPP A10 CE Q7 Q6 Q5 Q4 Q3 GND Q2 Q1 Q0 A0 A1 A2 A3 A7 A6 A5 A4 A3 A2 A1 A0 Q0 5 4 1 32 30 29 MX27C8000 9 MX27C8000 25 MX27C8000 13 14 Q1 Q2 GND 17 Q3 Q4 Q5 21 20 Q6 BLOCK DIAGRAM CE OE/VPP CONTROL LOGIC OUTPUT BUFFERS Q0~Q7 PIN DESCRIPTION SYMBOL A0~A19 Q0~Q7 PIN NAME Address Input Data Input/Output Chip Enable Input Output Enable Input/Program Supply Voltage Power Supply Pin (+5V) Ground Pin A0~A19 ADDRESS INPUTS . . . . . . . . Y-DECODER . . . . . . . . Y-SELECT CE OE/VPP X-DECODER 8M BIT CELL MAXTRIX VCC GND VCC GND P/N: PM00259 1 REV. 3.6, NOV. 19, 2002 MX27C8000 FUNCTIONAL DESCRIPTION THE PROGRAMMING OF THE MX27C8000 When the MX27C8000 is delivered, or it is erased, the chip has all 8M bits in the "ONE" or HIGH state. "ZEROs" are loaded into the MX27C8000 through the procedure of programming. For programming, the data to be programmed is applied with 8 bits in parallel to the data pins. Vcc must be applied simultaneously or before Vpp, and removed simultaneously or after Vpp. When programming an MXIC EPROM, a 0.1uF capacitor is required across Vpp and ground to suppress spurious voltage transients which may damage the device. AUTO IDENTIFY MODE The auto identify mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and device type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25° ± 5° ambient temperature range C C that is required when programming the MX27C8000. To activate this mode, the programming equipment must force 12.0 ± 0.5 V on address line A9 of the device. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during auto identify mode. Byte 0 ( A0 = VIL) represents the manufacturer code, and byte 1 (A0 = VIH), the device identifier code. For the MX27C8000, these two identifier bytes are given in the Mode Select Table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (Q7) defined as the parity bit. FAST PROGRAMMING The device is set up in the fast programming mode when the programming voltage OE/VPP = 12.75V is applied, with VCC = 6.25 V (Algorithm is shown in Figure 1). The programming is achieved by applying a single TTL low level 50us pulse to the CE input after addresses and data line are stable. If the data is not verified, an additional pulse is applied for a maximum of 25 pulses. This process is repeated while sequencing through each address of the device. When the programming mode is completed, the data in all address is verified at VCC = 5V ± 10%. READ MODE The MX27C8000 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs tOE after the falling edge of OE's, assuming that CE has been LOW and addresses have been stable for at least tACC - tOE. PROGRAM INHIBIT MODE Programming of multiple MX27C8000s in parallel with different data is also easily accomplished by using the Program Inhibit Mode. Except for CE and OE, all like inputs of the parallel MX27C8000 may be common. A TTL low-level program pulse applied to an MX27C8000 CE input with OE/VPP = 12.5 ± 0.5 Vwill program that MX27C8000. A high-level CE input inhibits the other MX27C8000s from being programmed. STANDBY MODE The MX27C8000 has a CMOS standby mode which reduces the maximum VCC current to 100 uA. It is placed in CMOS standby when CE is at VCC ± 0.3 V. The MX27C8000 also has a TTL-standby mode which reduces the maximum VCC current to 1.5 mA. It is placed in TTL-standby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input. PROGRAM VERIFY MODE Verification should be performed on the programmed bits to determine that they were correctly programmed. The verification should be performed with OE /VPPand CE, at VIL, data should be verified tDV after the falling edge of CE. P/N: PM00259 2 REV. 3.6, NOV. 19, 2002 MX27C8000 TWO-LINE OUTPUT CONTROL FUNCTION To accommodate multiple memory connections, a twoline control function is provided to allow for: 1. Low memory power dissipation, 2. Assurance that output bus contention will not occur. It is recommended that CE be decoded and used as the primary device-selecting function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device. SYSTEM CONSIDERATIONS During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1 uF ceramic capacitor (high frequency, low inherent inductance) should be used on each device between VCC and GND to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7 uF bulk electrolytic capacitor should be used between VCC and GND for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array. MODE SELECT TABLE PINS MODE Read Output Disable Standby (TTL) Standby (CMOS) Program Program Verify Program Inhibit Manufacturer Code(3) Device Code(3) CE VIL VIL VIH VCC±0.3V VIL VIL VIH VIL VIL OE/VPP VIL VIH X X VPP VIL VPP VIL VIL A0 X X X X X X X VIL VIH A9 X X X X X X X VH VH OUTPUTS DOUT High Z High Z High Z DIN DOUT High Z C2H 80H NOTES: 1. VH = 12.0 V ± 0.5 V 2. X = Either VIH or VIL 3. A1 - A8 = A10 - A19 = VIL(For auto select) 4. See DC Programming Characteristics for VPP voltage during programming. P/N: PM00259 3 REV. 3.6, NOV. 19, 2002 MX27C8000 FIigure 1. FAST PROGRAMMING FLOW CHART START ADDRESS = FIRST LOCATION VCC = 6.25V OE/VPP = 12.75V PROGRAM ONE 50 us PULSE NO INCREMENT ADDRESS LAST ADDRESS ? YES ADDRESS = FIRST LOCATION INCREMENT ADDRESS NO LAST ADDRESS ? X=0 PASS VERIFY BYTE FAIL INCREMENT X YES NO PROGRAM ONE 50us PULSE X = 25 ? VCC = 5.25V OE/VPP = VIL YES COMPARE ALL BYTES TO ORIGINAL DATA FAIL DEVICE FAILED PASS DEVICE PASSED P/N: PM00259 4 REV. 3.6, NOV. 19, 2002 MX27C8000 SWITCHING TEST CIRCUITS DEVICE UNDER TEST 1.8K ohm +5V CL 6.2K ohm DIODES = IN3064 OR EQUIVALENT CL = 100 pF including jig capacitance(60pF for 100ns parts) SWITCHING TEST WAVEFORMS 2.0V AC driving levels 2.0V TEST POINTS 0.8V OUTPUT 0.8V INPUT AC TESTING: AC driving levels are 2.4V/0.4V for commercial grade. Input pulse rise and fall times are < 10ns. P/N: PM00259 5 REV. 3.6, NOV. 19, 2002 MX27C8000 ABSOLUTE MAXIMUM RATINGS RATING Ambient Operating Temperature Storage Temperature Applied Input Voltage Applied Output Voltage VCC to Ground Potential V9 & VPP VALUE 0oC to 70oC -65oC to 125oC -0.5V to 7.0V -0.5V to VCC + 0.5V -0.5V to 7.0V -0.5V to 13.5V NOTICE: Specifications contained within the following tables are subject to change. NOTICE: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability. DC/AC Operating Condition for Read Operation MX27C8000 -10 Operationg Temperature Vcc Power Supply Commercial 0° to 55°C C 5V ± 10% -12 0°C to 70° C 5V ± 10% -15 0°C to 70°C 5V ± 10% DC CHARACTERISTICS SYMBOL VOH VOL VIH VIL ILI ILO ICC3 ICC2 ICC1 IPP PARAMETER Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current VCC Power-Down Current VCC Standby Current VCC Active Current VPP Supply Current Read 2.0 -0.3 -10 -10 MIN. 2.4 0.4 VCC + 0.5 0.8 10 10 100 1.5 60 10 MAX. UNIT V V V V uA uA uA mA mA uA VIN = 0 to 5.5V VOUT = 0 to 5.5V CE = VCC ± 0.3V CE = VIH CE = VIL, f=5MHz, Iout = 0mA CE = OE = VIL, VPP = 5.5V CONDITIONS IOH = -0.4mA IOL = 2.1mA CAPACITANCE TA = 25oC, f = 1.0 MHz (Sampled only) SYMBOL CIN COUT CVPP PARAMETER Input Capacitance Output Capacitance VPP Capacitance TYP. 8 8 18 MAX. 12 12 25 UNIT pF pF pF CONDITIONS VIN = 0V VOUT = 0V VPP = 0V P/N: PM00259 6 REV. 3.6, NOV. 19, 2002 MX27C8000 AC CHARACTERISTICS 27C8000-10 SYMBOL tACC tCE tOE tDF PARAMETER Address to Output Delay Chip Enable to Output Delay Output Enable to Output Delay OE High to Output Float, or CE High to Output Float tOH Output Hold from Address, CE or OE which ever occurred first 0 0 0 ns 0 MIN. MAX. 100 100 40 30 0 27C8000-12 MIN. MAX. 120 120 50 35 0 27C8000-15 MIN. MAX. UNIT CONDITIONS 150 150 65 50 ns ns ns ns CE = OE = VIL OE = VIL CE = VIL DC PROGRAMMING CHARACTERISTICS TA = 25oC ± 5oC SYMBOL VOH VOL VIH VIL ILI VH ICC3 IPP2 VCC1 VPP1 PARAMETER Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current A9 Auto Select Voltage VCC Supply Current (Program & Verify) VPP Supply Current(Program) Fast Programming Supply Voltage Fast Programming Voltage 6.00 12.5 2.0 -0.3 -10 11.5 MIN. 2.4 0.4 VCC + 0.5 0.8 10 12.5 50 30 6.50 13.0 MAX. UNIT V V V V uA V mA mA V V CE = VIL VIN = 0 to 5.5V CONDITIONS IOH = -0.40mA IOL = 2.1mA AC PROGRAMMING CHARACTERISTICS TA = 25oC ± 5oC SYMBOL tAS tDS tAH tDH tDFP tVPS tPW tVCS tDV tOEH tVR PARAMETER Address Setup Time Data Setup Time Address Hold Time Data Hold Time Chip Enable to Output Float Delay VPP Setup Time CE Program Pulse Width VCC Setup Time Data Valid from CE OE/VPP Hold Time OE/VPP Recovery Time 2.0 2.0 2.0 150 MIN. 2.0 2.0 0 2.0 0 2.0 50 130 TYP. MAX. UNIT us us us us ns us us us ns us us P/N: PM00259 7 REV. 3.6, NOV. 19, 2002 MX27C8000 WAVEFORMS READ CYCLE ADDRESS INPUTS tACC DATA ADDRESS CE tCE OE tDF DATA OUT tOE VALID DATA tOH FAST PROGRAMMING ALGORITHM WAVEFORMS PROGRAM VIH PROGRAM VERIFY Addresses VIL tAS Hi-z DATA OUT VALID tDV DATA tDS VPP1 tDH tDFP OE/VPP VIL tVPS VIH tPW tVPS tVR tAH CE VIL tVCS VCC1 VCC VCC P/N: PM00259 8 REV. 3.6, NOV. 19, 2002 MX27C8000 ORDERING INFORMATION PLASTIC PACKAGE PART NO. MX27C8000PC-10 ACCESS TIME(ns) 100 OPERATING CURRENT MAX.(mA) STANDBY CURRENT MAX.(uA) PACKAGE 60 60 60 60 60 60 60 60 60 60 60 60 100 100 100 100 100 100 100 100 100 100 100 100 32 Pin DIP 32 Pin PLCC 32 Pin SOP 32 Pin TSOP 32 Pin DIP 32 Pin PLCC 32 Pin SOP 32 Pin TSOP 32 Pin DIP 32 Pin PLCC 32 Pin SOP 32 Pin TSOP MX27C8000QC-10 100 MX27C8000MC-10 100 MX27C8000TC-10 MX27C8000PC-12 100 120 MX27C8000QC-12 120 MX27C8000MC-12 120 MX27C8000TC-12 MX27C8000PC-15 120 150 MX27C8000QC-15 150 MX27C8000MC-15 150 MX27C8000TC-15 150 P/N: PM00259 9 REV. 3.6, NOV. 19, 2002 MX27C8000 PACKAGE INFORMATION P/N: PM00259 10 REV. 3.6, NOV. 19, 2002 MX27C8000 P/N: PM00259 11 REV. 3.6, NOV. 19, 2002 MX27C8000 P/N: PM00259 12 REV. 3.6, NOV. 19, 2002 MX27C8000 P/N: PM00259 13 REV. 3.6, NOV. 19, 2002 MX27C8000 REVISION HISTORY Revision No. Description 2.0 1) Eliminate Interactive Programming Mode. 2) Programming pulse change from 100us to 50us. 3.0 1)Partial specification change for 100ns speed grade 1-1) SWITCHING TEST Condition CL = 100pF---> CL = 60pF 1-2) Operating Temperature 0° to 70°C ----> 0° to 55° C C C 1-3) Vcc, 5V ± 10%----> 5V ± 5% 2)IPP1 100uA ----> 10uA. 3.1 1)Partial specification change for 100ns speed grade, VCC:5V ± 5% ----->5V ± 10% 3.2 Added 32pin TSOP package type 3.3 Correcting Ordering Information 3.4 Cancel ceramic DIP package type 3.5 Cancel "Ultraviolet Erasable" wording in General Description To modify Package Information 3.6 To modify Package Information Page Date 5/30/1997 7/18/1997 12/19/1997 P1,12 P9 P1,2,9,10 P1 P10~13 P10~13 OCT/20/1999 OCT/21/1999 MAR/02/2000 AUG/20/2001 NOV/19/2002 P/N: PM00259 14 REV. 3.6, NOV. 19, 2002 MX27C8000 MACRONIX INTERNATIONAL CO., LTD. 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