MX23L51220
512M-BIT (16M x 32) MASK ROM WITH PAGE MODE (SSOP ONLY) (for socket solution only)
FEATURES
• Bit organization - 16M x 32 (double word mode) only • Fast access time - Random access: 90ns (max.) - Page access: 30ns (max.) • Page size - 8 double words per page • Current - Operating: 80mA (max.) @ 5MHz - Standby: 30uA (max.) • Supply voltage : 3.3V ± 10% • Package - 70 pin SSOP • Temperature - 0~70° C
PIN CONFIGURATION 70 PIN SSOP
A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 NC D27 D19 D26 D18 NC D25 D17 D24 D16 CE# VSS VSS OE# D0 D8 D1 D9 D2 D10 D3 D11 VSS 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 A23 NC NC D20 D28 D21 D29 NC D22 D30 D23 D31 A22 VSS VSS D15 D7 D14 D6 D13 D5 D12 D4 VCC VCC
PIN DESCRIPTION
Symbol A0~A23 D0~D31 CE# OE# VCC VSS NC Pin Function Address Inputs Data Outputs Chip Enable Input Output Enable Input Power Supply Pin Ground Pin No Connection (pin 18 and 53 must be floating, not connected to VCC or GND)
P/N:PM0949
MX23L51220
REV. 1.3, SEP. 02, 2004
1
MX23L51220
BLOCK DIAGRAM
A0 A2 A3 A23 CE# Address Buffer Memory Array Page Buffer Page Decoder Output Buffer D0 D31
OE#
MODE SELECTION
CE# H L L OE# X H L D0~D31 High Z High Z D0~D31 Mode Double Word Power Stand-by Active Active
ORDER INFORMATION
Part No. MX23L51220MC-90 MX23L51220MC-10 Access Time 90ns 100ns Package 70 pin SSOP 70 pin SSOP
ABSOLUTE MAXIMUM RATINGS
Item Voltage on any Pin Relative to VSS Ambient Operating Temperature Storage Temperature Symbol VIN Topr Tstg Ratings -0.3V to 3.9V 0° C to 70° C -65° C to 125° C
P/N:PM0949
REV. 1.3, SEP. 02, 2004
2
MX23L51220
DC CHARACTERISTICS (Ta = 0° C ~ 70° C, VCC = 3.3V ± 10%)
Item Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Operating Current Symbol VOH VOL VIH VIL ILI ILO ICC MIN. 2.4V 2.2V -0.3V MAX. 0.4V VCC+0.3V 0.2xVCC 10uA 10uA 80mA Conditions IOH = -0.4mA IOL = 1.6mA
Standby Current (TTL) Standby Current (CMOS) Input Capacitance Output Capacitance
ISTB1 ISTB2 CIN COUT
-
1mA 30uA 20pF 10pF
0V, VCC 0V, VCC f=5MHz, all output open CE#=VIL(Chip Enable) OE#=VIH(Output Disabled) CE# = VIH CE# > VCC-0.2V Ta = 25° C, f = 1MHZ Ta = 25° C, f = 1MHZ
AC CHARACTERISTICS (Ta = 0° C ~ 70° C, VCC = 3.3V ± 10%)
Item Read Cycle Time Address Access Time Chip Enable Access Time Page Mode Access Time Output Enable Time Output Hold After Address Output High Z Delay Symbol tRC tAA tCE tPA tOE tOH tHZ 23L51220-90 MIN. 90ns 0ns MAX. 90ns 90ns 30ns 30ns 20ns 23L51220-10 MIN. 100ns 0ns MAX. 100ns 100ns 30ns 30ns 20ns
AC Test Conditions
Input Pulse Levels Input Rise and Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 2.8V 10ns 1.5V 1.5V See Figure
DOUT IOL (load)=1.6mA IOH (load)= -0.4mA
C< 100pF
Note:No output loading is present in tester load board. Active loading is used and under software programming control. Output loading capacitance includes load board's and all stray capacitance.
P/N:PM0949
REV. 1.3, SEP. 02, 2004
3
MX23L51220
TIMING DIAGRAM RANDOM READ
ADD
ADD
tCE
ADD
tRC
ADD
CE#
tOE
OE#
tAA tOH tHZ
DATA
VALID
VALID
VALID
PAGE READ
A3-A23
VALID ADD
A0, A1, A2
1'st ADD tAA
2'nd ADD tPA VALID VALID
3'rd ADD
DATA
VALID
P/N:PM0949
REV. 1.3, SEP. 02, 2004
4
MX23L51220
PACKAGE INFORMATION
P/N:PM0949
REV. 1.3, SEP. 02, 2004
5
MX23L51220
REVISION HISTORY
Revision No. Description 1.1 Modify supply voltage-- 3.3V ± 5% for temporary period, 3.3V ± 10% after new product available 1.2 1. Removed "Preliminary" on page 1 2. Operating : 60mA(max.) --> 80mA(max.) 3. Input pulse levels : 0.4V~2.4V --> 0.4V~2.8V 1.3 1. Added "for socket solution only" on page 1 Page P1,2,3 P1 P1,3 P3 P1 Date JUL/11/2003 FEB/25/2004
SEP/02/2004
P/N:PM0949
REV. 1.3, SEP. 02, 2004
6
MX23L51220
MACRONIX INTERNATIONAL CO., LTD.
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MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
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