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MX25L6433FXCI-08G

MX25L6433FXCI-08G

  • 厂商:

    MCNIX(旺宏电子)

  • 封装:

    TBGA24

  • 描述:

    IC FLSH 64MBIT SPI/QUAD 24CSPBGA

  • 数据手册
  • 价格&库存
MX25L6433FXCI-08G 数据手册
MX25L6433F (J / K Grade) MX25L6433F- J/K Grade 3V, 64M-BIT [x 1/x 2/x 4] CMOS MXSMIO® (SERIAL MULTI I/O) FLASH MEMORY Key Features • J Grade (Temperature = -40°C to 105°C) • K Grade (Temperature = -40°C to 125°C) • Hold Feature • Multi I/O Support - Single I/O, Dual I/O and Quad I/O • Auto Erase and Auto Program Algorithms • Program Suspend/Resume & Erase Suspend/Resume P/N: PM2399 Macronix Proprietary 1 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) Contents 1. FEATURES......................................................................................................................................................... 3 2. GENERAL DESCRIPTION................................................................................................................................ 4 3. PIN CONFIGURATION....................................................................................................................................... 5 4. PIN DESCRIPTION............................................................................................................................................. 5 5. CONFIGURATION REGISTER........................................................................................................................... 6 Table 1. Configuration Register...............................................................................................................6 Table 2. Dummy Cycle Table...................................................................................................................6 6. ELECTRICAL SPECIFICATIONS....................................................................................................................... 7 Table 3. DC Characteristics.....................................................................................................................7 Table 4. AC Characteristics.....................................................................................................................8 7. ORDERING INFORMATION............................................................................................................................. 10 8. PART NAME DESCRIPTION.............................................................................................................................11 9. PACKAGE INFORMATION............................................................................................................................... 12 9-1. 16-SOP (300mil)...................................................................................................................................12 9-2. 8-SOP (200mil).....................................................................................................................................13 9-3. 8-WSON (8x6mm)................................................................................................................................14 9-4. 8-WSON (6x5mm)................................................................................................................................15 10. REVISION HISTORY ...................................................................................................................................... 16 P/N: PM2399 Macronix Proprietary 2 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 64M-BIT [x 1 / x 2 / x 4] CMOS MXSMIO® (SERIAL MULTI I/O) FLASH MEMORY 1. FEATURES GENERAL • Supports Serial Peripheral Interface -- Mode 0 and Mode 3 • 67,108,864 x 1 bit structure or 33,554,432 x 2 bits (two I/O read mode) structure or 16,777,216 x 4 bits (four I/O mode) structure • 2048 Equal Sectors with 4K bytes each - Any Sector can be erased individually • 256 Equal Blocks with 32K bytes each - Any Block can be erased individually • 128 Equal Blocks with 64K bytes each - Any Block can be erased individually • Power Supply Operation - 2.65-3.6 volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to Vcc +1V • Fast read for SPI mode - Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions - Configurable dummy cycle number for fast read operation • Programming: 256byte page buffer • Minimum 100,000 erase/program cycles • 20 years data retention SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Advanced Security Features - Block lock protection The BP0-BP3 and T/B status bits define the size of the area to be protected against program and erase instructions • Additional 8K-bit bit security OTP - Features unique identifier - Factory locked identifiable, and customer lockable P/N: PM2399 • Auto Erase and Auto Program Algorithms - Automatically erases and verifies data at selected sector - Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse width (Any page to be programmed should have page in the erased state first.) • Status Register Feature • Command Reset • Program/Erase Suspend • Program/Erase Resume • Electronic Identification - JEDEC 1-byte Manufacturer ID and 2-byte Device ID - RES command for 1-byte Device ID • Support Serial Flash Discoverable Parameters (SFDP) mode HARDWARE FEATURES • SCLK Input - Serial clock input • SI/SIO0 - Serial Data Input or Serial Data Input/Output for 2 x I/O mode or Serial Data Input/Output for 4 x I/O mode • SO/SIO1 - Serial Data Output or Serial Data Input/Output for 2 x I/O mode or Serial Data Input/Output for 4 x I/O mode • WP#/SIO2 - Hardware Write Protection or Serial Data Input/Output for 4 x I/O mode • HOLD#/SIO3 - To pause the device without deselecting the device or Serial Data Input/Output for 4 x I/O mode • PACKAGE - 8-pin SOP (200mil) - 16-pin SOP (300mil) - 8-WSON (6x5mm) - 8-WSON (8x6mm) - All devices are RoHS Compliant and Halogen-free Macronix Proprietary 3 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 2. GENERAL DESCRIPTION MX25L6433F is 64Mb bits Serial NOR Flash memory, which is configured as 8,388,608 x 8 internally. When it is in four I/O mode, the structure becomes 16,777,216 bits x 4. When it is in two I/O mode, the structure becomes 33,554,432 bits x 2. MX25L6433F features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input. MX25L6433F, MXSMIO® (Serial Multi I/O) flash memory, provides sequential read operation on the whole chip and multi-I/O features. When it is in quad I/O mode, the SI pin, SO pin, WP# pin and HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data Input/Output. After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256 bytes) basis. Erase command is executed on 4K-byte sector, 32K-byte/64K-byte block, or whole chip basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. When the device is not in operation and CS# is high, it is put in standby mode. The MX25L6433F utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles. For detailed electrical specifications, please refer to MX25L6433F datasheet. P/N: PM2399 Macronix Proprietary 4 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 3. PIN CONFIGURATION 4. PIN DESCRIPTION 16-PIN SOP (300mil) 1 2 3 4 5 6 7 8 HOLD#/SIO3 VCC NC NC NC NC CS# SO/SIO1 SYMBOL DESCRIPTION CS# Chip Select Serial Data Input (for 1xI/O)/ Serial Data SI/SIO0 Input & Output (for 2xI/O mode and 4xI/ O mode) Serial Data Output (for 1xI/O)/Serial SO/SIO1 Data Input & Output (for 2xI/O mode and 4xI/O mode) SCLK Clock Input Write protection Active Low or Serial WP#/SIO2 Data Input & Output (for 4xI/O mode) To pause the device without deselecting HOLD#/ the device or Serial data Input/Output SIO3 for 4 x I/O mode VCC + 3.0V Power Supply GND Ground NC No Connection SCLK SI/SIO0 NC NC NC NC GND WP#/SIO2 16 15 14 13 12 11 10 9 8-PIN SOP (200mil) CS# SO/SIO1 WP#/SIO2 GND 1 2 3 4 8 7 6 5 VCC HOLD#/SIO3 SCLK SI/SIO0 Note: The pin of HOLD#/SIO3 or WP#/SIO2 will remain internal pull up function while this pin is not physically connected in system configuration. However, the internal pull up function will be disabled if the system has physical connection to HOLD#/SIO3 or WP#/SIO2 pin. 8-WSON (6x5mm, 8x6mm) CS# SO/SIO1 WP#/SIO2 GND P/N: PM2399 1 2 3 4 8 7 6 5 VCC HOLD#/SIO3 SCLK SI/SIO0 Macronix Proprietary 5 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 5. CONFIGURATION REGISTER The Configuration Register is able to change the default status of Flash memory. Flash memory will be configured after the CR bit is set. ODS bit The output driver strength ODS bit are volatile bits, which indicate the output driver level of the device. The Output Driver Strength is defaulted=1 when delivered from factory. To write the ODS bit requires the Write Status Register (WRSR) instruction to be executed. TB bit The Top/Bottom (TB) bit is a OTP bit. The Top/Bottom (TB) bit is used to configure the Block Protect area by BP bit (BP3, BP2, BP1, BP0), starting from TOP or Bottom of the memory array. The TB bit is defaulted as “0”, which means Top area protect. When it is set as “1”, the protect area will change to Bottom area of the memory device. To write the TB bit requires the Write Status Register (WRSR) instruction to be executed. Table 1. Configuration Register bit7 bit6 bit5 DC Reserved (Dummy Reserved Cycle) bit4 Reserved x 2READ/ 4READ Dummy Cycle x x x volatile x x bit3 TB (top/bottom selected) 0=Top area protect 1=Bottom area protect (Default=0) bit2 bit1 bit0 Reserved Reserved ODS x x 0,Output driver strength=1 1,Output driver strength=1/4 (Default=0) x x volatile OTP Note: Please refer to "Table 2. Dummy Cycle Table", with "Don't Care" on other Reserved Configuration Registers. Table 2. Dummy Cycle Table 2READ 4READ P/N: PM2399 DC Numbers of Dummy Cycles 0 (default) 1 0 (default) 1 4 8 6 10 Macronix Proprietary 6 Freq. (MHz) 105°C 80 133 80 133 125°C 80 120 80 120 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 6. ELECTRICAL SPECIFICATIONS Table 3. DC Characteristics Temperature = -40°C to 105°C/125°C ; VCC = 2.65V - 3.6V Symbol Parameters Notes Min. Typ. Max.(4) 105°C 125°C Units ILI Input Load Current 1 ±2 uA ILO Output Leakage Current 1 ±2 uA ISB1 VCC Standby Current 1 ISB2 Deep Power-down Current ICC1 Test Conditions VCC = VCC Max, VIN = VCC or GND VCC = VCC Max, VOUT = VCC or GND VIN = VCC or GND, CS# = VCC VIN = VCC or GND, CS# = VCC 10 85 100 uA 3 25 30 uA 1 2.5 7 10 Normal Read (50MHz), mA SCLK=0.1VCC/0.9VCC, SO=Open 1,5 10 22 25 4 IxO Read, mA SCLK=0.1VCC/0.9VCC, SO=Open 1 10 15 mA Program in Progress, CS# = VCC 10 15 mA Program status register in progress, CS#=VCC VCC Read ICC2 VCC Program Current (PP) ICC3 VCC Write Status Register (WRSR) Current ICC4 VCC Sector Erase Current (SE) 1 10 15 mA Erase in Progress, CS#=VCC ICC5 VCC Chip Erase Current (CE) 1 10 15 mA Erase in Progress, CS#=VCC VIL Input Low Voltage -0.5 0.8 V VIH Input High Voltage 0.7VCC VCC+0.4 V VOL Output Low Voltage 0.4 V IOL = 1.6mA VOH Output High Voltage V IOH = -100uA VCC-0.2 Notes : 1. Typical values at VCC = 3.3V, T = 25°C. These currents are valid for all product versions (package and speeds). 2. Typical value is calculated by simulation. 3. The values are guaranteed by characterization, not 100% tested in production. 4. Under worst conditions from -40°C to 105°C/125°C and 2.65V. 5. For ICC1 4I/O Read frequency, please refer to the values of fTSCLK in "Table 4. AC Characteristics". P/N: PM2399 Macronix Proprietary 7 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) Table 4. AC Characteristics Temperature = -40°C to 105°C/125°C ; VCC = 2.65V - 3.6V Symbol Alt. fSCLK fC fTSCLK fT fQ f4PP fRSCLK fR tCH(1) tCLH tCL(1) tCLL tCLCH (2) tCHCL (2) tSLCH tCSS tCHSL tDVCH tDSU tCHDX tDH tCHSH tSHCH tSHSL tCSH tSHQZ (2) tDIS tHLCH tCHHH tHHCH tCHHL tHHQX tLZ tHLQZ tHZ tCLQV tV tCLQX tHO tWHSL (3) tSHWL (3) tESL(4) tPSL(4) tPRS (5) tERS (6) P/N: PM2399 Parameters Min. Typ. Max. Unit Clock Frequency for the following instructions: FAST_READ, PP, SE, BE32K, BE, CE, RES, MHz WREN, WRDI, RDID, RDSR, WRSR 133 (105°C) D.C. 120 (125°C) MHz Clock Frequency for 2READ/DREAD instructions Clock Frequency for 4READ/QREAD instructions MHz Clock Frequency for 4PP (Quad page program) MHz Clock Frequency for READ instructions 50 MHz Others 45% x (1/fSCLK) ns (fSCLK) Clock High Time Normal Read 9 ns (fRSCLK: 50MHz) Others (fSCLK) 45% x (1/fSCLK) ns Clock Low Time Normal Read (fRSCLK) 9 ns Clock Rise Time (peak to peak) 0.1 V/ns Clock Fall Time (peak to peak) 0.1 V/ns CS# Active Setup Time (relative to SCLK) 4 ns CS# Not Active Hold Time (relative to SCLK) 4 ns Data In Setup Time 2 ns Data In Hold Time 3 ns CS# Active Hold Time (relative to SCLK) 4 ns CS# Not Active Setup Time (relative to SCLK) 4 ns From Read to next Read 15 ns CS# Deselect Time From Write/Erase/Program 50 ns to Read Status Register 2.65V-3.6V 10 ns Output Disable Time 3.0V-3.6V 8 ns HOLD# Setup Time (relative to SCLK) 5 ns HOLD# Hold Time (relative to SCLK) 5 ns HOLD Setup Time (relative to SCLK) 5 ns HOLD Hold Time (relative to SCLK) 5 ns 10 ns HOLD to Output Low-Z 2.65V-3.6V Loading=30pF 3.0V-3.6V 8 ns HOLD# to Output 2.65V-3.6V 10 ns High-Z 3.0V-3.6V 8 ns Loading=30pF Clock Low to Output Loading: 15pF 6 ns Valid Loading: 30pF 8 ns VCC=2.65V-3.6V Output Hold Time 1 ns Write Protect Setup Time 20 ns Write Protect Hold Time 100 ns Erase Suspend Latency 20 us Program Suspend Latency 20 us Latency between Program Resume and next 0.3 100 us Suspend Latency between Erase Resume and next Suspend 0.3 200 us Macronix Proprietary 8 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) Symbol tRCR tRCP tRCE tDP tRES1 tRES2 tW tBP tPP tSE tBE32K tBE tCE tWSR Alt. Parameters Min. Recovery Time from Read Recovery Time from Program Recovery Time from Erase CS# High to Deep Power-down Mode CS# High to Standby Mode without Electronic Signature Read CS# High to Standby Mode with Electronic Signature Read Write Status Register Cycle Time Byte-Program Page Program Cycle Time Sector Erase Cycle Time (4KB) Block Erase Cycle Time (32KB) Block Erase Cycle Time (64KB) Chip Erase Cycle Time Write Security Register Time Erase/Program cycles Typ. 20 20 12 10 0.33 25 0.14 0.25 20 Max.(7) 105°C 125°C 60 1.6 240 0.7 1.1 65 Unit 10 us us ms us 100 us 100 us 40 1 70 2.0 260 0.8 1.2 70 ms us ms ms s s s ms cycles 100,000 Notes: 1. tCH + tCL must be greater than or equal to 1/ fC. 2. The value guaranteed by characterization, not 100% tested in production. 3. Only applicable as a constraint for a WRSR instruction when SRWD is set at 1. 4. Latency time is required to complete Erase/Program Suspend operation until WIP bit is "0". 5. For tPRS, minimum timing must be observed before issuing the next program suspend command. However, a period equal to or longer than the typical timing is required in order for the program operation to make progress. 6. For tERS, minimum timing must be observed before issuing the next erase suspend command. However, a period equal to or longer than the typical timing is required in order for the erase operation to make progress. 7. Under worst conditions from -40°C to 105°C/125°C and 2.65V. P/N: PM2399 Macronix Proprietary 9 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 7. ORDERING INFORMATION Please contact Macronix regional sales for the latest product selection and available form factors. PART NO. CLOCK (MHz) TEMPERATURE PACKAGE MX25L6433FMJ-08G 133 -40°C to 105°C 300mil 16-SOP MX25L6433FM2J-08G 133 -40°C to 105°C 200mil 8-SOP MX25L6433FM2J-08Q 133 -40°C to 105°C 200mil 8-SOP P/N: PM2399 Macronix Proprietary 10 Remark Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 8. PART NAME DESCRIPTION MX 25 L 6433F M J 08 G OPTION: G/Q: RoHS Compliant & Halogen-free Manufacturing Location SPEED: 08: 133MHz 09: 120MHz TEMPERATURE RANGE: J: Industrial (-40°C to 105°C) K: Industrial (-40°C to 125°C) PACKAGE: M: 300mil 16-SOP M2: 200mil 8-SOP ZN: 6x5mm 8-WSON Z2: 8x6mm 8-WSON DENSITY & MODE: 6433F: 64Mb standard type TYPE: L: 3V DEVICE: 25: Serial NOR Flash P/N: PM2399 Macronix Proprietary 11 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 9. PACKAGE INFORMATION 9-1. P/N: PM2399 16-SOP (300mil) Macronix Proprietary 12 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 9-2. 8-SOP (200mil) P/N: PM2399 Macronix Proprietary 13 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 9-3. 8-WSON (8x6mm) P/N: PM2399 Macronix Proprietary 14 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 9-4. 8-WSON (6x5mm) P/N: PM2399 Macronix Proprietary 15 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) 10. REVISION HISTORY Revision Descriptions Page 1. Initial Release. All 1. Added "Macronix Proprietary" footnote. 2. Added 08Q part names of 8-SOP. 3. Updated the note for the internal pull up status of HOLD#/SIO3 and WP#/ SIO2. 4. Format modification. 5. Updated "9-3. 8-WSON (8x6mm)" in Max. "y" values and Min./Max. D1, E1 and L values. 6. Updated "9-4. 8-WSON (6x5mm)" in Min./Max. D1, E1 and L values. All P10-11 P5 April 01, 2016 1.0 July 30, 2019 1.1 P/N: PM2399 Macronix Proprietary 16 P12-15 P14 P15 Rev. 1.1, July 30, 2019 MX25L6433F (J / K Grade) Except for customized products which has been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations; and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright© Macronix International Co., Ltd. 2016-2019. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, Nbit, Macronix NBit, HybridNVM, HybridFlash, HybridXFlash, XtraROM, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, RichBook, Rich TV, OctaBus, FitCAM, ArmorFlash. The names and brands of third party referred thereto (if any) are for identification purposes only. For the contact and order information, please visit Macronix’s Web site at: http://www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 17
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