MX29LV640EBTI-70G

MX29LV640E T/B MX29LV640E T/B DATASHEET P/N:PM1328 REV. 1.7, DEC. 27, 2011 1 MX29LV640E T/B Contents FEATURES.............................................................................................................................................................. 5 PIN CONFIGURATION............................................................................................................................................ 6 PIN DESCRIPTION.................................................................................................................................................. 7 BLOCK DIAGRAM................................................................................................................................................... 8 BLOCK STRUCTURE.............................................................................................................................................. 9 Table 1-1. MX29LV640ET SECTOR GROUP ARCHITECTURE .................................................................. 9 Top Boot Security Sector Addresses............................................................................................................ 12 Table 1-2. MX29LV640EB SECTOR GROUP ARCHITECTURE ................................................................ 13 Bottom Boot Security Sector Addresses...................................................................................................... 16 BUS OPERATION.................................................................................................................................................. 17 Table 2-1. BUS OPERATION....................................................................................................................... 17 Table 2-2. BUS OPERATION....................................................................................................................... 18 FUNCTIONAL OPERATION DESCRIPTION........................................................................................................ 19 WRITE COMMANDS/COMMAND SEQUENCES........................................................................................ 19 REQUIREMENTS FOR READING ARRAY DATA........................................................................................ 19 ACCELERATED PROGRAM OPERATION................................................................................................. 19 RESET# OPERATION................................................................................................................................. 20 SECTOR GROUP PROTECT OPERATION................................................................................................ 20 CHIP UNPROTECT OPERATION............................................................................................................... 20 TEMPORARY SECTOR GROUP UNPROTECT OPERATION................................................................... 20 WRITE PROTECT (WP#)............................................................................................................................ 21 AUTOMATIC SELECT OPERATION............................................................................................................ 21 VERIFY SECTOR GROUP PROTECT STATUS OPERATION.................................................................... 21 SECURITY SECTOR FLASH MEMORY REGION...................................................................................... 21 Factory Locked: Security Sector Programmed and Protected at the Factory.............................................. 21 Customer Lockable: Security Sector NOT Programmed or Protected at the Factory.................................. 22 DATA PROTECTION.................................................................................................................................... 22 LOW VCC WRITE INHIBIT.......................................................................................................................... 22 WRITE PULSE "GLITCH" PROTECTION.................................................................................................... 22 LOGICAL INHIBIT........................................................................................................................................ 22 POWER-UP SEQUENCE............................................................................................................................ 22 POWER-UP WRITE INHIBIT....................................................................................................................... 23 POWER SUPPLY DECOUPLING................................................................................................................ 23 COMMAND OPERATIONS.................................................................................................................................... 24 TABLE 3. MX29LV640E T/B COMMAND DEFINITIONS............................................................................. 24 RESET ........................................................................................................................................................ 25 AUTOMATIC SELECT COMMAND SEQUENCE........................................................................................ 25 AUTOMATIC PROGRAMMING................................................................................................................... 26 CHIP ERASE............................................................................................................................................... 27 P/N:PM1328 REV. 1.7, DEC. 27, 2011 2 MX29LV640E T/B SECTOR ERASE......................................................................................................................................... 27 SECTOR ERASE SUSPEND....................................................................................................................... 28 SECTOR ERASE RESUME......................................................................................................................... 28 COMMON FLASH MEMORY INTERFACE (CFI) MODE...................................................................................... 29 QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE.................................................... 29 Table 4-1. CFI mode: Identification Data Values.......................................................................................... 29 Table 4-2. CFI Mode: System Interface Data Values................................................................................... 29 Table 4-3. CFI Mode: Device Geometry Data Values................................................................................... 30 Table 4-4. CFI Mode: Primary Vendor-Specific Extended Query Data Values............................................. 31 ELECTRICAL CHARACTERISTICS..................................................................................................................... 32 ABSOLUTE MAXIMUM STRESS RATINGS................................................................................................ 32 OPERATING TEMPERATURE AND VOLTAGE........................................................................................... 32 DC CHARACTERISTICS............................................................................................................................. 33 SWITCHING TEST CIRCUITS..................................................................................................................... 34 SWITCHING TEST WAVEFORMS............................................................................................................. 34 AC CHARACTERISTICS............................................................................................................................. 35 WRITE COMMAND OPERATION.......................................................................................................................... 36 Figure 1. COMMAND WRITE OPERATION................................................................................................. 36 READ/RESET OPERATION.................................................................................................................................. 37 Figure 2. READ TIMING WAVEFORMS...................................................................................................... 37 Figure 3. RESET# TIMING WAVEFORM.................................................................................................... 38 ERASE/PROGRAM OPERATION......................................................................................................................... 39 Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM....................................................................... 39 Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART............................................................. 40 Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM................................................................. 41 Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART..................................................... 42 Figure 8. ERASE SUSPEND/RESUME FLOWCHART............................................................................... 43 Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORMS........................................................................ 44 Figure 10. ACCELERATED PROGRAM TIMING DIAGRAM....................................................................... 44 Figure 11. CE# CONTROLLED WRITE TIMING WAVEFORM.................................................................... 45 Figure 12. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART..................................................... 46 SECTOR GROUP PROTECT/CHIP UNPROTECT............................................................................................... 47 Figure 13. SECTOR GROUP PROTECT/CHIP UNPROTECT WAVEFORM (RESET# Control)................ 47 Figure 14-1. IN-SYSTEM SECTOR GROUP PROTECT WITH RESET#=Vhv........................................... 48 Figure 14-2. CHIP UNPROTECT ALGORITHMS WITH RESET#=Vhv....................................................... 49 Table 5. TEMPORARY SECTOR GROUP UNPROTECT............................................................................ 50 Figure 15. TEMPORARY SECTOR GROUP UNPROTECT WAVEFORMS................................................ 50 Figure 16. TEMPORARY SECTOR GROUP UNPROTECT FLOWCHART................................................ 51 Figure 17. SILICON ID READ TIMING WAVEFORM................................................................................... 52 WRITE OPERATION STATUS............................................................................................................................... 53 Figure 18. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)................... 53 Figure 19. DATA# POLLING ALGORITHM.................................................................................................. 54 P/N:PM1328 REV. 1.7, DEC. 27, 2011 3 MX29LV640E T/B Figure 20. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)........................ 55 Figure 21. TOGGLE BIT ALGORITHM........................................................................................................ 56 Figure 22. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte mode to word mode).................................................................................................................................................. 57 RECOMMENDED OPERATING CONDITIONS..................................................................................................... 58 ERASE AND PROGRAMMING PERFORMANCE................................................................................................ 59 DATA RETENTION................................................................................................................................................ 59 LATCH-UP CHARACTERISTICS.......................................................................................................................... 59 PIN CAPACITANCE............................................................................................................................................... 59 ORDERING INFORMATION.................................................................................................................................. 60 PART NAME DESCRIPTION................................................................................................................................. 61 PACKAGE INFORMATION.................................................................................................................................... 62 REVISION HISTORY ............................................................................................................................................ 64 P/N:PM1328 REV. 1.7, DEC. 27, 2011 4 MX29LV640E T/B 64M-BIT [8M x 8/4M x 16] SINGLE VOLTAGE 3V ONLY FLASH MEMORY FEATURES GENERAL FEATURES • 8,388,608 x 8 / 4,194,304 x 16 switchable • Sector Structure - 8KB(4KW) x 8 and 64KB(32KW) x 127 • Extra 128-word sector for security - Features factory locked and identifiable, and customer lockable • Sector Groups Protection / Chip Unprotect - Provides sector group protect function to prevent program or erase operation in the protected sector group - Provides chip unprotect function to allow code changing - Provides temporary sector group unprotect function for code changing in previously protected sector groups • Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to 1.5 x Vcc • Low Vcc write inhibit : Vcc ≤ Vlko • Compatible with JEDEC standard - Pinout and software compatible to single power supply Flash PERFORMANCE • High Performance - Fast access time: 70ns - Fast program time: 11us/word (typical) - Fast erase time: 0.5s/sector, 45s/chip (typical) • Low Power Consumption - Low active read current: 9mA (typical) at 5MHz - Low standby current: 5uA (typical) • 100,000 erase/program cycle (typical) • 20 years data retention SOFTWARE FEATURES • Erase Suspend/ Erase Resume - Suspends sector erase operation to read data from or program data to another sector which is not being erased • Status Reply - Data# Polling & Toggle bits provide detection of program and erase operation completion • Support Common Flash Interface (CFI) HARDWARE FEATURES • Ready/Busy# (RY/BY#) Output - Provides a hardware method of detecting program and erase operation completion • Hardware Reset (RESET#) Input - Provides a hardware method to reset the internal state machine to read mode • WP#/ACC input pin - Provides accelerated program capability P/N:PM1328 REV. 1.7, DEC. 27, 2011 5 MX29LV640E T/B PACKAGE • 48-Pin TSOP • 48-Ball FBGA • All devices are RoHS Compliant PIN CONFIGURATION 48 TSOP A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 WE# RESET# A21 WP#/ACC RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE# GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC Q11 Q3 Q10 Q2 Q9 Q1 Q8 Q0 OE# GND CE# A0 48-Ball FBGA 6mm x 8mm (Ball Pich=0.8mm), Top View, Balls Facing Down A B C D E F G H BYTE# Q15/ A-1 GND 6 A13 A12 A14 A15 A16 5 A9 A8 A10 A11 Q7 Q14 Q13 Q6 4 WE# RESET# A21 A19 Q5 Q12 VCC Q4 3 RY/ BY# WP#/ ACC A18 A20 Q2 Q10 Q11 Q3 2 A7 A17 A6 A5 Q0 Q8 Q9 Q1 1 A3 A4 A2 A1 A0 CE# OE# GND 6.0 mm 8.0 mm P/N:PM1328 REV. 1.7, DEC. 27, 2011 6 MX29LV640E T/B PIN DESCRIPTION SYMBOL PIN NAME A0~A21 Address Input Q0~Q14 Data Inputs/Outputs Q15/A-1 Q 1 5 ( Wo r d M o d e ) / L S B a d d r ( B y t e Mode) CE# Chip Enable Input WE# Write Enable Input OE# Output Enable Input RESET# LOGIC SYMBOL 22 A0-A21 OE# WE# Hardware Reset Pin, Active Low RESET# Hardware Write Protect/Programming WP#/ACC Acceleration Input WP#/ACC RY/BY# +3.0V single power supply GND Device Ground RY/BY# BYTE# Ready/Busy Output VCC 16 or 8 CE# Word/Byte Selection Input BYTE# Q0-Q15 (A-1) Note: The WP#/ACC has an internal pull-up when unconnected, WP#/ACC is at Vih. P/N:PM1328 REV. 1.7, DEC. 27, 2011 7 MX29LV640E T/B BLOCK DIAGRAM CE# OE# WE# RESET# BYTE# WP#/ACC CONTROL INPUT LOGIC PROGRAM/ERASE STATE HIGH VOLTAGE MACHINE (WSM) LATCH BUFFER FLASH REGISTER ARRAY ARRAY Y-DECODER AND STATE X-DECODER ADDRESS A0-AM WRITE Y-PASS GATE SOURCE HV COMMAND DATA DECODER SENSE AMPLIFIER PGM DATA HV COMMAND DATA LATCH PROGRAM DATA LATCH Q0-Q15/A-1 I/O BUFFER AM: MSB address P/N:PM1328 REV. 1.7, DEC. 27, 2011 8 MX29LV640E T/B BLOCK STRUCTURE Table 1-1. MX29LV640ET SECTOR GROUP ARCHITECTURE Sector Group 1 1 1 1 2 2 2 2 3 3 3 3 4 4 4 4 5 5 5 5 6 6 6 6 7 7 7 7 8 8 8 8 9 9 9 9 10 10 10 10 Sector Size Byte Mode Word Mode (Kbytes) (Kwords) 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 Address Range Sector Sector Address A21-A12 Byte Mode (x8) Word Mode (x16) SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 0000000xxx 0000001xxx 0000010xxx 0000011xxx 0000100xxx 0000101xxx 0000110xxx 0000111xxx 0001000xxx 0001001xxx 0001010xxx 0001011xxx 0001100xxx 0001101xxx 0001110xxx 0001111xxx 0010000xxx 0010001xxx 0010010xxx 0010011xxx 0010100xxx 0010101xxx 0010110xxx 0010111xxx 0011000xxx 0011001xxx 0011010xxx 0011011xxx 0011100xxx 0011101xxx 0011110xxx 0011111xxx 0100000xxx 0100001xxx 0100010xxx 0100011xxx 0100100xxx 0100101xxx 0100110xxx 0100111xxx 000000h-00FFFFh 010000h-01FFFFh 020000h-02FFFFh 030000h-03FFFFh 040000h-04FFFFh 050000h-05FFFFh 060000h-06FFFFh 070000h-07FFFFh 080000h-08FFFFh 090000h-09FFFFh 0A0000h-0AFFFFh 0B0000h-0BFFFFh 0C0000h-0CFFFFh 0D0000h-0DFFFFh 0E0000h-0EFFFFh 0F0000h-0FFFFFh 100000h-10FFFFh 110000h-11FFFFh 120000h-12FFFFh 130000h-13FFFFh 140000h-14FFFFh 150000h-15FFFFh 160000h-16FFFFh 170000h-17FFFFh 180000h-18FFFFh 190000h-19FFFFh 1A0000h-1AFFFFh 1B0000h-1BFFFFh 1C0000h-1CFFFFh 1D0000h-1DFFFFh 1E0000h-1EFFFFh 1F0000h-1FFFFFh 200000h-20FFFFh 210000h-21FFFFh 220000h-22FFFFh 230000h-23FFFFh 240000h-24FFFFh 250000h-25FFFFh 260000h-26FFFFh 270000h-27FFFFh 000000h-07FFFh 008000h-0FFFFh 010000h-17FFFh 018000h-01FFFFh 020000h-027FFFh 028000h-02FFFFh 030000h-037FFFh 038000h-03FFFFh 040000h-047FFFh 048000h-04FFFFh 050000h-057FFFh 058000h-05FFFFh 060000h-067FFFh 068000h-06FFFFh 070000h-077FFFh 078000h-07FFFFh 080000h-087FFFh 088000h-08FFFFh 090000h-097FFFh 098000h-09FFFFh 0A0000h-0A7FFFh 0A8000h-0AFFFFh 0B0000h-0B7FFFh 0B8000h-0BFFFFh 0C0000h-0C7FFFh 0C8000h-0CFFFFh 0D0000h-0D7FFFh 0D8000h-0DFFFFh 0E0000h-0E7FFFh 0E8000h-0EFFFFh 0F0000h-0F7FFFh 0F8000h-0FFFFFh 100000h-107FFFh 108000h-10FFFFh 110000h-117FFFh 118000h-11FFFFh 120000h-127FFFh 128000h-12FFFFh 130000h-137FFFh 138000h-13FFFFh P/N:PM1328 REV. 1.7, DEC. 27, 2011 9 MX29LV640E T/B Sector Group 11 11 11 11 12 12 12 12 13 13 13 13 14 14 14 14 15 15 15 15 16 16 16 16 17 17 17 17 18 18 18 18 19 19 19 19 20 20 20 20 Sector Size Byte Mode Word Mode (Kbytes) (Kwords) 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 Address Range Sector Sector Address A21-A12 Byte Mode (x8) Word Mode (x16) SA40 SA41 SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 SA78 SA79 0101000xxx 0101001xxx 0101010xxx 0101011xxx 0101100xxx 0101101xxx 0101110xxx 0101111xxx 0110000xxx 0110001xxx 0110010xxx 0110011xxx 0110100xxx 0110101xxx 0110110xxx 0110111xxx 0111000xxx 0111001xxx 0111010xxx 0111011xxx 0111100xxx 0111101xxx 0111110xxx 0111111xxx 1000000xxx 1000001xxx 1000010xxx 1000011xxx 1000100xxx 1000101xxx 1000110xxx 1000111xxx 1001000xxx 1001001xxx 1001010xxx 1001011xxx 1001100xxx 1001101xxx 1001110xxx 1001111xxx 280000h-28FFFFh 290000h-29FFFFh 2A0000h-2AFFFFh 2B0000h-2BFFFFh 2C0000h-2CFFFFh 2D0000h-2DFFFFh 2E0000h-2EFFFFh 2F0000h-2FFFFFh 300000h-30FFFFh 310000h-31FFFFh 320000h-32FFFFh 330000h-33FFFFh 340000h-34FFFFh 350000h-35FFFFh 360000h-36FFFFh 370000h-37FFFFh 380000h-38FFFFh 390000h-39FFFFh 3A0000h-3AFFFFh 3B0000h-3BFFFFh 3C0000h-3CFFFFh 3D0000h-3DFFFFh 3E0000h-3EFFFFh 3F0000h-3FFFFFh 400000h-40FFFFh 410000h-41FFFFh 420000h-42FFFFh 430000h-43FFFFh 440000h-44FFFFh 450000h-45FFFFh 460000h-46FFFFh 470000h-47FFFFh 480000h-48FFFFh 490000h-49FFFFh 4A0000h-4AFFFFh 4B0000h-4BFFFFh 4C0000h-4CFFFFh 4D0000h-4DFFFFh 4E0000h-4EFFFFh 4F0000h-4FFFFFh 140000h-147FFFh 148000h-14FFFFh 150000h-157FFFh 158000h-15FFFFh 160000h-167FFFh 168000h-16FFFFh 170000h-177FFFh 178000h-17FFFFh 180000h-187FFFh 188000h-18FFFFh 190000h-197FFFh 198000h-19FFFFh 1A0000h-1A7FFFh 1A8000h-1AFFFFh 1B0000h-1B7FFFh 1B8000h-1BFFFFh 1C0000h-1C7FFFh 1C8000h-1CFFFFh 1D0000h-1D7FFFh 1D8000h-1DFFFFh 1E0000h-1E7FFFh 1E8000h-1EFFFFh 1F0000h-1F7FFFh 1F8000h-1FFFFFh 200000h-207FFFh 208000h-20FFFFh 210000h-217FFFh 218000h-21FFFFh 220000h-227FFFh 228000h-22FFFFh 230000h-237FFFh 238000h-23FFFFh 240000h-247FFFh 248000h-24FFFFh 250000h-257FFFh 258000h-25FFFFh 260000h-247FFFh 268000h-24FFFFh 270000h-277FFFh 278000h-27FFFFh P/N:PM1328 REV. 1.7, DEC. 27, 2011 10 MX29LV640E T/B Sector Group 21 21 21 21 22 22 22 22 23 23 23 23 24 24 24 24 25 25 25 25 26 26 26 26 27 27 27 27 28 28 28 28 29 29 29 29 30 30 30 30 Sector Size Byte Mode Word Mode (Kbytes) (Kwords) 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 Address Range Sector Sector Address A21-A12 Byte Mode (x8) Word Mode (x16) SA80 SA81 SA82 SA83 SA84 SA85 SA86 SA87 SA88 SA89 SA90 SA91 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 SA103 SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 SA113 SA114 SA115 SA116 SA117 SA118 SA119 1010000xxx 1010001xxx 1010010xxx 1010011xxx 1010100xxx 1010101xxx 1010110xxx 1010111xxx 1011000xxx 1011001xxx 1011010xxx 1011011xxx 1011100xxx 1011101xxx 1011110xxx 1011111xxx 1100000xxx 1100001xxx 1100010xxx 1100011xxx 1100100xxx 1100101xxx 1100110xxx 1100111xxx 1101000xxx 1101001xxx 1101010xxx 1101011xxx 1101100xxx 1101101xxx 1101110xxx 1101111xxx 1110000xxx 1110001xxx 1110010xxx 1110011xxx 1110100xxx 1110101xxx 1110110xxx 1110111xxx 500000h-50FFFFh 510000h-51FFFFh 520000h-52FFFFh 530000h-53FFFFh 540000h-54FFFFh 550000h-55FFFFh 560000h-56FFFFh 570000h-57FFFFh 580000h-58FFFFh 590000h-59FFFFh 5A0000h-5AFFFFh 5B0000h-5BFFFFh 5C0000h-5CFFFFh 5D0000h-5DFFFFh 5E0000h-5EFFFFh 5F0000h-5FFFFFh 600000h-60FFFFh 610000h-61FFFFh 620000h-62FFFFh 630000h-63FFFFh 640000h-64FFFFh 650000h-65FFFFh 660000h-66FFFFh 670000h-67FFFFh 680000h-68FFFFh 690000h-69FFFFh 6A0000h-6AFFFFh 6B0000h-6BFFFFh 6C0000h-6CFFFFh 6D0000h-6DFFFFh 6E0000h-6EFFFFh 6F0000h-6FFFFFh 700000h-70FFFFh 710000h-71FFFFh 720000h-72FFFFh 730000h-73FFFFh 740000h-74FFFFh 750000h-75FFFFh 760000h-76FFFFh 770000h-77FFFFh 280000h-287FFFh 288000h-28FFFFh 290000h-297FFFh 298000h-29FFFFh 2A0000h-2A7FFFh 2A8000h-2AFFFFh 2B0000h-2B7FFFh 2B8000h-2BFFFFh 2C0000h-2C7FFFh 2C8000h-2CFFFFh 2D0000h-2D7FFFh 2D8000h-2DFFFFh 2E0000h-2E7FFFh 2E8000h-2EFFFFh 2F0000h-2F7FFFh 2F8000h-2FFFFFh 300000h-307FFFh 308000h-30FFFFh 310000h-317FFFh 318000h-31FFFFh 320000h-327FFFh 328000h-32FFFFh 330000h-337FFFh 338000h-33FFFFh 340000h-347FFFh 348000h-34FFFFh 350000h-357FFFh 358000h-35FFFFh 360000h-347FFFh 368000h-34FFFFh 370000h-377FFFh 378000h-37FFFFh 380000h-387FFFh 388000h-38FFFFh 390000h-397FFFh 398000h-39FFFFh 3A0000h-3A7FFFh 3A8000h-3AFFFFh 3B0000h-3B7FFFh 3B8000h-3BFFFFh P/N:PM1328 REV. 1.7, DEC. 27, 2011 11 MX29LV640E T/B Sector Group 31 31 31 31 32 32 32 33 34 35 36 37 38 39 40 Sector Size Byte Mode Word Mode (Kbytes) (Kwords) 64 32 64 32 64 32 64 32 64 32 64 32 64 32 8 4 8 4 8 4 8 4 8 4 8 4 8 4 8 4 Address Range Sector Sector Address A21-A12 Byte Mode (x8) Word Mode (x16) SA120 SA121 SA122 SA123 SA124 SA125 SA126 SA127 SA128 SA129 SA130 SA131 SA132 SA133 SA134 1111000xxx 1111001xxx 1111010xxx 1111011xxx 1111100xxx 1111101xxx 1111110xxx 1111111000 1111111001 1111111010 1111111011 1111111100 1111111101 1111111110 1111111111 780000h-78FFFFh 790000h-79FFFFh 7A0000h-7AFFFFh 7B0000h-7BFFFFh 7C0000h-7CFFFFh 7D0000h-7DFFFFh 7E0000h-7EFFFFh 7F0000h-7F1FFFh 7F2000h-7F3FFFh 7F4000h-7F5FFFh 7F6000h-7F7FFFh 7F8000h-7F9FFFh 7FA000h-7FBFFFh 7FC000h-7FDFFFh 7FE000h-7FFFFFh 3C0000h-3C7FFFh 3C8000h-3CFFFFh 3D0000h-3D7FFFh 3D8000h-3DFFFFh 3E0000h-3E7FFFh 3E8000h-3EFFFFh 3F0000h-3F7FFFh 3F8000h-3FFFFFh 3F9000h-3F9FFFh 3FA000h-3FAFFFh 3FB000h-3FBFFFh 3FC000h-3FCFFFh 3FD000h-3FDFFFh 3FE000h-3FEFFFh 3FF000h-3FFFFFh Top Boot Security Sector Addresses Sector Size Byte Mode Word Mode (bytes) (words) 256 128 Address Range Sector Address A21~A12 Byte Mode (x8) Word Mode (x16) 1111111111 7FFF00h-7FFFFFh 3FFF80h-3FFFFFh P/N:PM1328 REV. 1.7, DEC. 27, 2011 12 MX29LV640E T/B Table 1-2. MX29LV640EB SECTOR GROUP ARCHITECTURE Sector Group 1 2 3 4 5 6 7 8 9 9 9 10 10 10 10 11 11 11 11 12 12 12 12 13 13 13 13 14 14 14 14 15 15 15 15 16 16 16 16 Sector Size Byte Mode Word Mode (Kbytes) (Kwords) 8 4 8 4 8 4 8 4 8 4 8 4 8 4 8 4 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 Address Range Sector Sector Address A21-A12 Byte Mode (x8) Word Mode (x16) SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 0000000000 0000000001 0000000010 0000000011 0000000100 0000000101 0000000110 0000000111 0000001xxx 0000010xxx 0000011xxx 0000100xxx 0000101xxx 0000110xxx 0000111xxx 0001000xxx 0001001xxx 0001010xxx 0001011xxx 0001100xxx 0001101xxx 0001110xxx 0001111xxx 0010000xxx 0010001xxx 0010010xxx 0010011xxx 0010100xxx 0010101xxx 0010110xxx 0010111xxx 0011000xxx 0011001xxx 0011010xxx 0011011xxx 0011100xxx 0011101xxx 0011110xxx 0011111xxx 000000h-001FFFh 002000h-003FFFh 004000h-005FFFh 006000h-007FFFh 008000h-009FFFh 00A000h-00BFFFh 00C000h-00DFFFh 00E000h-00FFFFh 010000h-01FFFFh 020000h-02FFFFh 030000h-03FFFFh 040000h-04FFFFh 050000h-05FFFFh 060000h-06FFFFh 070000h-07FFFFh 080000h-08FFFFh 090000h-09FFFFh 0A0000h-0AFFFFh 0B0000h-0BFFFFh 0C0000h-0CFFFFh 0D0000h-0DFFFFh 0E0000h-0EFFFFh 0F0000h-0FFFFFh 100000h-10FFFFh 110000h-11FFFFh 120000h-12FFFFh 130000h-13FFFFh 140000h-14FFFFh 150000h-15FFFFh 160000h-16FFFFh 170000h-17FFFFh 180000h-18FFFFh 190000h-19FFFFh 1A0000h-1AFFFFh 1B0000h-1BFFFFh 1C0000h-1CFFFFh 1D0000h-1DFFFFh 1E0000h-1EFFFFh 1F0000h-1FFFFFh 000000h-000FFFh 001000h-001FFFh 002000h-002FFFh 003000h-003FFFh 004000h-004FFFh 005000h-005FFFh 006000h-006FFFh 007000h-007FFFh 008000h-00FFFFh 010000h-017FFFh 018000h-01FFFFh 020000h-027FFFh 028000h-02FFFFh 030000h-037FFFh 038000h-03FFFFh 040000h-047FFFh 048000h-04FFFFh 050000h-057FFFh 058000h-05FFFFh 060000h-067FFFh 068000h-06FFFFh 070000h-077FFFh 078000h-07FFFFh 080000h-087FFFh 088000h-08FFFFh 090000h-097FFFh 098000h-09FFFFh 0A0000h-0A7FFFh 0A8000h-0AFFFFh 0B0000h-0B7FFFh 0B8000h-0BFFFFh 0C0000h-0C7FFFh 0C8000h-0CFFFFh 0D0000h-0D7FFFh 0D8000h-0DFFFFh 0E0000h-0E7FFFh 0E8000h-0EFFFFh 0F0000h-0F7FFFh 0F8000h-0FFFFFh P/N:PM1328 REV. 1.7, DEC. 27, 2011 13 MX29LV640E T/B Sector Group 17 17 17 17 18 18 18 18 19 19 19 19 20 20 20 20 21 21 21 21 22 22 22 22 23 23 23 23 24 24 24 24 25 25 25 25 26 26 26 26 Sector Size Byte Mode Word Mode (Kbytes) (Kwords) 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 Address Range Sector Sector Address A21-A12 Byte Mode (x8) Word Mode (x16) SA39 SA40 SA41 SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 SA78 0100000xxx 0100001xxx 0100010xxx 0100011xxx 0100100xxx 0100101xxx 0100110xxx 0100111xxx 0101000xxx 0101001xxx 0101010xxx 0101011xxx 0101100xxx 0101101xxx 0101110xxx 0101111xxx 0110000xxx 0110001xxx 0110010xxx 0110011xxx 0110100xxx 0110101xxx 0110110xxx 0110111xxx 0111000xxx 0111001xxx 0111010xxx 0111011xxx 0111100xxx 0111101xxx 0111110xxx 0111111xxx 1000000xxx 1000001xxx 1000010xxx 1000011xxx 1000100xxx 1000101xxx 1000110xxx 1000111xxx 200000h-20FFFFh 210000h-21FFFFh 220000h-22FFFFh 230000h-23FFFFh 240000h-24FFFFh 250000h-25FFFFh 260000h-26FFFFh 270000h-27FFFFh 280000h-28FFFFh 290000h-29FFFFh 2A0000h-2AFFFFh 2B0000h-2BFFFFh 2C0000h-2CFFFFh 2D0000h-2DFFFFh 2E0000h-2EFFFFh 2F0000h-2FFFFFh 300000h-30FFFFh 310000h-31FFFFh 320000h-32FFFFh 330000h-33FFFFh 340000h-34FFFFh 350000h-35FFFFh 360000h-36FFFFh 370000h-37FFFFh 380000h-38FFFFh 390000h-39FFFFh 3A0000h-3AFFFFh 3B0000h-3BFFFFh 3C0000h-3CFFFFh 3D0000h-3DFFFFh 3E0000h-3EFFFFh 3F0000h-3FFFFFh 400000h-40FFFFh 410000h-41FFFFh 420000h-42FFFFh 430000h-43FFFFh 440000h-44FFFFh 450000h-45FFFFh 460000h-46FFFFh 470000h-47FFFFh 100000h-107FFFh 108000h-10FFFFh 110000h-117FFFh 118000h-11FFFFh 120000h-127FFFh 128000h-12FFFFh 130000h-137FFFh 138000h-13FFFFh 140000h-147FFFh 148000h-14FFFFh 150000h-157FFFh 158000h-15FFFFh 160000h-167FFFh 168000h-16FFFFh 170000h-177FFFh 178000h-17FFFFh 180000h-187FFFh 188000h-18FFFFh 190000h-197FFFh 198000h-19FFFFh 1A0000h-1A7FFFh 1A8000h-1AFFFFh 1B0000h-1B7FFFh 1B8000h-1BFFFFh 1C0000h-1C7FFFh 1C8000h-1CFFFFh 1D0000h-1D7FFFh 1D8000h-1DFFFFh 1E0000h-1E7FFFh 1E8000h-1EFFFFh 1F0000h-1F7FFFh 1F8000h-1FFFFFh 200000h-207FFFh 208000h-20FFFFh 210000h-217FFFh 218000h-21FFFFh 220000h-227FFFh 228000h-22FFFFh 230000h-237FFFh 238000h-23FFFFh P/N:PM1328 REV. 1.7, DEC. 27, 2011 14 MX29LV640E T/B Sector Group 27 27 27 27 28 28 28 28 29 29 29 29 30 30 30 30 31 31 31 31 32 32 32 32 33 33 33 33 34 34 34 34 35 35 35 35 36 36 36 36 Sector Size Byte Mode Word Mode (Kbytes) (Kwords) 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 Address Range Sector Sector Address A21-A12 Byte Mode (x8) Word Mode (x16) SA79 SA80 SA81 SA82 SA83 SA84 SA85 SA86 SA87 SA88 SA89 SA90 SA91 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 SA103 SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 SA113 SA114 SA115 SA116 SA117 SA118 1001000xxx 1001001xxx 1001010xxx 1001011xxx 1001100xxx 1001101xxx 1001110xxx 1001111xxx 1010000xxx 1010001xxx 1010010xxx 1010011xxx 1010100xxx 1010101xxx 1010110xxx 1010111xxx 1011000xxx 1011001xxx 1011010xxx 1011011xxx 1011100xxx 1011101xxx 1011110xxx 1011111xxx 1100000xxx 1100001xxx 1100010xxx 1100011xxx 1100100xxx 1100101xxx 1100110xxx 1100111xxx 1101000xxx 1101001xxx 1101010xxx 1101011xxx 1101100xxx 1101101xxx 1101110xxx 1101111xxx 480000h-48FFFFh 490000h-49FFFFh 4A0000h-4AFFFFh 4B0000h-4BFFFFh 4C0000h-4CFFFFh 4D0000h-4DFFFFh 4E0000h-4EFFFFh 4F0000h-4FFFFFh 500000h-50FFFFh 510000h-51FFFFh 520000h-52FFFFh 530000h-53FFFFh 540000h-54FFFFh 550000h-55FFFFh 560000h-56FFFFh 570000h-57FFFFh 580000h-58FFFFh 590000h-59FFFFh 5A0000h-5AFFFFh 5B0000h-5BFFFFh 5C0000h-5CFFFFh 5D0000h-5DFFFFh 5E0000h-5EFFFFh 5F0000h-5FFFFFh 600000h-60FFFFh 610000h-61FFFFh 620000h-62FFFFh 630000h-63FFFFh 640000h-64FFFFh 650000h-65FFFFh 660000h-66FFFFh 670000h-67FFFFh 680000h-68FFFFh 690000h-69FFFFh 6A0000h-6AFFFFh 6B0000h-6BFFFFh 6C0000h-6CFFFFh 6D0000h-6DFFFFh 6E0000h-6EFFFFh 6F0000h-6FFFFFh 240000h-247FFFh 248000h-24FFFFh 250000h-257FFFh 258000h-25FFFFh 260000h-267FFFh 268000h-26FFFFh 270000h-277FFFh 278000h-27FFFFh 280000h-287FFFh 288000h-28FFFFh 290000h-297FFFh 298000h-29FFFFh 2A0000h-2A7FFFh 2A8000h-2AFFFFh 2B0000h-2B7FFFh 2B8000h-2BFFFFh 2C0000h-2C7FFFh 2C8000h-2CFFFFh 2D0000h-2D7FFFh 2D8000h-2DFFFFh 2E0000h-2E7FFFh 2E8000h-2EFFFFh 2F0000h-2F7FFFh 2F8000h-2FFFFFh 300000h-307FFFh 308000h-30FFFFh 310000h-317FFFh 318000h-31FFFFh 320000h-327FFFh 328000h-32FFFFh 330000h-337FFFh 338000h-33FFFFh 340000h-347FFFh 348000h-34FFFFh 350000h-357FFFh 358000h-35FFFFh 360000h-367FFFh 368000h-36FFFFh 370000h-377FFFh 378000h-37FFFFh P/N:PM1328 REV. 1.7, DEC. 27, 2011 15 MX29LV640E T/B Sector Group 37 37 37 37 38 38 38 38 39 39 39 39 40 40 40 40 Sector Size Byte Mode Word Mode (Kbytes) (Kwords) 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 64 32 Address Range Sector Sector Address A21-A12 Byte Mode (x8) Word Mode (x16) SA119 SA120 SA121 SA122 SA123 SA124 SA125 SA126 SA127 SA128 SA129 SA130 SA131 SA132 SA133 SA134 1110000xxx 1110001xxx 1110010xxx 1110011xxx 1110100xxx 1110101xxx 1110110xxx 1110111xxx 1111000xxx 1111001xxx 1111010xxx 1111011xxx 1111100xxx 1111101xxx 1111110xxx 1111111xxx 700000h-70FFFFh 710000h-71FFFFh 720000h-72FFFFh 730000h-73FFFFh 740000h-74FFFFh 750000h-75FFFFh 760000h-76FFFFh 770000h-77FFFFh 780000h-78FFFFh 790000h-79FFFFh 7A0000h-7AFFFFh 7B0000h-7BFFFFh 7C0000h-7CFFFFh 7D0000h-7DFFFFh 7E0000h-7EFFFFh 7F0000h-7FFFFFh 380000h-387FFFh 388000h-38FFFFh 390000h-397FFFh 398000h-39FFFFh 3A0000h-3A7FFFh 3A8000h-3AFFFFh 3B0000h-3B7FFFh 3B8000h-3BFFFFh 3C0000h-3C7FFFh 3C8000h-3CFFFFh 3D0000h-3D7FFFh 3D8000h-3DFFFFh 3E0000h-3E7FFFh 3E8000h-3EFFFFh 3F0000h-3F7FFFh 3F8000h-3FFFFFh Bottom Boot Security Sector Addresses Sector Size Byte Mode Word Mode (bytes) (words) 256 128 Address Range Sector Address A21~A12 Byte Mode (x8) Word Mode (x16) 0000000xxx 000000h-0000FFh 000000h-00007Fh P/N:PM1328 REV. 1.7, DEC. 27, 2011 16 MX29LV640E T/B BUS OPERATION Table 2-1. BUS OPERATION Mode Select Device Reset RECE# SET# WE# OE# Address X X X Data (I/O) Q7~Q0 HighZ Byte# Vil Vih Data (I/O) Q15~Q8 HighZ HighZ WP#/ ACC L X Vcc± Vcc± 0.3V 0.3V H L H L H L H L X X X HighZ HighZ HighZ H H H L L H L H H X AIN AIN AIN HighZ DOUT DIN DIN HighZ Q8-Q14= HighZ, Q15=A-1 HighZ DOUT DIN DIN L/H L/H Note3 Vhv Vhv X X X AIN DIN HighZ DIN Note3 Sector-Group Protect (Note2) Vhv L L H X X L/H Chip Unprotect (Note2) Vhv L L H X X Note3 Standby Mode Output Disable Read Mode Write(Note1) Accelerate Program Temporary SectorGroup Unprotect Sector Address, A6=L, A1=H, DIN, DOUT A0=L Sector Address, A6=H, A1=H, DIN, DOUT A0=L L/H Notes: 1. All sectors will be unprotected if WP#/ACC=Vhv. 2. The two outmost boot sectors are protected if WP#/ACC=Vil. 3. When WP#/ACC = Vih, the protection conditions of the two outmost boot sectors depend on previous protection conditions."Sector/Sector Block Protection and Unprotection" describes the protect and unprotect method. 4. Q0~Q15 are input (DIN) or output (DOUT) pins according to the requests of command sequence, sector protection, or data polling algorithm. 5. In Word Mode (Byte#=Vih), the addresses are AM to A0. In Byte Mode (Byte#=Vil), the addresses are AM to A-1 (Q15). 6. AM: MSB of address. P/N:PM1328 REV. 1.7, DEC. 27, 2011 17 MX29LV640E T/B Table 2-2. BUS OPERATION Item Control Input AM A11 to to A9 CE# WE# OE# A12 A10 A8 to A7 A6 A5 to A2 A1 A0 Q7~Q0 Q15~Q8 Sector Lock Status Verification L H L SA x Vhv x L x H L 01h or 00h (Note1) x Read Silicon ID Manufacturer Code L H L x x Vhv x L x L L C2h x Read Silicon ID MX29LV640ET L H L x x Vhv x L x L H C9h L H L x x Vhv x L x L H CBh L H L x x Vhv x L x H H (Note2) Read Silicon ID MX29LV640EB Read Indicator Bit (Q7) For Security Sector 22h(Word) XXh(Byte) 22h(Word) XXh(Byte) x Notes: 1. Sector unprotected code:00h. Sector protected code:01h. 2. Factory locked code: 88h. Factory unlocked code: 08h. 3. AM: MSB of address. P/N:PM1328 REV. 1.7, DEC. 27, 2011 18 MX29LV640E T/B FUNCTIONAL OPERATION DESCRIPTION WRITE COMMANDS/COMMAND SEQUENCES To write a command to the device, system must drive WE# and CE# to Vil, and OE# to Vih. In a command cycle, all address are latched at the later falling edge of CE# and WE#, and all data are latched at the earlier rising edge of CE# and WE#. Figure 1 illustrates the AC timing waveform of a write command, and Table 3 defines all the valid command sets of the device. System is not allowed to write invalid commands not defined in this datasheet. Writing an invalid command will bring the device to an undefined state. REQUIREMENTS FOR READING ARRAY DATA Read array action is to read the data stored in the array. While the memory device is in powered up or has been reset, it will automatically enter the status of read array. If the microprocessor wants to read the data stored in the array, it has to drive CE# (device enable control pin) and OE# (Output control pin) as Vil, and input the address of the data to be read into address pin at the same time. After a period of read cycle (Tce or Taa), the data being read out will be displayed on output pin for microprocessor to access. If CE# or OE# is Vih, the output will be in tri-state, and there will be no data displayed on output pin at all. After the memory device completes embedded operation (automatic Erase or Program), it will automatically return to the status of read array, and the device can read the data in any address in the array. In the process of erasing, if the device receives the Erase suspend command, erase operation will be stopped temporarily after a period of time no more than Tready and the device will return to the status of read array. At this time, the device can read the data stored in any address except the sector being erased in the array. In the status of erase suspend, if user wants to read the data in the sectors being erased, the device will output status data onto the output. Similarly, if program command is issued after erase suspend, after program operation is completed, system can still read array data in any address except the sectors to be erased. The device needs to issue reset command to enable read array operation again in order to arbitrarily read the data in the array in the following two situations: 1. In program or erase operation, the programming or erasing failure causes Q5 to go high. 2. The device is in auto select mode or CFI mode. In the two situations above, if reset command is not issued, the device is not in read array mode and system must issue reset command before reading array data. ACCELERATED PROGRAM OPERATION The accelerated program can improve programming performance compared with word/byte program. By applying Vhv on WP#/ACC pin, the device will enter accelerated program and draw current no more than Icp1 from WP#/ACC pin. Removing the Vhv from WP#/ACC pin will put the device back to normal operation (not accelerated). P/N:PM1328 REV. 1.7, DEC. 27, 2011 19 MX29LV640E T/B RESET# OPERATION Driving RESET# pin low for a period more than Trp will reset the device back to read mode. If the device is in program or erase operation, the reset operation will take at most a period of Tready for the device to return to read array mode. Before the device returns to read array mode, the RY/BY# pin remains low (busy status). When RESET# pin is held at GND±0.3V, the device consumes standby current (Isb). However, device draws larger current if RESET# pin is held at Vil but not within GND±0.3V. It is recommended that the system to tie its reset signal to RESET# pin of flash memory, so that the flash memory will be reset during system reset and allows system to read boot code from flash memory. SECTOR GROUP PROTECT OPERATION When a sector group is protected, program or erase operation will be disabled on these sectors. MX29LV640E T/ B provides two methods for sector group protection. Once the sector group is protected, the sector group remains protected until next chip unprotect, or is temporarily unprotected by asserting RESET# pin at Vhv. Refer to temporary sector group unprotect operation for further details. The first method is by applying Vhv on RESET# pin. Refer to Figure 13 for timing diagram and Figure 14 for the algorithm for this method. The other method is asserting Vhv on A9 and OE# pins, with A6 and CE# at Vil. The protection operation begins at the falling edge of WE# and terminates at the rising edge. Contact Macronix for details. CHIP UNPROTECT OPERATION MX29LV640E T/B provides two methods for chip unprotect. The chip unprotect operation unprotects all sectors within the device. It is recommended to protect all sectors before activating chip unprotect mode. All sectors groups are unprotected when shipped from the factory. The first method is by applying Vhv on RESET# pin. Refer to Figure 13 for timing diagram and Figure 14 for algorithm of the operation. The other method is asserting Vhv on A9 and OE# pins, with A6 at Vih and CE# at Vil. The unprotect operation begins at the falling edge of WE# and terminates at the rising edge. Contact Macronix for details. TEMPORARY SECTOR GROUP UNPROTECT OPERATION System can apply RESET# pin at Vhv to place the device in temporary unprotect mode. In this mode, previously protected sectors can be programmed or erased just as it is unprotected. The devices returns to normal operation once Vhv is removed from RESET# pin and previously protected sectors are again protected. P/N:PM1328 REV. 1.7, DEC. 27, 2011 20 MX29LV640E T/B WRITE PROTECT (WP#) Another function of the WP#/ACC pin is to provide write protection function on the two outermost 8 Kbyte boot sectors. When ViL is asserted on WP#/ACC pin, the two boot sectors are protected regardless of the previous state of protection implemented by aforementioned Sector Group Protect/Chip Unprotect. For MX29LV640ET, the two outermost sectors are the two boot sectors of the highest addresses. For MX29LV640EB, the two outermost sectors are the two boot sectors of the lowest addresses. AUTOMATIC SELECT OPERATION When the device is in Read array mode, erase-suspended read array mode or CFI mode, user can issue read silicon ID command to enter read silicon ID mode. After entering read silicon ID mode, user can query several silicon IDs continuously and does not need to issue read silicon ID mode again. When A0 is Low, device will output Macronix Manufacture ID C2H. When A0 is high, device will output Device ID. In read silicon ID mode, issuing reset command will reset device back to read array mode or erase-suspended read array mode. Another way to enter read silicon ID is to apply high voltage on A9 pin with CE#, OE#, A6 and A1 at Vil. While the high voltage of A9 pin is discharged, device will automatically leave read silicon ID mode and go back to read array mode or erase-suspended read array mode. When A0 is Low, device will output Macronix Manufacture ID C2. When A0 is high, device will output Device ID. VERIFY SECTOR GROUP PROTECT STATUS OPERATION MX29LV640E T/B provides hardware sector protection against Program and Erase operation for protected sectors. The sector protect status can be read through Sector Protect Verify command. This method requires Vhv on A9 pin, Vih on WE# and A1 pins, Vil on CE#, OE#, A6 and A0 pins, and sector address on A12 to A21 pins. If the read out data is 01H, the designated sector is protected. Oppositely, if the read out data is 00H, the designated sector is not protected. SECURITY SECTOR FLASH MEMORY REGION The Security Sector region is an extra OTP memory space of 128 words in length. The security sectors can be locked upon shipping from factory, or it can be locked by customer after shipping. Customer can issue Security Sector Factory Protect Verify and/or Security Sector Protect Verify to query the lock status of the device. In factory-locked device, security sector region is protected when shipped from factory and the security silicon sector indicator bit is set to "1". In customer lockable device, security sector region is unprotected when shipped from factory and the security silicon indicator bit is set to "0". Factory Locked: Security Sector Programmed and Protected at the Factory In a factory locked device, the security silicon region is permanently locked after shipping from factory. The device will have a 16-byte (8-word) ESN in the security region. In bottom boot device : 000000h - 000007h (for MX29LV640EB). In Top boot device : 3FFF70h - 3FFF77h (for MX29LV640ET). P/N:PM1328 REV. 1.7, DEC. 27, 2011 21 MX29LV640E T/B Customer Lockable: Security Sector NOT Programmed or Protected at the Factory When the security feature is not required, the security region can act as an extra memory space. Security silicon sector can also be protected by two methods. Note that once the security silicon sector is protected, there is no way to unprotect the security silicon sector and the content of it can no longer be altered. The first method is to write a three-cycle command of Enter Security Region, and then follow the sector group protect algorithm as illustrated in Figure 14, except that RESET# pin may at either Vih or Vhv. The other method is to write a three-cycle command of Enter Security Region, and then follow the alternate method of sector protect with A9, OE# at Vhv. After the security silicon is locked and verified, system must write Exit Security Sector Region, go through a power cycle, or issue a hardware reset to return the device to read normal array mode. DATA PROTECTION To avoid accidental erasure or programming of the device, the device is automatically reset to read array mode during power up. Besides, only after successful completion of the specified command sets will the device begin its erase or program operation. Other features to protect the data from accidental alternation are described as followed. LOW VCC WRITE INHIBIT The device refuses to accept any write command when Vcc is less than Vlko. This prevents data from spuriously altered. The device automatically resets itself when Vcc is lower than Vlko and write cycles are ignored until Vcc is greater than Vlko. System must provide proper signals on control pins after Vcc is larger than Vlko to avoid unintentional program or erase operation WRITE PULSE "GLITCH" PROTECTION CE#, WE#, OE# pulses shorter than 5ns are treated as glitches and will not be regarded as an effective write cycle. LOGICAL INHIBIT A valid write cycle requires both CE# and WE# at Vil with OE# at Vih. Write cycle is ignored when either CE# at Vih, WE# a Vih, or OE# at Vil. POWER-UP SEQUENCE Upon power up, MX29LV640E T/B is placed in read array mode. Furthermore, program or erase operation will begin only after successful completion of specified command sequences. P/N:PM1328 REV. 1.7, DEC. 27, 2011 22 MX29LV640E T/B POWER-UP WRITE INHIBIT When WE#, CE# is held at Vil and OE# is held at Vih during power up, the device ignores the first command on the rising edge of WE#. POWER SUPPLY DECOUPLING A 0.1uF capacitor should be connected between the Vcc and GND to reduce the noise effect. P/N:PM1328 REV. 1.7, DEC. 27, 2011 23 MX29LV640E T/B COMMAND OPERATIONS TABLE 3. MX29LV640E T/B COMMAND DEFINITIONS Command Reset Mode Addr Data XXX F0 Automatic Select Manifacture ID Device ID Word 555 AA 2AA 55 555 90 Byte AAA AA 555 55 AAA 90 Word 555 AA 2AA 55 555 90 Byte AAA AA 555 55 AAA 90 Addr X00 X00 X01 X02 Data C2h C2h ID ID 1st Bus Cycle 2nd Bus Cycle 3rd Bus Cycle Addr Data Addr Data Addr Data 4th Bus Cycle 5th Bus Cycle 6th Bus Cycle Addr Data Addr Data Exit Security Sector Command 1st Bus Cycle 2nd Bus Cycle 3rd Bus Cycle 4th Bus Cycle 5th Bus Cycle 6th Bus Cycle Read Mode Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data Program Chip Erase Enter Security Sector Region Sector Protect Sector Factory Enable Verify Word Byte Word Byte Word Byte 555 AAA 555 AAA 555 AAA AA AA AA AA AA AA 2AA 555 2AA 555 2AA 555 55 55 55 55 55 55 555 AAA 555 AAA 555 AAA 90 90 90 90 88 88 (Sector) (Sector) X03 X06 X02 X04 88/08 88/08 Sector Erase 00/01 00/01 CFI Read Word Byte Word Byte Word Byte Word Byte Word Byte 555 AA 2AA 55 555 90 XXX 00 AAA AA 555 55 AAA 90 XXX 00 555 AA 2AA 55 555 A0 Addr Data AAA AA 555 55 AAA A0 Addr Data 555 AA 2AA 55 555 80 555 AA 2AA 55 555 10 AAA AA 555 55 AAA 80 AAA AA 555 55 AAA 10 555 AA 2AA 55 555 80 555 AA 2AA 55 Sector 30 AAA AA 555 55 AAA 80 AAA AA 555 55 Sector 30 55 98 AA 98 P/N:PM1328 Erase Erase Suspend Resume Byte/ Word XXX B0 Byte/ Word XXX 30 REV. 1.7, DEC. 27, 2011 24 MX29LV640E T/B RESET In the following situations, executing reset command will reset device back to read array mode: • Among erase command sequence (before the full command set is completed) • Sector erase time-out period • Erase fail (while Q5 is high) • Among program command sequence (before the full command set is completed, erase-suspended program included) • Program fail (while Q5 is high, and erase-suspended program fail is included) • Read silicon ID mode • Sector protect verify • CFI mode While device is at the status of program fail or erase fail (Q5 is high), user must issue reset command to reset device back to read array mode. While the device is in read silicon ID mode, sector protect verify or CFI mode, user must issue reset command to reset device back to read array mode. When the device is in the progress of programming (not program fail) or erasing (not erase fail), device will ignore reset command. AUTOMATIC SELECT COMMAND SEQUENCE Automatic Select mode is used to access the manufacturer ID, device ID and to verify whether or not secured silicon is locked and whether or not a sector is protected. The automatic select mode has four command cycles. The first two are unlock cycles, and followed by a specific command. The fourth cycle is a normal read cycle, and user can read at any address any number of times without entering another command sequence. The reset command is necessary to exit the Automatic Select mode and back to read array. The following table shows the identification code with corresponding address. Manufacturer ID Device ID Secured Silicon Sector Protect Verify Word Byte Word Byte Word Byte Word Byte Address X00 X00 X01 X02 X03 X06 (Sector address) X 02 (Sector address) X 04 Data (Hex) C2 C2 22C9/22CB C9/CB 88/08 88/08 00/01 00/01 Representation Top/Bottom Boot Sector Top/Bottom Boot Sector Factory locked/unlocked Factory locked/unlocked Unprotected/protected Unprotected/protected There is an alternative method to that shown in Table 2, which is intended for EPROM programmers and requires Vhv on address bit A9. P/N:PM1328 REV. 1.7, DEC. 27, 2011 25 MX29LV640E T/B AUTOMATIC PROGRAMMING The MX29LV640E T/B can provide the user program function by the form of Byte-Mode or Word-Mode. As long as the users enter the right cycle defined in the Table.3 (including 2 unlock cycles and A0H), any data user inputs will automatically be programmed into the array. Once the program function is executed, the internal write state controller will automatically execute the algorithms and timings necessary for program and verification, which includes generating suitable program pulse, verifying whether the threshold voltage of the programmed cell is high enough and repeating the program pulse if any of the cells does not pass verification. Meanwhile, the internal control will prohibit the programming to cells that pass verification while the other cells fail in verification in order to avoid over-programming. With the internal write state controller, the device requires the user to write the program command and data only. Programming will only change the bit status from "1" to "0". That is to say, it is impossible to convert the bit status from "0" to "1" by programming. Meanwhile, the internal write verification only detects the errors of the "1" that is not successfully programmed to "0". Any command written to the device during programming will be ignored except hardware reset, which will terminate the program operation after a period of time no more than Tready. When the embedded program algorithm is complete or the program operation is terminated by hardware reset, the device will return to the reading array data mode. The typical chip program time at room temperature of the MX29LV640E T/B is less than 45 seconds. When the embedded program operation is on going, user can confirm if the embedded operation is finished or not by the following methods: Status Q7 Q6 Q5 RY/BY#*2 In progress*1 Q7# Toggling 0 0 Finished Q7 Stop toggling 0 1 Exceed time limit Q7# Toggling 1 0 *1: The status "in progress" means both program mode and erase-suspended program mode. *2: RY/BY# is an open drain output pin and should be weakly connected to VDD through a pull-up resistor. *3: When an attempt is made to program a protected sector, Q7 will output its complement data or Q6 continues to toggle for about 1us or less and the device returns to read array state without programing the data in the protected sector. P/N:PM1328 REV. 1.7, DEC. 27, 2011 26 MX29LV640E T/B CHIP ERASE Chip Erase is to erase all the data with "1" and "0" as all "1". It needs 6 cycles to write the action in, and the first two cycles are "unlock" cycles, the third one is a configuration cycle, the fourth and fifth are also "unlock" cycles, and the sixth cycle is the chip erase operation. During chip erasing, all the commands will not be accepted except hardware reset or the working voltage is too low that chip erase will be interrupted. After Chip Erase, the chip will return to the state of Read Array. When the embedded chip erase operation is on going, user can confirm if the embedded operation is finished or not by the following methods: Status Q7 Q6 Q5 Q2 RY/BY# In progress 0 Toggling 0 Toggling 0 Finished 1 Stop toggling 0 1 1 Exceed time limit 0 Toggling 1 Toggling 0 SECTOR ERASE Sector Erase is to erase all the data in a sector with "1" and "0" as all "1". It requires six command cycles to issue. The first two cycles are "unlock cycles", the third one is a configuration cycle, the fourth and fifth are also "unlock cycles" and the sixth cycle is the sector erase command. After the sector erase command sequence is issued, there is a time-out period of 50us counted internally. During the time-out period, additional sector address and sector erase command can be written multiply. Once user enters another sector erase command, the time-out period of 50us is recounted. If user enters any command other than sector erase or erase suspend during time-out period, the erase command would be aborted and the device is reset to read array condition. The number of sectors could be from one sector to all sectors. After time-out period passing by, additional erase command is not accepted and erase embedded operation begins. During sector erasing, all commands will not be accepted except hardware reset and erase suspend and user can check the status as chip erase. When the embedded erase operation is on going, user can confirm if the embedded operation is finished or not by the following methods: Status Q7 Q6 Q5 Q3 Q2 RY/BY#*2 Time-out period 0 Toggling 0 0 Toggling 0 In progress 0 Toggling 0 1 Toggling 0 Finished 1 Stop toggling 0 1 1 1 Exceed time limit 0 Toggling 1 1 Toggling 0 Note : 1. The status Q3 is the time-out period indicator. When Q3=0, the device is in time-out period and is acceptable to another sector address to be erased. When Q3=1, the device is in erase operation and only erase suspend is valid. P/N:PM1328 REV. 1.7, DEC. 27, 2011 27 MX29LV640E T/B 2. RY/BY# is open drain output pin and should be weakly connected to VDD through a pull-up resistor. 3. When an attempt is made to erase a protected sector, Q7 will output its complement data or Q6 continues to toggle for 100us or less and the device returned to read array status without erasing the data in the protected sector. 4. Q2 is a localized indicator showing a specified sector is undergoing erase operation or not. Q2 toggles when user reads at addresses where the sectors are actively being erased (in erase mode) or to be erased (in erase suspend mode). When a sector has been completely erased, Q2 stops toggling at the sector even when the device is still in erase operation for remaining selected sectors. At that circumstance, Q2 will still toggle when device is read at any other sector that remains to be erased. SECTOR ERASE SUSPEND During sector erasure, sector erase suspend is the only valid command. If user issue erase suspend command in the time-out period of sector erasure, device time-out period will be over immediately and the device will go back to erase-suspended read array mode. If user issue erase suspend command during the sector erase is being operated, device will suspend the ongoing erase operation, and after the Tready1 (