MPC235L

MPC235 Low-Speed USB Micro-Controller General Description........................................................................................................................................ 3 Features .......................................................................................................................................................... 4 Pin Description ............................................................................................................................................... 5 Block Diagram ............................................................................................................................................... 6 Packages ......................................................................................................................................................... 7 Function Description ...................................................................................................................................... 8 Memory Map.................................................................................................................................................. 9 Special Function Register (SFR) .................................................................................................................. 10 Interrupt Vectors ............................................................................................................................................ 11 Interrupt Registers ................................................................................................................................ 12 IRQ enable flag............................................................................................................................. 12 IRQ status flag.............................................................................................................................. 12 IRQ clear flag ............................................................................................................................... 12 Watchdog Timer (WDT)............................................................................................................................... 13 System Control Registers ............................................................................................................................. 14 Power saving control ............................................................................................................................ 14 Release halt mode enable flag .............................................................................................................. 14 FCPU selector............................................................................................................................................... 15 Timer ............................................................................................................................................................ 16 Timer 0 ................................................................................................................................................. 16 USB .............................................................................................................................................................. 17 USB Block Diagram............................................................................................................................. 17 USB register access control.................................................................................................................. 17 USB SFR Category - Descriptions Summary....................................................................................... 18 USB SFR Description........................................................................................................................... 19 DCON: Device Control Register .................................................................................................. 19 FADDR: USB Function Address Register.................................................................................... 19 FPCON: Function Power Control Register .................................................................................. 20 FIE: Function Interrupt Enable Register....................................................................................... 20 FIFLG: Function Interrupt Flag Register...................................................................................... 21 IEN1: USB Interrupt Enable Register .......................................................................................... 21 EPINDEX: Endpoint Index Register ............................................................................................ 22 EPCON: Endpoint Control Register (Endpoint-Indexed)............................................................. 22 RXCNT: Receive FIFO Byte-Count Register (Endpoint-Indexed) .............................................. 23 RXCON: Receive FIFO Control Register (Endpoint-Indexed) .................................................... 23 RXDAT: Receive FIFO Data Register (Endpoint-Indexed) ......................................................... 24 RXSTAT: Endpoint Receive Status Register (Endpoint-Indexed)................................................ 24 TXCNT: Transmit FIFO Byte-Count Register (Endpoint-Indexed) ............................................. 25 TXCON: Transmit FIFO Control Register (Endpoint-Indexed)................................................... 25 TXDAT: Transmit FIFO Data Register (Endpoint-Indexed) ........................................................ 26 TXSTAT: Endpoint Transmit Status Register (Endpoint-Indexed)............................................... 26 I/O Ports ....................................................................................................................................................... 27 Port 0 .................................................................................................................................................... 27 Port 1 .................................................................................................................................................... 27 Port 2 .................................................................................................................................................... 28 Port 3 .................................................................................................................................................... 28 Port 4 .................................................................................................................................................... 28 DPM control ......................................................................................................................................... 29 Programming Notice .................................................................................................................................... 30 Application Circuit ....................................................................................................................................... 31 Normal:................................................................................................................................................. 31 This document contains information on a new product under development by Megawin. Megawin reserves the right to change or discontinue this product without notice. © Megawin Technology Co., Ltd. 2008 All rights reserved. 2008/12 version A4 MEGAWIN USB keyboard: ..................................................................................................................................... 31 Pad Assignment ............................................................................................................................................ 32 MPC235................................................................................................................................................ 32 Absolute Maximum Rating .......................................................................................................................... 34 DC Characteristics........................................................................................................................................ 35 AC Characteristics........................................................................................................................................ 36 Instruction Set Summary .............................................................................................................................. 37 Addressing Mode Table........................................................................................................................ 37 Instruction Set Table ............................................................................................................................. 38 Instruction Set Summary ...................................................................................................................... 39 Symbol Description .............................................................................................................................. 41 Arithmetic Operations .......................................................................................................................... 42 Logic Operations .................................................................................................................................. 44 Data Transfer ........................................................................................................................................ 46 Boolean Variable Manipulation ............................................................................................................ 47 Program and Machine Control ............................................................................................................. 48 Package Dimensions..................................................................................................................................... 49 40-pin DIP ............................................................................................................................................ 49 28-SSOP ............................................................................................................................................... 49 Version History............................................................................................................................................. 50 2 MPC235 Data Sheet MEGAWIN General Description The MPC235 is a 65C02 MCU with an embedded 8K bytes ROM, a 256 bytes RAM, a watch-dog timer, a USB and PS/2 combo interfaces, can be implemented via the USB bus line, D+ and Dpins, by the user’s program. The USB features fully meet the low-speed USB Specification version 1.1. It will be very suitable for the low-cost keyboard, joystick, I-toy, and some products like the hand-held devices, which need to download/ upload data through the PC system. MEGAWIN MPC235 Data Sheet 3 Features The MPC235 is mask version of the MPC2F35 8-bit 65C02 micro-controller with 6MHz external crystal or ceramic resonator Memory: - 8K Bytes ROM - 256 Bytes RAM 34 programmable GPIO: - 4 LED direct sink pins shared with Port0 (LED0/1/2/3) - 2 external interrupt pins (-INT0, -INT1) - Port3 provides the pin interrupt - 34 bi-directional I/O pins for Port0/1/ 2/3/4 One 8-bit programmable timer Built-in power-on reset One watchdog timer Low-speed USB Specification version 1.1 compliance. - Supports 4 endpoints, where EP0 is control endpoint, and EP1/2/3 are data endpoints. - Integrated USB transceiver and USB built-in pull-up resistor. - Provides remote-wake-up/host-resume from suspend mode. - Built-in 5V to 3.3V regulator for USB. Built-in low-voltage detector (reset) USB and PS/2 combo interfaces Support suspend/normal mode for power management Operating voltage: 4.35V to 5.5V Operating temperature: 0°C to 70°C Packages: - 28-SSOP: MPC235L - 40-PDIP: MPC235E2 4 MPC235 Data Sheet MEGAWIN Pin Description Description Bi-directional I/O (sink LED directly) Bi-directional I/O with external interrupt 1 Bi-directional I/O with external interrupt 2 Bi-directional I/O Bi-directional I/O Bi-directional I/O Bi-directional I/O Bi-directional I/O Reset pin 6MHz crystal or resonator in 6MHz crystal or resonator out USB data + with PS/2 compatible I/O USB data - with PS/2 compatible I/O Voltage supply Ground 3.3V regulated output, a 0.1uF to 1uF capacitor should be V3.3 O added on this pin *1 P0.0~0.3 can be used to sink LED directly (without any external resistor). *2 P4.0~P4.1 only available on Die form. PIN Name P0.0~0.3 *1 P0.4/-INT0 P0.5/-INT1 P0.6~0.7 P1.0~1.7 P2.0~2.7 P3.0~3.7 P4.0~4.1 *2 RESB XTAL1 XTAL2 DP DM VCC VSS I/O I/O I/O I/O I/O I/O I/O I/O I/O I I O I/O I/O I I MEGAWIN MPC235 Data Sheet 5 Block Diagram W65C02 8-bits CPU DP / PS2CLK DM / PS2DATA 256 Bytes RAM 8K Bytes ROM 8-bits Timer Power Control Low-voltage Reset Watch Dog Timer DPM Control USB Control Clock Generator Port 0/1/2/4 Configurable I/O XTAL1 XTAL2 Port 0.0 ~ 0.7 Port 1.0 ~ 1.7 Port 2.0 ~ 2.7 Port 4.0 ~ 4.1 Port 3.0 ~ 3.7 Port 3 Configurable I/O Interrupt Control 6 MPC235 Data Sheet MEGAWIN Packages MEGAWIN MPC235 Data Sheet 7 Function Description Registers A Y X P PCL S PCH 1 Accumulator The accumulator is a general-purpose 8-bit register, which stores the results of most arithmetic and logic operations. In addition, the accumulator usually contains one of two data words used in these operations. Index Register (X, Y) There are two 8-bit index registers (X and Y), which may be used to count program steps or to provide an index value to be used in generating an effective address. When executing an instruction, which specifies indexed addressing, the CPU fetches the OP Code and the base address, and modifies the address by adding the index register to it prior to performing the desired operation. Pre- or post-index of index address is possible. Processor Status Register (P) The 8-bit processor status register contains seven status flags. Some of the flags are controlled by the program, others may be controlled both the program and the CPU. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 N V 1 B D I Z C N: Signed flag, 1 = negative, 0 = positive V: Overflow flag, 1 = true, 0 = false B: BRK interrupt command, 1 = BRK, 0 = IRQB D: Decimal mode, 1 = true, 0 = false I: IRQB disable flag, 1 = disable, 0 = enable Z: Zero flag, 1 = true, 0 = false C: Carry flag, 1 = true, 0 = false Program Counter (PC) The 16-bit program counter register provides the addresses, which step the micro-controller through sequential program instructions. Each time the micro-controller fetch an instruction from program memory, the lower byte of the program counter (PCL) is placed on the low-order 8 bits of the address bus and the higher byte of the program counter (PCH) is placed on the high-order 8 bits. The counter is incremented each time an instruction or data is fetched from program memory. Stack Pointer (S) The stack pointer is an 8-bit register, which is used to control the addressing of the variable-length stack. The stack pointer is automatically incremented and decremented under control of the micro-controller to perform stack manipulations under direction of either the program or interrupts (/NMI or /IRQ). The stack allows simple implementation of nested subroutines and multiple level interrupts. The stack pointer is initialized by the user’s firmware. 8 MPC235 Data Sheet MEGAWIN Memory Map There are 256 bytes SRAM in MPC235. They are working RAM (0000H to 007FH) and stacks (0180H to 01FFH). Locations 0100h to 017FH and the locations 0000h to 007FH share the same memory block. The address 00C0H to 00FFH and 0200H to 027FH are special function registers area. The 8k bytes ROM are addressed from 8000H to 9FFFH. The address mapping of MPC235 series is shown as below. 0000H ~ 007FH 0080H ~ 00BFH 00C0H ~ 00FFH 0100H ~ 017FH Zero Page SRAM Share Area SFR - 0180H ~ 01FFH Stack Area 0200H ~ 027FH 0280H Special Function Register 7FFFH 8000H ~ 800FH Interrupt Vector Area 8010H ~ 9FFFH Program / Table A000H FFFFH MEGAWIN MPC235 Data Sheet 9 Special Function Register (SFR) The address 00C0H to 00FFH and 0200H to 027FH are reserved for special function registers (SFR). The SFR is used to control or store the status of I/O, timers, system clock and other peripheral. Symbol IRQ_EN IRQ_ST IRQ_CLR TM0 TM0_CTL P0_BUF P1_BUF P2_BUF P3_BUF P4_BUF P0 P1 P2 P3 P4 WDT_ST WDT_CLR USB_CTL USB_ADDR USB_DI / USB_DO DPM_CTL DPMO DPMI PWR_CTL FCPU_SR RLH_EN P0_CR P0_MR P1_CR P1_MR P2_CR P2_MR P3_CR P3_MR P4_CR P4_MR Address 00C1 00C2 00C3 00C5 00C6 00D0 00D1 00D2 00D3 00D4 00D8 00D9 00DA 00DB 00DC 00DE 00DF 00E0 00E1 00E2 00E8 00E9 00EA 0200 0201 0202 0240 0241 0244 0245 0248 0249 024C 024D 0250 0251 Description Interrupt Request Enable Interrupt Request Status Flag Interrupt Request Clear Timer 0 Timer 0 Control Port 0 Output Buffer Port 1 Output Buffer Port 2 Output Buffer Port 3 Output Buffer Port 4 Output Buffer Port 0 Pad Value Port 1 Pad Value Port 2 Pad Value Port 3 Pad Value Port 4 Pad Value Watch Dog Timer Status Flag Watch Dog Timer Status Clear USB Control USB Register Address USB Register Data Buffer USB Bus Mode Control USB Bus Output for the PS/2 Mode USB Bus Output for the PS/2 Mode Power-Saving Control FCPU Selector Release Halt Mode Enable Port 0 Control Register Port 0 Mode Register Port 1 Control Register Port 1 Mode Register Port 2 Control Register Port 2 Mode Register Port 3 Control Register Port 3 Mode Register Port 4 Control Register Port 4 Mode Register Initial Value X 00 00 00 00 00 00 00 00 00 X X X X X 00 X 00 00 00 00 00 X 00 00 00 00 00 00 00 00 00 00 00 00 00 10 MPC235 Data Sheet MEGAWIN Interrupt Vectors Vector Address 8002H, 8003H 8006H, 8007H 8008H, 8009H 800AH, 800BH 800CH, 800DH 800EH, 800FH Item RESET USB TM0 P3 P04 P05 Priority 1 2 3 4 5 6 Properties Ext. Int. Int. Ext. Ext. Ext. Memo Initial reset USB interrupt Timer 0 overflow interrupt Port P3 interrupt vector Port P0.4 interrupt vector Port P0.5 interrupt vector There are six interrupt sources provided in MPC235. The flag IRQ_EN and IRQ_ST are used to control the interrupts. When flag IRQ_ST is set to ‘1’ by hardware and the corresponding bits of flag IRQ_EN has been set by firmware, an interrupt is generated. When an interrupt occurs, all of the interrupts are inhibited until the CLI or STA IRQ_CLR, #I instruction is invoked. Executing the SEI instruction can also disable the interrupts. MEGAWIN MPC235 Data Sheet 11 Interrupt Registers IRQ enable flag Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 00C1H IRQ_EN P05 P04 P3 TM0 USB Program can enable or disable the ability of triggering IRQ through this register. 0: Disable (default “0” at initialization) 1: Enable USB: USB event TM0: Timer0 underflow P3: Falling edge occurs at port 3 input mode P04, P05: Falling edge occurs at P0.4/P0.5 input mode Bit 0 R √ W √ IRQ status flag Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 00C2H IRQ_ST P05 P04 P3 TM0 USB When IRQ occurs, program can read this register to know which source triggering IRQ. R √ W - IRQ clear flag Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 00C3H IRQ_CLR P05 P04 P3 TM0 USB Program can clear the interrupt event by writing ‘1’ into the corresponding bit. Bit 0 - R - W √ 12 MPC235 Data Sheet MEGAWIN Watchdog Timer (WDT) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 R W WDT 3 WDT 2 WDT 1 WDT 0 √ RSTS 00DEH WDT_ST 00DFH WDT_CLR CLR -√ WDT［3:0］ : Contents of WDT RSTS: WDT reset status, set by hardware when WDT overflows, clear by firmware or hardware reset CLR: RSTS clear and WDT reset control bit, program can clear RSTS and reset WDT by writing “1” into this bit The watchdog timer (WDT) is organized as a 4-bit counter designed to prevent the program from unknown errors. If the WDT overflows, the WDT reset function will be performed. RSTS (Bit 7 of WDT_ST) is set by hardware when the WDT overflows and is cleared by hardware reset or writing 1 to bit 7 of WDT_CLR. The interval of WDT to cause reset is about 0.7s at 6MHz external oscillator. Programming one into the bit 7 of WDT_CLR register can reset the contents of the WDT. In normal operation, the application program must reset WDT before it overflows. A WDT overflow indicates that operation is not under control and the chip will be reset. The organization of the watchdog timer is shown as below WDT Fosc/2^18 Overflow signal Qw1 Qw2 Qw3 Qw4 R R R R S Q R System Reset WDT_ST.7 Hardware reset WDT_CLR.7