SM802105
ClockWorks™ 10GbE (156.25MHz, 312.5MHz), Ultra-Low Jitter, LVPECL Frequency Synthesizer
General Description
The SM802105 is a member of the ClockWorks™ family of devices from Micrel and provides an extremely low-noise timing solution for 10GbE Ethernet clock signals. It is based upon a unique patented RotaryWave® architecture that provides very-low phase noise. The device operates from a 3.3V or 2.5V power supply and synthesizes LVPECL output clocks at 156.25MHz or 312.5MHz. There are normally two clock outputs but one output can be achieved by powering down the second output with the OE pin. The SM802105 accepts a 25MHz crystal or LVCMOS reference clock. Data sheets and support documentation can be found on Micrel’s web site at: www.micrel.com.
Features
• Generates one or two LVPECL clock outputs at 156.25MHz or 312.5MHz • 2.5V or 3.3V operating range • Typical phase jitter @ 156.25MHz (1.875MHz to 20MHz): 110fs • Industrial temperature range • Green, RoHS, and PFOS compliant • Available in 24-pin 4mm × 4mm QFN package
Applications
• 10Gigabit Ethernet
Block Diagram
ClockWorks is a trademark of Micrel, Inc RotaryWave is a registered trademark of Multigig, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2011
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SM802105
Ordering Information
Part Number SM802105UMG SM802105UMGR
Note: 1. Devices are Green, RoHS, and PFOS compliant.
Marking 802105 802105
Shipping Tube Tape and Reel
Junction Temperature Range(1) –40°C to +85°C –40°C to +85°C
Package 24-Pin QFN 24-Pin QFN
Pin Configuration
24-Pin QFN (code) (Top View)
Pin Description
Pin Number 19, 20 22, 23 24 2 Pin Name /Q1, Q1 /Q2, Q2 VDDO2 VSSO2 Pin Type O, (DIF) O, (DIF) PWR PWR Pin Level LVPECL LVPECL Pin Function Differential Clock Output from Bank 1 156.25MHz or 312.5MHz Differential Clock Output from Bank 2 156.25MHz or 312.5MHz Power Supply for Output Bank 2 Power Supply Ground for Output Bank 2 PLL Bypass, Selects Output Source 3 PLL_BYPASS I, (SE) LVCMOS 0 = Normal PLL Operation 1 = Output from Input Reference Clock or Crystal 45KΩ pull-down 4 XTAL_SEL I, (SE) LVCMOS Selects PLL Input Reference Source 0 = REF_IN, 1 = XTAL, 45KΩ pull-up
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SM802105
Pin Description (Continued)
Pin Number 5, 11, 16, 18 1 13, 14, 15 17 21 8 9 10 6 7 12 Pin Name TEST VDD VSS VDDO1 VSSO1 REF_IN XTAL_IN XTAL_OUT FSEL OE1 OE2 PWR PWR PWR PWR I, (SE) I, (SE) O, (SE) I, (SE) I, (SE) I, (SE) LVCMOS 12pF crystal 12pF crystal LVCMOS LVCMOS LVCMOS Pin Type Pin Level Pin Function Factory Test pins, Do not connect anything to these pins. Core Power Supply Core Power Supply Ground Power Supply for Output Bank 1 Power Supply Ground for Output Bank 1 Reference Clock Input Crystal Reference Input, no load caps needed. See Fig. 5. Crystal Reference Output, no load caps needed. See Fig. 5. Frequency Select, 1 = 156.25MHz, 0 = 312.5MHz, 45KΩ pull-up Output Enable, Q1 disables to tri-state, 0 = Disabled, 1 = Enabled, 45KΩ pull-up Output Enable, Q2 disables to tri-state, 0 = Disabled, 1 = Enabled, 45KΩ pull-up
Application Information
Input Reference When operating with a crystal input reference, do not apply a switching signal to REF_IN. Crystal Layout Keep the layers under the crystal as open as possible. Do not place switching signals or noisy supplies under the crystal.
Truth Tables
PLL_BYPASS 0 1 − − XTAL_SEL − − 0 1 Output Frequency (MHz) 312.5 156.25 INPUT − − REF_IN XTAL OUTPUT PLL XTAL/REF_IN − −
FSEL 0 1
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SM802105
Absolute Maximum Ratings(1)
Supply Voltage (VDD, VDDOx) ........................................+4.6V Input Voltage (VIN) .............................. −0.50V to VDD + 0.5V Lead Temperature (soldering, 20s)............................ 260°C Case Temperature ..................................................... 115°C Storage Temperature (Ts) ......................... −65°C to +150°C
Operating Ratings(2)
Supply Voltage (VDD, VDDOx)................. +2.375V to +3.465V Ambient Temperature (TA).......................... –40°C to +85°C Junction Thermal Resistance(3) QFN (θJA) Still-Air......................................................... 50°C/W QFN (ψJB) Junction-to-Board ....................................... 30°C/W
DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5% VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5% TA = −40°C to +85°C. Symbol VDD, VDDOx VDD, VDDOx IDD REF_IN Parameter 2.5V Operating Voltage 3.3V Operating Voltage 156.25MHz - 1 output Supply current VDD + VDDO XTAL_SEL = 0 Outputs open 156.25MHz - 2 outputs 312.5MHz - 1 output 312.5MHz - 2 outputs 156.25MHz - 1 output IDD XTAL Supply current VDD + VDDO XTAL_SEL = 1 Outputs open 156.25MHz - 2 outputs 312.5MHz - 1 output 312.5MHz - 2 outputs Condition Min. 2.375 3.135 Typ. 2.5 3.3 97 114 109 131 87 104 99 121 Max. 2.625 3.465 125 148 140 170 113 135 128 158 mA mA Units V V
LVPECL DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5% VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5% TA = −40°C to +85°C. RL = 50Ω to VDDO − 2V Symbol VOH VOL VSWING
Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
Parameter Output High Voltage Output Low Voltage Output Voltage Swing
Condition
Min. VDDO – 1.145 VDDO – 1.945 0.6
Typ. VDDO – 0.97 VDDO – 1.77 0.8
Max. VDDO – 0.845 VDDO – 1.645 1.0
Units V V V
2. 3. 4.
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SM802105
LVCMOS (PLL_BYPASS, XTAL_SEL, OE1/2, FSEL) DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C. Symbol VIH VIL IIH IIL Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V −150 Condition Min. 2 −0.3 Typ. Max. VDD + 0.3 0.8 150 Units V V μA μA
REF_IN DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C. Symbol VIH VIL IIN Parameter Input High Voltage Input Low Voltage Input Current XTAL_SEL = VIL, VIN = 0V to VDD XTAL_SEL = VIH, VIN = VDD Condition Min. 1.1 −0.3 −5 20 Typ. Max. VDD + 0.3 0.6 5 Units V V μA µA
Crystal Characteristics
NDK NX2520SA
Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitor, C0 Correlation Drive Level Condition 12pF Load Min. Typ. 25 3 100 50 7 300 Max. Units MHz Ω pF uW Fundamental, Parallel Resonant
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SM802105
AC Electrical Characteristics(4, 5)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5% VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5% TA = −40°C to +85°C. RL = 50Ω to VDDO − 2V Symbol FOUT1 FOUT2 Ppm FREF TR/TF ODC TSKEW TLOCK Parameter Output Frequency 1 Output Frequency 2 Output ppm Variation Reference Input Frequency LVPECL Output Rise/Fall Time Output Duty Cycle Output-to-Output Skew PLL Lock Time 156.25MHz Integration Range (1.875MHz – 20MHz) Integration Range (12kHz – 20MHz) Tjit(∅) RMS Phase Jitter
(8)
Condition FSEL=1 FSEL=0 Crystal reference. Note 6 20% – 80% Within bank. Note 7
Min.
Typ. 156.25 312.5
Max.
Units MHz MHz
−50 25 80 48 175 50
50 350 52 45 20 110 250
ppm MHz ps % ps ms
312.5MHz Integration Range (1.875MHz – 20MHz) Integration Range (12kHz – 20MHz) 6.25MHz using 156.25MHz 12.5MHz using 312.5MHz
fs 110 250 -80 -85
Spurious Noise Components
Notes: 5. 6. 7. 8.
dBc
All phase noise measurements were taken with an Agilent 5052B phase noise system. Crystal tolerance at room less than ± 15ppm, over temp less than ±20ppm. Defined as skew between outputs at the same supply voltage and with equal load conditions and same frequency; Measured at the output differential crossing points. Measured using 25MHz crystal as the input reference source. If using an external reference input, use a low phase noise source. With an external reference, the phase noise will follow the input source phase noise up to about 1MHz.
April 2011
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SM802105
Phase Noise Plots
Phase Noise Plot: 156.25MHz, 1.875MHz − 20MHz 108fS
Phase Noise Plot: 156.25MHz, 12kHz − 20MHz 244fS
April 2011
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SM802105
Phase Noise Plots (Continued)
Phase Noise Plot: 312.5MHz, 1.875MHz − 20MHz 113fS
Phase Noise Plot: 312.5MHz, 12kHz − 20MHz 248fS April 2011
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Micrel, Inc.
SM802105
Figure 1. Duty Cycle Timing
Figure 2. All outputs Rise/Fall Time
Figure 3. RMS Phase/Noise Jitter
April 2011
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SM802105
Figure 4. LVPECL Output Load and Test Circuit
Figure 5. Crystal Input Interface
April 2011
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M9999-042111-A hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SM802105
Package Information
(4mm x 4mm) QFN
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2011 Micrel, Incorporated.
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