ML4662

March 1997 ML4662 10BASE-FL Transceiver GENERAL DESCRIPTION The ML4662 10Base-FL transceiver combined with the ML4622 or ML4624 fiber optic quantizers provides all of the functionality required to implement both an internal and external IEEE 802.3 10Base-FL MAU. The ML4662 offers a standard IEEE 802.3 AU interface that allows it to be directly connected to industry standard manchester encoder/decoder chips or and AUI cable. The ML4662 provides a highly integrated solution that requires a minimal number of external components, and is compliant to the IEEE 802.3 10Base-FL standard. The transmitter offers a current driven output that directly drives a fiber optic LED transmitter. Jabber, a 1MHz idle signal, and SQE Test are fully integrated onto the chip. The receiver accepts and ECL level input coming from the ML4622 or ML4624 fiber optic quantizers. The 1MHz idle signal is removed and the AUI output is activated when the receive squelch criteria is exceeded. A Link Monitor function is also provided for low light detection. FEATURES s s s s s s Combined with the ML4622 or ML4624, offers a complete implementation of an 10Base-FL Medium Attachment Unit (MAU) Incorporates an AU interface for use in an external MAU or an internal MAU Single +5 volt supply ±10% No crystal or clock required On-chip Jabber, 1MHz idle, and SQE Test with enable/ disable option Five network status LED outputs BLOCK DIAGRAM Plea 10 11 Tx+ Tx– ee M se S 4 SQEN/JABD 4667 L 1MHz IDLE SIGNAL New for +5V 12 19 igns Des TxOUT 17 VCCTx (+5V) RTSET NC/PEAK AUI RECEIVER FIBER OPTIC LED DRIVER 18 Tx SQUELCH JABBER LMONIN SQE RECEIVE SQUELCH FREQUENCY AUI DRIVER 10MHz GATED OSCILLATOR RxIN+ RxIN– 22 2 3 COL+ COL– LINE RECEIVER Tx Rx LED DRIVERS 26 25 Rx+ 6 Rx– 7 AUI DRIVER LOOPBACK MUX BIAS 27 XMT LMON 15 24 GND 5 VCC (+5V) 8 RRSET 13 LBDIS 23 1 CLSN JAB 28 RCV 16 +5V 1 ML4662 PIN CONNECTION ML4662 28-Pin PLCC (Q28) SQEN/JABD 4 GND Rx+ Rx– VCC VCC Tx+ Tx– 5 6 7 8 9 10 11 12 3 2 1 28 27 26 25 24 23 22 21 20 RxIN+ RxIN– LMON LBDIS LMONIN GND GND NC/PEAK COL+ COL– CLSN 13 14 15 16 BIAS VCCTx JAB 19 17 18 2 TxOUT RTSET RRSET NC XMT RCV ML4662 PIN DESCRIPTION PIN NAME FUNCTION PIN NAME FUNCTION 1 CLSN Indicates that a collision is taking place. Active low LED driver, open collector. Event is extended with internal timer for visibility. Gated 10MHz oscillation used to indicate a collision, SQE test, or jabber. Balanced differential line driver outputs that meet AUI specifications. 19 NC/PEAK 2 3 COL+ COL– Normally this pin can be left floating. (tying it to GND or VCC is OK too.) Some fiber optic LEDs may need an additional peaking circuit to speed-up the rise and fall times. For this case, tie pin 19 (NC/PEAK) to pin 18 (TxOUT). When using the HP HFBR 1414, let pin 19 float. Using the peaking circuit may deteriorate optical overshoot and undershoot. Ground reference. Ground reference. Link Monitor Input from the ML4622 or ML4624. This input must be low (active) for the receiver to unsquelch. Loopback Disable. When this pin is tied to VCC , the AUI transmit pair data is not looped back to the AUI receive pair, and collision is disabled. When this pin is tied to GND (normal operation), the AUI transmit pair data is looped back to the AUI receiver pair. Link Monitor LED status output. This pin is pulled low when LMONIN is low and there are transitions on RxIN± indicating and idle signal or active data. If either LMONIN goes high or transitions cease on RxIN±, LMON will go high, Active low LED driver, open collector. Fiber optic receive pair. This ECL level signal is received from the ML6422 or ML4624 fiber optic quantizer. When this signal exceeds the receive squelch requirements, and the LMONIN input is low, the receive data is buffered and sent to the AUI receive outputs. BIAS output voltage for the AUI Tx+, Tx– inputs when they are AC coupled. Jabber network status LED. When in the Jabber state, this pin will be low and the transmitter will be disabled. In the Jabber “OK” state this pin will be high. Open collector TTL output. 4 SQEN/JABD SQE Test Enable, Jabber Disable. When tied low, SQE test is disabled, when tied high SQE test is enabled. When tied to BIAS both SQE test and Jabber are disabled. GND Rx+ Rx– Ground reference Manchester encoded receive data output to the local device. Balanced differential line driver outputs that meet AUI specifications. +5 volt power input. Balanced differential line receiver inputs that meet AUI specifications. These inputs may be transformer, AC or DC coupled. When transformer or AC coupled, the BIAS pin is used to set the common mode voltage Sets the current driven output of the transmitter. A 1% 61.9kΩ resistor tied from this pin to VCC sets the biasing currents for internal nodes. No Connection Indicates that transmission is taking place. Active low LED driver, open collector. Event is extended with internal timer for visibility. Indicates that the transceiver is receiving a frame from the optical input. Active low LED driver, open collector. Event is extended with internal timer for visibility. +5 volt supply for LED driver. Fiber optic LED driver output. 20 21 22 GND GND LMONIN 5 6 7 23 LBDIS 8 9 10 11 VCC VCC Tx+ Tx– 24 LMON 12 13 RTSET RRSET 14 15 NC XMT 25 26 RxIN– RXIN+ 16 RCV 27 BIAS 28 17 18 VCC Tx TxOUT JAB 3 ML4662 ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Power Supply Voltage Range VCC .................................................... GND –0.3 to 6V Input Voltage Range Digital Inputs (SQEN, LMONIN, LBDIS) .............................................. GND –0.3 to VCC + 0.3V Tx+, Tx–, RxIN+, RxIN– ........ GND –0.3 to VCC + 0.3V Input Current RRSET, RTSET, JAB, CLSN, XMT, RCV, LMON ..... 60mA Output Current TxOUT ............................................................... 70mA Junction Temperature ............................................. 150°C Storage Temperature Range ..................... –65°C to 150°C Lead Temperature (Soldering) ................................. 260°C Thermal Resistance (θJA) ...................................... 68°C/W OPERATING CONDITIONS Supply Voltage (VCC) ........................................... 5V ± 5% LED on Current ....................................................... 10mA RRSET .......................................................... 61.9kΩ ± 1% RTSET ............................................................. 162Ω ± 1% ELECTRICAL CHARACTERISTICS SYMBOL ICC VOL IOUT VSQ VINCM VDO VCM VDOO VBIAS VSQE PARAMETER Power Supply Current While Transmitting LED Drivers Transmit Peak Output Current Transmit Squelch Voltage Level (Tx+, Tx–) Common mode Input Voltage (Tx±, RxIN±) Differential Output Voltage (Rx±, COL±) Common Mode Output Voltage (Rx±, COL±) Differential Output Voltage Imbalance (Rx±, COL±) BIAS Voltage SQE/JABD Unless otherwise specified, TA = Operating Temperature Range, VCC = 5V ± 10% (Note 1) CONDITIONS VCC = 5V, RTSET = 162Ω (Note 2) IOL = 10mA (Note 3) RTSET = 162Ω, VCC = VCCTx = 5V ±5% (Note 4) 47 –300 2 ±550 4.0 ±40 3.2 SQE Test Disable Both Disabled Both Enabled VLBTH LBDIS Threshold Disabled Enabled 1.5 VCC – 0.5 VCC – 0.10 1 0.3 VCC – 2 52 –250 MIN TYP MAX 200 0.8 60 –200 VCC – 0.5 ±1200 UNITS mA V mA mV V mV V mV V V V V V V 4 ML4662 AC ELECTRICAL CHARACTERISTICS SYMBOL TRANSMIT FTXIDF PTXDC tTXNPW tTXODY tTXLP tTXSOI tTXSDY tTXJ tTXFPW RECEIVE FRXSFT tRXODY tRXFX tRXSDY tRXJ tAR tAF COLLISION tCPSQE tSQEXR FCLF PCLPDC tSQEDY tSQETD Collision Present to SQE Assert Time for SQE to Deactivate After Collision Collision Frequency Collision Pulse Duty Cycle SQE Test Delay (Tx Inactive to SQE) SQE Test Duration 0 0 8.5 40 0.6 0.5 1.0 50 350 700 11.5 60 1.6 1.5 ns ns MHz % µs µs Receive Squelch Frequency Threshold Receive Turn-On Delay Last Bit Received to Slow Decay Output Receive Steady State Propagation Delay Receive Jitter Differential Output Rise Time 20% to 80% (Rx±, COL±) Differential Output Fall Time 20% to 80% (Rx±, COL±) 4 4 230 300 15 50 ± 1.5 2.51 4.5 270 MHz ns ns ns ns ns ns Transmit Idle Frequency Transmit Idle Duty Cycle Transmit Turn-On Pulse Width Transmit Turn-On Delay Transmit loopback Start up Delay Transmit Start of Idle Transmit Steady State Propagation Delay Transmit Jitter into 31Ω Load Transmit Turn-off Pulse Width 180 400 15 0.85 45 20 200 500 2100 50 ±1.5 1.25 55 MHz % ns ns ns ns ns ns ns PARAMETER MIN TYP MAX UNITS JABBER AND LED TIMING tJAD tJRT tJSQE tLED tLLPH tLLCL Note 1: Note 2: Note 3: Note 4: Jabber Activation Delay Jabber Reset Unjab Time Delay from Outputs Disabled to Collision Oscillator On RCV, CLSN, XMT On Time Low Light Present to LMON High Low Light Present to LMON Low 20 250 70 450 100 150 750 ms ms ns 8 3 250 16 5 32 10 750 ms µs ms Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions. This does not include the current from the AUI pull-down resistors, or LED status outputs. LED drivers can sink up to 20mA, but VOL will be higher. Does not include prebias current for fiber optic LED which would typically be 3mA. 5 6 +5V ALL 510Ω RP1 0.1µF C13 2,6,7 3 FIBER OPTIC CABLE 15 16 1 28 24 XMT RCV CLSN JAB LMON 19 TxOUT 18 16 COL– RTSET R2 15 2 COL+ LBDIS +5V 61.9KΩ ±1% 5pF +VRF 10 Tx+ 12 VCC CF1 RxIN+ 26 9 ECL– 7 6 CF2 VIN– 7 Rx– 360Ω C9 2 1 VIN+ 4 C8 0.01 C7 3 R17 10Ω 6 +VRF 13 Tx– BIAS RRSET 13 R3 0.1µF 27 R4 12 10 R5 C1 39Ω 39Ω 11 23 360Ω 12 R7 162Ω ±1% R16 1kΩ +5V R1 360Ω 3 +5V HP HFBR1414 OR OPTEK OPC1414 FIBER OPTIC TRANSMITTER ML4662 CHASSIS REF C17 P1 1 9 1 2 10 3 AUL.CP– AUL.CP+ AUL.TX– AUL.TX+ CI 11 4 2 12 5 13 6 AUL.RX– AUL.RX+ AULPWR+ AULPWR– 4 14 7 D0 ML4662 R8 15 C12 0.1µF –VRF FIBER OPTIC CABLE 8 5 7 D1 ML4622 R6 9 6 Rx+ RxIN– 25 10 ECL+ 360Ω 8 SQEN/JABD VCC GND LMONIN 8 22 –VRF 9 17 5 +5V 0.01 TTL VDC 5 LINK GND TTL GND MON TTL OUT CMPEN VTHADJ VREF CTIMER 0.1 C15 1 8 11 2 15 14 16 13 .05 NC +VRF C6 –VRF 4 HP HFBR2416 OR 5 OPTEK OPC2416 8 7 3 FIBER OPTIC RCVR Figure 1. ML4662 Schematic Diagram 510Ω RP1 BIAS (27) D1 VR1 4.7µH L1 + C4 4.7µ C5 0.1µ C10 L2 4.7µH + 4.7 C11 0.1 –VRF +VRF Q1 IN LM340 OUT GND 33µ C3 0.1µ 0.1 C16 –VRF VCC NOTE: IF TTLOUT IS USED, TIE GNDTTL TO UNFILTERED GROUND AND REMOVE L1. IF TTLOUT AND ECL OUTPUTS ARE BOTH USED, ADD 3K PULLDOWN RESISTORS AT ECL OUTPUTS. + C2 ML4662 SYSTEM DESCRIPTION Figure 1 shows a schematic diagram of the ML4662 in an internal or external 10Base-FL MAU. On one side of the transceiver is the AU interface and on the other is the fiber optic interface. The AU interface is AC coupled when used in an external transceiver or can be AC or DC coupled when used in an internal transceiver. The AU interface for an external transceiver includes isolation transformers, some biasing resistors, and a voltage regulator for power. The fiber optic side of the transceiver requires an external fiber optic transmitter, fiber optic receiver, and the ML4622 or ML4624 fiber optic quantizers. The transmitter uses a current driven output that directly drives the fiber optic transmitter. The receive side of the transceiver accepts the data after passing through the fiber optic receiver and the ML4622/ML4624 fiber optic quantizer. AU INTERFACE The AUI interface consists of 3 pairs of signals: DO, CI, and DI (Figure 1). The DO pair contains transmit data from the DTE which is received by the transceiver and sent out onto the fiber optic cable. The DI pair contains valid data that has been either received from the fiber optic cable or looped back from the DO, and output through the DI pair to the DTE. The CI pair indicates whether a collision has occurred. It is an output that oscillates at 10MHz if a collision Jabber or SQE Test has taken place, otherwise it remains idle. When the transceiver is external, these three pairs are AC coupled through isolation transformers, while an internal transceiver may be AC or DC coupled. For the AC coupled interface, DO (which is an input) must be DC biased (shifted up in voltage) for the proper common mode input voltage. The BIAS pin serves this purpose. When DC coupled, the transmit pair coming from the serial interface provides this common mode voltage, and the BIAS pin is not connected. The two 39Ω 1% resistors tied to the Tx+ and Tx– pins provide a point to connect the common mode bias voltage as discussed above, and they provide the proper matching termination for the AUI cable. The CI and DI pair, which are output from the transceiver to the AUI cable, require 360Ω pull down resistors when terminated with a 78Ω load. However on a DTE card, CI and DI do not need 78Ω terminating resistors. This also means that the pull down resistors on CI and DI can be 1kΩ or greater depending upon the particular Manchester encoder/decoder chip used. Using higher value pull down resistors as in a DTE card will save power. The AUI drivers are capable of driving the full 50 meters of cable length and have a rise and fall time of typically 4ns. In the idle state, the outputs go to the same voltage to prevent DC standing current in the isolation transformers. TRANSMISSION The transmit function consists of detecting the presence of data from the AUI DO input (Tx+, Tx–) and driving that data onto the fiber optic LED transmitter. A positive signal on the Tx+ lead relative to the Tx– lead of the DO circuit will result in no current, hence the fiber optic LED is in a low light condition. When Tx+ is more negative than Tx–, the ML4662 will sink current into the chip and the LED will light up. Before data will be transmitted onto the fiber optic cable from the AUI interface, it must exceed the squelch requirements for the DO pair. The Tx squelch circuit serves the function of preventing any noise from being transmitted onto the fiber. This circuit rejects signals with pulse widths less than typically 20ns (negative going), or with levels less than –250mV. Once Tx squelch circuit has unsquelched, it looks for the start of idle signal to turn on the squelch circuit again. The transmitter turns on the squelch again when it receives an input signal at TxIN± that is more positive than –250mV for more than approximately 180ns. At the start of a packet transmission, no more than 2 bits are received from the DO circuit, and are not transmitted onto the fiber optic cable. The difference between start-up delays (bit loss plus steady-state propagation delay) for any two packets that are separated by 9.6µs or less will not exceed 200ns. FIBER OPTIC LED DRIVER The output stage of the transmitter is a current mode switch which develops the output light by sinking current through the LED into the TxOUT pin. Once the current requirement for the LED is determined, the RTSET resistor is selected. The following equation is used to select the correct RTSET resistor:   RTSET =  52mA  162Ω  IOUT  (1) The transmitter enters the idle state when it detects start of idle on Tx+ and Tx– input pins. After detection, the transmitter switches to a 1MHz output idle signal. The output current is switched through the TxOUT pin during the on cycle and through the VCCTx pin during the off cycle (Figure 2). Since the sum of the current in these two pins is constant, VCCTx should be connected as close as possible to the VCC connection for the LED (Figure 2). VCCTx TxOUT IOUT Figure 2. Fiber Optic LED Driver Structure. 7 ML4662 VCC 51Ω 51Ω 51Ω RTSET = 560Ω IOUT = 15.9mA ECL oscillator to turn on and the data on the DI pair will follow RxIN±. After a collision is detected, the collision oscillator will remain on until either DO or RxIN go idle. Loopback can be disabled by strapping LBDIS to VCC. In this mode the chip operates as a full duplex transmitter and receiver, and collision detection is disabled. A loopback through the transceiver can be accomplished by tying the fiber transmitter to the receiver. SQE TEST FUNCTION (SIGNAL QUALITY ERROR) The SQE test function allows the DTE to determine whether the collision detect circuitry is functional. After each transmission, during the inter-packet gap time, the collision oscillator will be activated for (typically) 1µs. The SQE test will not be activated if the chip is in the low light state, or the jabber on state. For SQE to operate, the SQEN pin must be tied to VCC. This allows the MAU to be interfaced to a DTE. The SQE test can be disabled by tying the SQEN pin to ground, for a repeater interface. JABBER FUNCTION REQUIREMENTS The Jabber function prevents a babbling transmitter from bringing down the network. Within the transceiver is a Jabber timer that starts at the beginning of each transmission and resets at the end of each transmission. If the transmission last longer than 20ms the jabber logic disables the transmitter, and turns on the collision signal COL+, COL–. When Tx+ and Tx– finally go idle, a second timer measures 0.5 seconds of idle time before the transmitter is enabled and collision is turned off. Even though the transmitter is disabled during jabber, the 1MHz idle signal is still transmitted. LED DRIVERS The ML4662 has five LED drivers. The LED driver pins are active low, and the LEDs are normally off. The LEDs are tied to their respective pins through a 500Ω resistor to 5 Volts. The XMT, RCV and CLSN pins have pulse stretchers on them which enables the LEDs to be visible. When transmission or reception occurs, the LED XMT, RCV or CLSN status pins will activate low for several milliseconds. If another transmit, receive or collision conditions occurs before the timer expires, the LED timer will reset and restart the timing. Therefore rapid events will leave the LEDs continuously on. The JAB and LMON LEDs do not have pulse stretchers on them since their conditions occur long enough for the eye to see. LOW LIGHT CONDITION The LMON LED output is used to indicate a low light condition. LMON is activated low when both LMONIN is low and there are transitions on RxIN± less than 3µs apart. If either one of these conditions do not exist, LMON will go high. VCCTx TxOUT Figure 3. Converting Optical LED Driver Output to Differential ECL. If not driving an optical LED directly, a differential output can be generated by tying resistors from VCCTx and TxOUT to VCC as shown in Figure 3. The minimum voltage on these two pins should not be less than VCC – 2V. RECEPTION The input to the transceiver comes from the ECL outputs of the ML4622 or ML4624. At this point it is a clean digital ECL signal. At the start of packet reception no more than 2.5 bits are received from the fiber cable and not transmitted onto the DI circuit. The receive squelch will reject frequencies lower than 2.51MHz and will also reject any receive input if the LMONIN pin is high. While in the unsquelch state, the receive squelch circuit looks for the start of idle signal at the end of the packet. Start of idle occurs when the input signal remains idle for more than 160ns. When start of idle is detected, the receive squelch circuit returns to the squelch state and the start of idle signal is output on the DI circuit (Rx+, Rx–). COLLISION Whenever the receiver and the transmitter are active at the same time the chip will activate the collision output, except when loopback is disabled (LBDIS = VCC ). The collision output is a differential square wave matching the AUI specifications and capable of driving a 78Ω load. The frequency of the square wave is 10MHz ± 15% with a 60/ 40 to 40/60 duty cycle. The collision oscillator also is activated during SQE Test and Jabber. LOOPBACK The loopback function emulates a 10Base-T transceiver whereby the transmit data sent by the DTE is looped back over the AUI receive pair. Some LAN controllers use this loopback information to determine whether a MAU is connected by monitoring the carrier sense while transmitting. The software can use this loopback information to determine whether a MAU is connected to the DTE by checking the status of carrier sense after each packet transmission. When data is received by the chip while transmitting, a collision condition exits. This will cause the collision 8 ML4662 TIMING DIAGRAMS tTXNPW Tx+ VALID Tx– tTXODY TxOUT IDLE tTXLP Rx+ Rx– VALID DATA tTXSDY VALID DATA tTXFPW tTXSOI IDLE DATA 1 FTXIDF Figure 4. Transmit and Loopback Timing RxIN+ RxIN– VALID tRXODY Rx+ VALID DATA Rx– DATA tRXSDY tAR tAF tRXFX Figure 5. Receive Timing Tx+ Tx– VALID DATA RxIN+ RxIN– tCPSQE COL+ CS0 COL– VALID DATA Rx+ Tx Rx– Tx Rx Rx Rx Figure 6. Collision Timing RxIN+ VALID RxIN– DATA Tx+ Tx– tCPSQE COL+ CS0 COL– VALID DATA Figure 7. Collision Timing 9 ML4662 TIMING DIAGRAMS RxIN+ RxIN– Tx+ Tx– VALID tSQEXR COL+ COL– CS0 DATA Rx+ Rx– Rx Rx Rx Tx Tx Tx Figure 8. Collision Timing Tx+ Tx– RxIN+ RxIN– VALID tSQEXR COL+ COL– CS0 DATA Rx+ Rx– RxIN RxIN RxIN RxIN RxIN Figure 9. Collision Timing 1 FCLF COL+ COL– Figure 10. Collision Timing TxOUT VALID DATA tSQEDY COL+ tSQETD CS0 COL– Figure 11. SQE Timing 10 ML4662 TIMING DIAGRAMS Tx+ VALID Tx – tJAD VALID DATA tJSQE COL+ CS0 COL– tJRT DATA TxOUT Figure 12. Jabber Timing Tx+ Tx– Typ. 150ns tLED XMT Figure 13. LED Timing RxIN+ RxIN– tLED RCV Figure 14. LED Timing RxIN+ RxIN– LMONIN LMON tLLPH tLLCL Figure 15. LED Timing 11 ML4662 PHYSICAL DIMENSIONS inches (millimeters) Package: Q28 28-Pin PLCC 0.485 - 0.495 (12.32 - 12.57) 0.450 - 0.456 (11.43 - 11.58) 1 0.042 - 0.056 (1.07 - 1.42) 0.025 - 0.045 (0.63 - 1.14) (RADIUS) 0.042 - 0.048 (1.07 - 1.22) PIN 1 ID 8 22 0.450 - 0.456 0.485 - 0.495 (11.43 - 11.58) (12.32 - 12.57) 0.300 BSC (7.62 BSC) 0.390 - 0.430 (9.90 - 10.92) 15 0.050 BSC (1.27 BSC) 0.026 - 0.032 (0.66 - 0.81) 0.165 - 0.180 (4.06 - 4.57) 0.148 - 0.156 (3.76 - 3.96) 0.009 - 0.011 (0.23 - 0.28) 0.099 - 0.110 (2.51 - 2.79) 0.013 - 0.021 (0.33 - 0.53) SEATING PLANE ORDERING INFORMATION PART NUMBER ML4662CQ TEMPERATURE 0°C to 70° C PACKAGE 28-Pin PLCC (Q28) © Micro Linear 1997 is a registered trademark of Micro Linear Corporation Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946. Other patents are pending. Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application. 2092 Concourse Drive San Jose, CA 95131 Tel: 408/433-5200 Fax: 408/432-0295 DS4662-01 12