July 2000
ML4664*/ML4669* 10BASE-FL to 10BASE-T Converter
GENERAL DESCRIPTION
The fully pin-compatible ML4664/ML4669 pair provide conversion from 10BASE-T copper media to 10BASE-FL fiber media in a single chip. They are compliant with Ethernet IEEE 802.3 10BASE-T and 10BASE-FL standards. The ML4664/69 uses a single 5V supply, and requires no crystal or clock. Their 10BASE-FL transmitter offers a current drive output that directly drives a fiber optic LED transmitter. Their receiver offers a highly stable fiber optic data quantizer capable of accepting input signals as low as 2mVP-P with a 55dB dynamic range. The 10BASE-T portion of the pair contains current driven transmitter outputs that offer superior performance because their switching is highly symmetric, resulting in lowered RFI noise and jitter. By changing one external resistor the pair easily interfaces to 100W unshielded twisted pair, 150W shielded twisted pair, or a range of other characteristic impedances. The ML4664 does not pass along disconnect information, while the ML4669 does. A loss of light at the optical inputs does not stop link pulses from being sent at the twisted pair transmitter in the ML4664, but in the ML4669 the link pulses stop. Also, a loss of link at the twisted pair inputs will not stop the optical transmitter from sending idle in the ML4664, but the ML4669 stops sending idle.
FEATURES
s s s
Full duplex operation Five network status LED outputs Industrial temperature option
10BASE-FL FEATURES:
s
Highly stable data quantizer with 55dB input dynamic range Input sensitivity as low as 2mVP-P Up to 100mA maximum current driven fiber optic LED output for accurate launch power (PLCC package)
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10BASE-T FEATURES:
s s s s s
Current driven output for low RFI noise and low jitter Drives 100W unshielded or 150W shielded twisted pair Polarity detect status pin capable of driving an LED Automatic polarity correction On-chip link test with enable/disable option
* Some Packages Are Obsolete
BLOCK DIAGRAM
LTF LINK PULSE CHECK TPLED POLDIS IDLE GENERATOR RRSET RTSETOP
TPIN
2
RX SQUELCH TP
OP TX
OPOUT OPVCC
POLARITY CORRECT
LINK PULSE GENERATOR RX SQUELCH TP TPOUT 2 RTSETTP TP TX TxCAP0 TxCAP1 LMON
(LOW LIGHT)
THRESHOLD GENERATOR
QUANTIZER OPLED VDC CTIMER
2
OPIN
1
ML4664/ML4669
PIN CONFIGURATION
ML4664/ML4669 28-Pin PLCC (Q28)
CTIMER OPLED AVCC OPINP TPLED
3
TPINP
4 TPINN VCC TxCAP0 TxCAP1 GND TPOUTN TPOUTP 5 6 7 8 9 10 11
LTF
2
1 28 27 26 25 24 23 22 21 20 19 OPINN AGND VTHADJ VREF VDC GND OPOUT
12 13 14 15 16 17 18
VCC RRSET
POLDIS
LMON
TOP VIEW
ML4664/ML4669 32-Pin TQFP (H32-7)
CTIMER OPLED OPINP TPLED TPINP AVCC LTF NC
TPINN NC VCC TxCAP0 TxCAP1 GND TPOUTN TPOUTP
32 31 30 29 28 27 26 25 24 1 2 3 4 5 6 7 8 9 23 22 21 20 19 18 17 10 11 12 13 14 15 16
RTSETOP
OPVCC
RTSETP
OPINN AGND VTHADJ VREF VDC NC GND OPOUT
NC
POLDIS
RTSETP
VCC
RRSET
RTSETOP
LMON
TOP VIEW
2
OPVCC
ML4664/ML4669
PIN DESCRIPTION (Pin Number in Parentheses is for TQFP Version)
PIN NAME FUNCTION PIN NAME FUNCTION
1(29)
CTIMER
A capacitor from this pin to VCC determines the Link Monitor response time. Link Test Fail. Active high. Normally this pin is low, indicating that the link is operational. If the link goes down resulting from the absence of link pulses or frames being received, the chip will go into the Link Test Fail state and bring LTF high. When the ML4664 is in the link test fail state, the optical and twisted pair transmitters are disabled from sending data. However, the optical transmitter does send an idle signal, and link pulses are sent at the twisted pair transmitter. When the ML4669 is in link test fail state, the optical and twisted pair transmitters are disabled from sending data. Also, the optical transmitter will not send an idle signal. However, link pulses may be sent at the twisted pair transmitter, depending on the optical inputs. See Table 1. This pin may be grounded to disable Link Test. In this mode no link pulses are sent and the link will not fail if no link pulses are received. If this pin is not used as an LED driver, and is not grounded, a 2kW 5% resistor should be connected between this pin and VCC.
7(4) 8(5)
TxCAP0 TxCAP1
2(30)
LTF
An external capacitor of 680pF is tied between these two pins to set the pulse width for the preequalization on the twisted pair transmitter. If these two pins are shorted together, no pre- equalization occurs. If the ML4664/ML4669 is driving only a short cable, or board traces, these pins may be shorted. Ground reference
9(6) GND 20(18) 10(7) 11(8)
TPOUTN Pre-equalized differential balanced TPOUTP current driven output. These outputs are connected to a balanced transmit output filter which drives the twisted pair cable through pulse transformers. The output current is set with an external resistor connected to RTSET allowing the chip to drive 100W unshielded , 150W shielded twisted pair cables or a range of other characteristic impedances. Receive Polarity status. Active low LED Driver, open collector output. Indicates the polarity of the receive twisted pair regardless of auto polarity correction. When low, receive polarity is reversed. When high, receive polarity is correct. This pin may be grounded to disable the polarity circuit. If this pin is not used as an LED driver, and is not grounded, a 2kW, 5% resistor should be connected between this pin and VCC.
12(10) POLDIS
3(31)
TPLED
Indicates that reception is taking place on the TPINP, TPINN pair. Active low LED driver, open collector. It is extended 16ms for visibility. Optionally, this pin may be grounded to disable the optical output. If this pin is not used as an LED driver and is not grounded, a 2kW, 5% resistor should be connected between TPLED and VCC. Twisted Pair receive data input. When this signal exceeds the receive squelch requirements the receive data is buffered and sent to the Rx± outputs. 5V input
13(11) RTSETTP When using 100W unshielded twisted pair, a 220W resistor is tied between this pin and VCC. When using 150W shielded twisted pair, a 330W resistor is tied between this pin and VCC. 15(13) RRSET A 1% 61.9kW resistor tied from this pin to VCC is used for internal biasing.
4(32) 5(1)
TPINP TPINN
16(14) RTSETOP Sets the current driven output of the transmitter. A 115W resistor should be tied between this pin and VCC.
6(3) VCC 14(12)
3
ML4664/ML4669
PIN DESCRIPTION (Continued)
PIN NAME FUNCTION PIN NAME FUNCTION
17(15) LMON
Link Monitor “Low Light” LED status output. Pulled low when voltage on the OPINP, OPINN inputs exceed min threshold set by VTHADJ , and there are transitions on OPINP, OPINN indicating an idle signal or active data. If the voltage on OPINP, OPINN inputs falls below the minimum threshold or transitions cease on OPINP, OPINN, LMON will go high. Active low LED driver, open collector. In the low light state, optical and twisted pair transmitters are disabled from sending data. The optical transmitter of the ML4664 does send an idle signal, and link pulses are sent at the twisted pair transmitter. For the ML4669, the twisted pair transmitter will not send link pulses, the optical transmitter may send an idle signal, depending on inputs. See Table 1.
22(21) VREF 23(22) VTHADJ 24(23) AGND 25(24) OPINN
A 2.5V reference with respect to GND This input pin sets the link monitor threshold Analog Filtered Ground This input pin should be capacitively coupled to filtered AVCC. The input resistance is approximately 1.3kW. This input pin should be capacitively coupled to the input source. The input resistance is approximately 1.3kW. Analog Filtered 5V Indicates reception is taking place on the OPINP, OPINN pair. Active low LED driver, open collector. It is extended 16ms for usability. This pin may be grounded to disable the twisted pair outputs. If this pin is not used as an LED driver, and is not grounded, a 2kW, 5% resistor should be connected between this pin and VCC.
26(25) OPINP
27(26) AVCC 28(28) OPLED
18(16) OPVCC 19(17) OPOUT 21(20) VDC
5V supply for fiber optic LED driver Fiber optic LED driver output An external capacitor on this pin integrates an error signal which nulls the offset of the input amplifier. If the DC feedback loop is not being used, this pin should be connected to VREF.
4
ML4664/ML4669
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Power Supply Voltage Range VCC ................................................................... GND –0.3 to 6V Input Voltage Range: Digital Inputs (SQEN, LBDIS) ....................... GND –0.3 to VCC +0.3V Tx+, Tx–, VIN+, VIN– .............. GND –0.3 to VCC +0.3V Junction Temperature ............................................. 150°C Storage Temperature ................................ –65°C to 150°C Lead Temperature (Soldering) ................................ 260°C Thermal Resistance (qJA) PLCC ............................................................... 68°C/W TQFP ............................................................... 80ºC/W
OPERATING CONDITIONS
Temperature Range ML4664/ML4669CX .................................. 0°C to 70°C ML4664/ML4669IQ ............................... –40°C to 85°C Supply Voltage (VCC) ......................................... 5V ± 5% LED on Current ...................................................... 10mA RRSET ........................................................ 61.9kW ± 1% RTSETOP ....................................................... 115W ± 1% RTSETTP ........................................................ 220W ± 1%
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, TA = Operating Temperature Range, VCC = OPVCC = AVCC = 5V ± 5% (Note 1)
SYMBOL
ICC VREF
PARAMETER
Power Supply Current While Transmitting Reference Voltage
CONDITIONS
RTSETOP = 115W C Suffix I Suffix
MIN
TYP
MAX
140
UNITS
mA V V V mA mA mA
2.30 2.25 1.5 47 46 42 300 450 50 300 4 52
2.60 2.67 3.5 57 58.5
VOL IOPOUT
LED Drivers: VOL OP Transmit Peak Output Current
RL = 300 for OPLED, TPLED, POLLED LTF, and LMON RTSETOP = 115 (Note 2) C Suffix I Suffix
ITPOUT VTPSQ HTP VTPIN RTPIN VOPTH HOP VOPIN ROPIN VOPCM AV VOFF VN ITH
TP Transmit Peak Output Current TP Receive Squelch Voltage TP Receive Squelch Hysteresis TP Receive Input Voltage TP Receive Input Resistance OP Receive Input Threshold Voltage OP Receive Input Threshold Hysteresis OP Receive Input Voltage OP Receive Input Resistance OP Receive Common Mode Voltage Amplifier Gain Input Offset Input Referred Noise Input Bias Current at VTHADJ
RTSETTP = 220
585
mVP-P %
3100
mVP-P kW
VTHADJ = VREF
5
6 20
7
mVP-P %
2 0.8 1.3 1.65 100 VDC = VREF (DC Loop Inactive) 50MHz Bandwidth VTHADJ = VREF –200 3 25 0
1600 2.0
mVP-P kW V V/V mV µV
200
µA
5
ML4664/ML4669
ELECTRICAL CHARACTERISTICS (Continued)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS OP TO TP (SEE FIGURE 1)
tTPODY tTPSDY tTPSPW tPS Twisted Pair Start-up Delay Twisted Pair Steady State Delay Twisted Pair Turn Off Pulse Width Twisted Pair Jitter 180 ±3.5 500 35 ns ns ns ns
TP TO OP (SEE FIGURE 2)
tOPODY tOPSDY tOPDI 1/tIDF PIDC tOPJ Optical Transmit Start-up Delay Steady State Delay Turn Off Width from Data to Idle Idle Frequency Idle Duty Cycle Jitter into 31W Load 400 0.85 45 500 15 2100 1.25 55 ±1.5 ns ns ns MHz % ns
OPTICAL LINK VERIFICATION (SEE FIGURES 3-5)
tOLL tOLM tOLO No Light (No Transitions) to LMON High Low Light (Below Threshold) to LMON High Light On (Above Threshold, Transitions