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ML4769ES

ML4769ES

  • 厂商:

    MICRO-LINEAR

  • 封装:

  • 描述:

    ML4769ES - 2 Cell, Adjustable Output Boost Regulator with Load Disconnect - Micro Linear Corporation

  • 数据手册
  • 价格&库存
ML4769ES 数据手册
July 2000 PRELIMINARY ML4769* 2 Cell, Adjustable Output Boost Regulator with Load Disconnect GENERAL DESCRIPTION The ML4769 is a continuous conduction boost regulator designed for DC to DC conversion in multiple cell battery power systems. Continuous conduction allows the regulator to maximize output current for a given inductor. The maximum switching frequency can exceed 200kHz, allowing the use of small, low cost inductors. The ML4769 is capable of start-up with input voltages as low as 1.8V. The output voltage can be set anywhere between 3.0V and 5.5V by an external resistor divider connected to the SENSE pin. An integrated synchronous rectifier eliminates the need for an external Schottky diode and provides a lower forward voltage drop, resulting in higher conversion efficiency. In addition, low quiescent current and variable frequency operation result in high efficiency even at light loads. The ML4769 requires only a few external components to build a very small regulator capable of achieving conversion efficiencies approaching 85%. The SHDN input allows the user to stop the regulator from switching, and provides complete isolation of the load from the battery. FEATURES s Guaranteed full load start-up and operation at 1.8V input Continuous conduction mode for high output current Pulse Frequency Modulation and internal synchronous rectification for high efficiency Isolates the load from the input during shutdown Minimum external components Low ON resistance internal switching FETs Low supply current Adjustable output voltage (3V to 5.5V) s s s s s s s * Some Packages Are Obsolete BLOCK DIAGRAM 1 6 VL1 VL2 SHUTDOWN CONTROL SHDN 7 VIN 2 START-UP SYNCHRONOUS RECTIFIER CONTROL VOUT + – 5 + – SENSE BOOST CONTROL + – 4 2.57V SHDN PWR GND 8 GND 3 1 ML4769 PIN CONFIGURATION ML4769 8-Pin SOIC (S08) VL1 VIN GND SENSE 1 2 3 4 TOP VIEW 8 7 6 5 PWR GND SHDN VL2 VOUT PIN DESCRIPTION PIN NAME FUNCTION PIN NAME FUNCTION 1 2 3 4 VL1 VIN GND SENSE Boost inductor connection Battery input voltage Ground Programming pin for setting the output voltage 5 6 7 VOUT VL2 SHDN Boost regulator output Boost inductor connection Pulling this pin to VIN shuts down the regulator, isolating the load from the input Return for the NMOS output transistor 8 PWR GND 2 ML4769 ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. VOUT ............................................................................................... 7V Voltage on any other pin ..... GND - 0.3V to VOUT + 0.3V Peak Switch Current (IPEAK) ......................................... 2A Average Switch Current (IAVG) ..................................... 1A Junction Temperature ............................................. 150ºC Storage Temperature Range .................... –65ºC to 150ºC Lead Temperature (Soldering, 10 sec) ................... 260ºC Thermal Resistance (qJA) .................................. 160ºC/W OPERATING CONDITIONS Temperature Range ML4769CS-X .............................................. 0ºC to 70ºC ML4769ES-X ........................................... -20ºC to 70ºC VIN Operating Range ....................... 1.8V to VOUT - 0.2V VOUT Operating Range ................................ 3.0V to 5.5V ELECTRICAL CHARACTERISTICS Unless otherwise specified, VIN = Operating Voltage Range, TA = Operating Temperature Range (Note 1) SYMBOL SUPPLY IIN VIN Current VIN = VOUT - 0.2V, SHDN = 0V VIN = SHDN = 2.4V, VOUT = 0V IOUT(Q) VOUT Quiescent Current SHDN = 0V VIN = SHDN = 2.4V, VOUT = VOUT(NOM) PFM REGULATOR IPEAK VSENSE IL Peak Current SENSE Comparator Threshold Voltage Line Regulation Load Regulation SHUTDOWN VIL V IH Input Low Voltage Input High Voltage Input Bias Current Note 1: PARAMETER CONDITIONS MIN TYP MAX UNITS 3 0.3 25 14 6 1 35 20 µA µA µA µA 750 2.52 IOUT = 0, See Figure 1 VIN = 2.4V, IOUT £ 180mA See Figure 1 4.95 4.85 850 2.57 5.05 4.95 950 2.62 5.15 5.15 mA V V V 0.5 VIN - 0.5 -100 100 V V nA Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions. 3 ML4769 27µH (Sumida CD75) ML4769 VL1 VIN 100µF VIN GND SENSE PWR GND SHDN VL2 VOUT 100µF 259kΩ 268kΩ IOUT VIN Figure 1. Application Test Circuit IL 1 VL1 6 VL2 Q3 VIN 2 RSENSE SHUTDOWN CONTROL SHDN 7 START-UP SYNCHRONOUS RECTIFIER CONTROL Q2 A2 + – VOUT 5 R1 VOUT + – A3 SHDN BOOST CONTROL + SENSE 4 2.57V COUT R2 A1 Q1 ISET – PWR GND 8 GND 3 Figure 2. PFM Regulator Block Diagram IL(MAX) IL ISET 0 VOUT VL2 0 Q1 ON Q2 OFF Q1 OFF Q2 ON Figure 3. Inductor Current and Voltage Waveforms 4 ML4769 FUNCTIONAL DESCRIPTION The ML4769 combines a unique form of current mode control with a synchronous rectifier to create a boost converter that can deliver high currents while maintaining high efficiency. Current mode control allows the use of a very small high frequency inductor and output capacitor. Synchronous rectification replaces the conventional external Schottky diode with an on-chip P-channel MOSFET to reduce losses, eliminate an external component, and provide the means for load disconnect. Also included on-chip are an N-channel MOSFET main switch and current sense resistor. REGULATOR OPERATION The ML4769 is a variable frequency, current mode switching regulator. Its unique control scheme converts efficiently over more than three decades of load current. A block diagram of the boost converter including the key external components is shown in Figure 2. Error amp A3 converts deviations in the desired output voltage to a small current, ISET. The inductor current is measured through a current sense resistor (RSENSE) which is amplified by A1. The boost control block matches the average inductor current to a multiple of the ISET current by switching Q1 on and off. The peak inductor current is limited by the controller to about 900mA. At light loads, ISET will momentarily reach zero after an inductor discharge cycle, causing Q1 to stop switching. Depending on the load, this idle time can extend to tenths of a second. When the circuit is not switching, only 25µA of supply current is drawn from the output. This allows the part to remain efficient even when the load current drops below 250µA. Amplifier A2 and the PMOS transistor Q2 work together to form a low drop diode. When transistor Q1 turns off, the current flowing in the inductor causes VL2 to go high. As the voltage on VL2 rises above VOUT, amplifier A2 allows the PMOS transistor Q2 to turn on. In discontinuous operation, (where IL always returns to zero), A2 uses the resistive drop across the PMOS switch Q2 to sense zero inductor current and turns the PMOS switch off. In continuous operation, the PMOS turn off point is independent of A2 and is determined by the boost control circuitry. Typical inductor current and voltage waveforms are shown in Figure 3. SHUTDOWN Coiltronics The ML4769 output can be shut down by pulling the SHDN pin high (to VIN). When SHDN is high, the regulator stops switching, the control circuitry is powered down, and the body diode of the PMOS synchronous rectifier is disconnected from the output. By switching Q1, Q2, and Q3 off, the load is isolated from the input. This allows the output voltage to be independent of the input while in shutdown. Dale Sumida (561) 241-7876 (605) 665-9301 (847) 956-0666 DESIGN CONSIDERATIONS OUTPUT CURRENT CAPABILITY The maximum current available at the output of the regulator is related to the maximum inductor current by the ratio of the input to output voltage and the conversion efficiency. The maximum inductor current is limited by the boost controller to about 600mA. The conversion efficiency is determined mainly by the internal switches as well as the external components, but can be estimated at about 80%. The maximum output current can be determined by using the typical performance curves shown in Figures 4 and 5, or by calculation using the following equation: IOUT( MAX) =  V ! V IN( MIN) OUT  ™ 210.0392 ™ V 6 + 0.4887"# - 0.144A (1)  $# OUT Since the maximum output current is based on when the inductor current goes into current limit, it is not recommended to operate the ML4769 at the maximum output current continuously. Applications that have high transient load currents should be evaluated under worst case conditions to determine suitability. INDUCTOR SELECTION The ML4769 is able to operate over a wide range of inductor values. A value of 10µH is a good choice, but any value between 5µH and 33µH is acceptable. As the inductor value changes, the control circuitry will automatically adjust to keep the inductor current under control. Choosing an inductance value of less than 10µH will reduce the component’s footprint, but the efficiency and maximum output current may drop. It is important to use an inductor that is rated to handle 1.0A peak currents without saturating. Also look for an inductor with low winding resistance. A good rule of thumb is to allow 5 to 10mW of resistance for each 1µH of inductance. The final selection of the inductor will be based on tradeoffs between size, cost and efficiency. Inductor tolerance, core and copper loss will vary with the type of inductor selected and should be evaluated with a ML4769 under worst case conditions to determine its suitability. Several manufacturers supply standard inductance values in surface mount packages: Coilcraft (847) 639-6400 5 ML4769 DESIGN CONSIDERATIONS OUTPUT CAPACITOR The output capacitor filters the pulses of current from the switching regulator. Since the switching frequency will vary with inductance, the minimum output capacitance required to reduce the output ripple to an acceptable level will be a function of the inductor used. Therefore, to maintain an output voltage with less than 100mV of ripple at full load current, use the following equation: C OUT = 44 ™ L VOUT (2) (Continued) 0.9A. This fast change in current through the capacitor’s ESL causes a high frequency (5ns) spike to appear on the output. After the ESL spike settles, the output still has a ripple component equal to the inductor discharge current times the ESR. To minimize these effects, choose an output capacitor with less than 10nH of ESL and less than 100mW of ESR. Suitable tantalum capacitors can be obtained from the following vendors: AVX Kemet Sprague (207) 282-5111 (846) 963-6300 (207) 324-4140 The output capacitor’s Equivalent Series Resistance (ESR) and Equivalent Series Inductance (ESL), also contribute to the ripple. Just after the Q1 turns off, the current in the output capacitor ramps quickly to between 0.3A and 600 90 VOUT = 3V 500 VOUT = 3V VOUT = 5.5V 300 200 VOUT = 5.5V EFFICIENCY (%) 400 IOUT (mA) 80 70 100 0 1.5 2.5 3.5 VIN (V) 4.5 5.5 60 VIN = 2.4V 1 10 IOUT (mA) 100 1000 Figure 4. IOUT vs. VIN Using the Circuit of Figure 8 350 300 250 200 150 100 50 0 1.0 Figure 5. Efficiency vs. IOUT Using the Circuit of Figure 8 160 120 VOUT = 5.5V IIN (nA) IIN (µA) 80 40 VOUT = 3V 3.0 VIN (V) 5.0 7.0 0 1.0 2.0 3.0 VIN (V) 4.0 5.0 Figure 6. Input Leakage vs. VIN in Shutdown Figure 7. No Load Input Current vs. VIN 6 ML4769 DESIGN CONSIDERATIONS (Continued) LAYOUT (Continued) In applications where the ML4769 is operated at or near the maximum output current, it is recommended to add a 10nF to 100nF ceramic capacitor from VOUT to GND. The optimum value of the high frequency bypass capacitor is dependent on the layout and the value of the bulk output capacitor selected. INPUT CAPACITOR Due to the high input current drawn at startup and possibly during operation, it is recommended to decouple the input with a capacitor with a value of 47µF to 100µF. This filtering prevents the input ripple from affecting the ML4769 control circuitry, and also improves the efficiency by reducing the I2R losses during the charge cycle of the inductor. Again, a low ESR capacitor (such as tantalum) is recommended. It is also recommended that low source impedance batteries be used. Otherwise, the voltage drop across the source impedance during high input current situations will cause the ML4769 to fail to start up or to operate unreliably. In general, for two cell applications the source impedance should be less than 400mW, which means that small alkaline cells should be avoided. SHUTDOWN The input levels of the SHDN pin are CMOS compatible. To guarantee proper operation, SHDN must be pulled to within 0.5V of GND or VIN to prevent excessive power dissipation and possible oscillations. SETTING THE OUTPUT VOLTAGE The adjustable output of the ML4769 requires an external feedback resistor divider to set VOUT. The output voltage can be determined from the following equation: VOUT = 257 ™ . (R1 + R2) R2 (3) • Use a single point ground for the ML4769 PWR GND pin and the input and output capacitors, and connect the GND pin to PWR GND using a separate trace • Separate the ground for the converter circuitry from the ground of the load circuitry and connect at a single point • Route the feedback trace away from the VL2 trace to avoid noise pickup • Route the high frequency bypass capacitor from a VOUT location near the output voltage setting resistor to the GND pin DESIGN EXAMPLE In order to design a boost converter using the ML4769, it is necessary to define the values of a few parameters. For this example, assume that VIN = 3.0V to 3.6V, VOUT = 5.0V, and IOUT(MAX) = 250mA. First, it must be determined whether the ML4769 is capable of delivering the output current. This is done using Equation 1: IOUT( MAX) =  3 ™ 200.0392 ™ 55 + 0.4887"# - 0.144A = 266mA ! 5  $ The next step is to select an inductor. As previously mentioned, the recommended inductance is 10µH. Make sure that the peak current rating of the inductor is at least 1.0A, and that the DC resistance of the inductor is between 50mW and 100mW. Finally, the value of the output capacitor is determined using Equation 2: C OUT = 44 ™ 10mH = 88mF . 50V where R1 and R2 are connected as shown in Figure 2. The value of R2 should be 250kW or less to minimize bias current errors. Choose an appropriate value for R2 and calculate R1. LAYOUT Good layout practices will ensure proper operation of the ML4769. Some layout guidelines follow: • Use adequate ground and power traces or planes • Keep components as close as possible to the ML4769 • Use short trace lengths from the inductor to the VL1 and VL2 pins and from the output capacitor to the VOUT pin The closest standard value would be a 100µF capacitor with an ESR rating of 100mW. If such a low ESR value cannot be found, two 47µF capacitors in parallel could also be used. Since the 250mA output current requirement is close to the 266mA maximum, a 10nF capacitor from VOUT to GND is recommended. Finally, the values of R1 and R2 are calculated using equation 3. Assuming R2 = 250kW: R1 = .  50V ™ 250kW - 250kW = 236kW  257  . The complete circuit is shown in Figure 8. As mentioned previously, the use of an input supply bypass capacitor is strongly recommended. 7 ML4769 10µH (Sumida CD54) ML4769 VL1 VIN CIN 100µF VIN GND SENSE PWR GND SHDN VL2 VOUT COUT 100µF R2 250kΩ R1 236kΩ 10nF VOUT SHUTDOWN Figure 8. Design Example Schematic Diagram PHYSICAL DIMENSIONS inches (millimeters) Package: S08 8-Pin SOIC 0.189 - 0.199 (4.80 - 5.06) 8 PIN 1 ID 0.148 - 0.158 0.228 - 0.244 (3.76 - 4.01) (5.79 - 6.20) 1 0.017 - 0.027 (0.43 - 0.69) (4 PLACES) 0.050 BSC (1.27 BSC) 0.059 - 0.069 (1.49 - 1.75) 0º - 8º 0.055 - 0.061 (1.40 - 1.55) 0.012 - 0.020 (0.30 - 0.51) SEATING PLANE 0.004 - 0.010 (0.10 - 0.26) 0.015 - 0.035 (0.38 - 0.89) 0.006 - 0.010 (0.15 - 0.26) ORDERING INFORMATION PART NUMBER ML4769CS (Obsolete) ML4769ES TEMPERATURE RANGE 0°C to 70°C -20°C to 70°C PACKAGE 8-Pin SOIC (S08) 8-Pin SOIC (S08) © Micro Linear 1998. is a registered trademark of Micro Linear Corporation. All other trademarks are the property of their respective owners. DS4769-01 2092 Concourse Drive San Jose, CA 95131 Tel: (408) 433-5200 Fax: (408) 432-0295 www.microlinear.com 3/26/98 Printed in U.S.A. Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897; 5,717,798. Japan: 2,598,946; 2,619,299; 2,704,176. Other patents are pending. Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application. 8
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