ML5800DM

ML5800 5.8GHz Low-IF 1.5Mbps FSK Transceiver FINAL Datasheet GENERAL DESCRIPTION The ML5800 is a high integration 5.8GHz Frequency Shift Keyed (FSK) transceiver that integrates all frequency generation, receive, and transmit functions required to realize a digital cordless telephone. Only a power amplifier (PA) and antenna switch are required to form a complete 5.8GHz digital radio. The ML5800 operates in the 5.725 to 5.850GHz unlicensed ISM band. It can be used to implement both Direct Sequence and Frequency Hopping Spread Spectrum radios. The ML5800 contains a dual-conversion low-IF receiver with all channel selectivity on chip. IF filtering, IF gain, and demodulation are performed on chip eliminating the need for any external IF filters or production tuning. A post detection filter and a data slicer are integrated to complete the receiver. The ML5800 transmitter uses an adjustment-free twoport closed loop modulator, which modulates the onchip VCO with filtered data. An upconversion mixer and buffer/predriver produces output of 0dBm at 5.8GHz. A fully integrated 3.9GHz fractional synthesizer is used in both receive and transmit modes. Power supply regulation is included in the ML5800, providing circuit isolation and consistent performance over supply voltages between 2.7V-3.6V. FEATURES High Integration 5.8GHz FSK Transceiver High data rate - 1.536Mbps Low-IF receiver eliminates external IF filters Fully integrated IF filters, FM discriminator, and data filters Self-calibrated filters eliminate production tuning 4dB (typ) Input-referred Noise Figure -94dBm (typ) sensitivity @ 0.1% BER 0dBm (typ) Output Power Simple 3-wire Control Interface PA sequencing & integrated pin diode driver Analog RSSI output over a 68dB range Auxiliary switch for transmit power control ”Green” (Pb-Free) 32 pin LPCC package APPLICATIONS Digital Cordless Telephones Wireless Streaming Audio and Video Game Controllers High-speed Data Links PIN CONFIGURATION VCCTXMIX Top View VCCIF DOUT RSSI VDD DIN GNDIF BLOCK DIAGRAM VCCA VCCRF GNDTX TXO RXI VCCLNA VCCRXMIX GNDMIX Quadrature Generation PAON Mode Control Transmit Mixer TXO 5.8GHz Output Two-port Modulator Control Registers PLL Divider Ref. Divider RXON XCEN Transmit Data Input Serial Control Bus Frequenc Referenc Filter Alignment RSSI RXI 5.8GHz Input Receiver Mixer Quadrature Downmixers F to V DOUT Digital Output XCEN RXON PAON EN DATA CLK AOUT_TPC VSS PIN 1 VBG AOUT_TPC Analog Output RSSI Receive Signal Strength Indicator Control lines VCCPLL GNDPLL VCCB VCCVCO VTUNE FREF QPO GNDLO DIN DATA CLK EN FREF ORDERING INFORMATION PART NUMBER TEMP RANGE ML5800DM ML5800DM-T PACKAGE PACK (QTY) -10oC to +60oC 32 LPCC 5x5 mm Antistatic Tray (490) -10oC to +60oC 32 LPCC 5x5 mm Tape & Reel (2500) 3.9 GHz VCO P.D. VTUNE QPO PLL Loop Filter DS5800-F-04 JULY 2006 ML5800 TABLE OF CONTENTS GENERAL DESCRIPTION ........................................................................................................................................... 1 PIN CONFIGURATION ................................................................................................................................................. 1 ORDERING INFORMATION ........................................................................................................................................ 1 FEATURES ................................................................................................................................................................... 1 APPLICATIONS ............................................................................................................................................................ 1 BLOCK DIAGRAM ........................................................................................................................................................ 1 TABLE OF CONTENTS ................................................................................................................................................ 2 ELECTRICAL CHARACTERISTICS............................................................................................................................. 3 PIN DESCRIPTIONS.................................................................................................................................................... 5 MODES OF OPERATION........................................................................................................................................... 12 CONTROL INTERFACES........................................................................................................................................... 14 TRANSMIT & RECEIVE DATA INTERFACES............................................................................................................ 17 REGISTER DESCRIPTIONS ..................................................................................................................................... 18 PHYSICAL DIMENSIONS .......................................................................................................................................... 24 WARRANTY................................................................................................................................................................ 25 SIMPLIFIED APPLICATIONS DIAGRAM TPC DOUT 32 3 PAON ANTENNA PAON AOUT_TPC 7 RSSI 28 DOUT AOUT RSSI FREF CLK, DATA, EN 3 B ASE B AND IC XCEN, 2 RXON ML5800 FREF 9 DATA 5 CLK 6 EN 4 RXI T/R SWITCH 20 RXI RXON 2 XCEN 1 TXO 21 TXO VTUNE 15 DIN 30 VCCA 24 QPO VDD 11 31 DIN VCCA VDD BATTERY AND PROTECTION CIRCUITS PA – M L 5803 VTUNE QPO 14 VCCVCO Figure 1: Simplified ML5800 Application Diagram DS5800-F-04 FINAL DATASHEET JULY 2006 2 ML5800 ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Operating the device for any length of time beyond the operating conditions may degrade device performance and/or shorten operating lifetime. VCCA, VDD ...............................................................................................................................................VSS-0.3 to 3.6V Junction Temperature............................................................................................................................................... 150°C Storage Temperature Range ...................................................................................................................... -65°C to 150°C Lead Temperature (Soldering, 10s).......................................................................................................................... 260°C OPERATING CONDITIONS Ambient Temperature Range (TA) ............................................................................................................... -10°C to 60°C VCCA Range ...................................................................................................................................................2.7V to 3.6V VDD Range .....................................................................................................................................................2.7V to 3.6V Thermal Resistance (θJA)....................................................................................................................................... 36°C/W Maximum receive RF input power .........................................................................................................................-10dBm Unless otherwise specified data is over operating conditions (TA = -10°C to 60°C, VCCA = VDD = 2.7V to 3.6V ) and fREF = 6.144MHz, V23PLL=0, at Freq=5779.456MHz (N=229, P=0). Typical defined as VCCA = VDD = 3.3V, TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS POWER SUPPLIES VCCA VDD VBG VREG VVCO ISTBY IRX ITX Analog supply voltage Digital supply voltage Bandgap Voltage Regulated Voltage VCO Regulated Voltage Supply current, STANDBY mode Supply current, RECEIVE mode Supply current, TRANSMIT mode VDD pin (VCCA ≥ VDD always) VBG(p26), IO=0μA VCCPLL(p10), VCCRF(p23), VCCTXMIX(p27), VCCIF(p29), IO=0μA VCCVCO(p14), IO=0μA, VCCB(p13)=2.7V DC supply connected, XCEN low, 25°C and 3.0V RX chain active, data being received POUT=0dBm 2.7 2.7 3.3 3.3 1.23 2.7 2.5 0.1 65 60 90 80 3.6 VCCA V V V V V μA mA mA SYNTHESIZER fC δf IP ΦN Carrier frequency range Channel Spacing Charge Pump sink/source current Phase noise at driver output fo=1.2MHz offset from fc fo=3MHz offset from fc fo>7MHz offset from fc tFH Lock time for channel switch (2.560MHz channels) From EN asserted to RX valid data (RX), or PAON high (TX) 1 Channel 5 Channels Full Range tTX2RX Lock time for TX/RX RXON High to Valid RX data 110 185 250 70 μs μs μs μs -90 -110 -120 dBc/Hz dBc/Hz dBc/Hz ±0.22 5.725 512kHz Steps ±0.52 ±1.2 mA 5.850 GHz DS5800-F-04 FINAL DATASHEET JULY 2006 3 ML5800 SYMBOL tRX2TX tWAKE fFREF VFREF RECEIVER Zin, S11 NF GRX DRRX S BWRX PIMAX IIP3 PRXI IRR ACR Input Impedance Input noise figure RX Gain Data Rate Input Sensitivity RX Data Filter 3dB Bandwidth Maximum RX RF input RX RF input IP3 LO leakage at RXI RX Chain Image rejection ratio RX adjacent channel(s) rejection. 2.56MHz channel spacing Wanted at -80dBm 1 channel 2 channels 3 or more channels RECEIVE LOW IF FILTERS fIFC BWIFC IF filter center frequency IF filter 3dB bandwidth Post-alignment Post-alignment 1.024 1.408 MHz MHz 15 40 45 dB dB dB