93C56B

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2K Microwire Compatible Serial EEPROM Device Selection Table Part Number 93AA56A 93AA56B 93LC56A 93LC56B 93C56A 93C56B 93AA56C 93LC56C 93C56C VCC Range 1.8-5.5 1.8-5-5 2.5-5.5 2.5-5.5 4.5-5.5 4.5-5.5 1.8-5.5 2.5-5.5 4.5-5.5 ORG Pin No No No No No No Yes Yes Yes Word Size 8-bit 16-bit 8-bit 16-bit 8-bit 16-bit 8 or 16-bit 8 or 16-bit 8 or 16-bit Temp Ranges I I I, E I, E I, E I, E I I, E I, E Packages P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC P, SN, ST, MS, MC P, SN, ST, MS, MC Features: • • • • • • • • • • • • • • Low-power CMOS technology ORG pin to select word size for ‘56C’ version 256 x 8-bit organization ‘A’ ver. devices (no ORG) 128 x 16-bit organization ‘B’ ver. devices (no ORG) Self-timed erase/write cycles (including auto-erase) Automatic ERAL before WRAL Power-on/off data protection circuitry Industry standard 3-wire serial I/O Device Status signal (Ready/Busy) Sequential read function 1,000,000 E/W cycles Data retention > 200 years Pb-free and RoHS compliant Temperature ranges supported: - Industrial (I) - Automotive (E) -40°C to +85°C -40°C to +125°C Description: The Microchip Technology Inc. 93XX56A/B/C devices are 2K bit low-voltage serial Electrically Erasable PROMs (EEPROM). Word-selectable devices such as the 93AA56C, 93LC56C or 93C56C are dependent upon external logic levels driving the ORG pin to set word size. For dedicated 8-bit communication, the 93XX56A devices are available, while the 93XX56B devices provide dedicated 16-bit communication. Advanced CMOS technology makes these devices ideal for low-power, nonvolatile memory applications. The entire 93XX Series is available in standard packages including 8-lead PDIP and SOIC, and advanced packaging including 8-lead MSOP, 6-lead SOT-23, 8-lead 2x3 DFN and 8-lead TSSOP. All packages are Pb-free and RoHS compliant. Pin Function Table Name CS CLK DI DO VSS NC ORG VCC Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground No internal connection Memory Configuration Power Supply Function © 2007 Microchip Technology Inc. DS21794E-page 1 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C Package Types (not to scale) ROTATED SOIC (ex: 93LC46BX) NC VCC CS CLK 1 2 3 4 8 ORG* 7 VSS 6 DO 5 DI CS CLK DI DO PDIP/SOIC (P, SN) 1 2 3 4 8 7 6 5 VCC NC ORG* VSS TSSOP/MSOP (ST, MS) CS CLK DI DO 1 2 3 4 8 7 6 5 VCC NC ORG* VSS DO VSS DI SOT-23 (OT) 1 2 3 6 5 4 VCC CS CLK DFN CS CLK DI DO 1 2 3 4 8 7 6 5 VCC NC ORG* VSS * ORG pin is NC on A/B devices DS21794E-page 2 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings(†) VCC.............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS ..........................................................................................................-0.6V to VCC +1.0V Storage temperature ...............................................................................................................................-65°C to +150°C Ambient temperature with power applied................................................................................................-40°C to +125°C ESD protection on all pins ......................................................................................................................................................≥ 4 kV †NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C, VCC = +1.8V to +5.5V Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V Min 2.0 0.7 VCC -0.3 -0.3 — — 2.4 VCC - 0.2 — — — — — — — — — — Typ — — — — — — — — — — — — 500 — — 100 — — Max VCC +1 VCC +1 0.8 0.2 VCC 0.4 0.2 — — ±1 ±1 7 2 — 1 500 — 1 5 Units V V V V V V V V μA μA pF mA μA mA μA μA μA μA Conditions VCC ≥ 2.7V VCC < 2.7V VCC ≥ 2.7V VCC < 2.7V IOL = 2.1 mA, VCC = 4.5V IOL = 100 μA, VCC = 2.5V IOH = -400 μA, VCC = 4.5V IOH = -100 μA, VCC = 2.5V VIN = VSS or VCC VOUT = VSS or VCC VIN/VOUT = 0V (Note 1) TA = 25°C, FCLK = 1 MHz FCLK = 3 MHz, Vcc = 5.5V FCLK = 2 MHz, Vcc = 2.5V FCLK = 3 MHz, VCC = 5.5V FCLK = 2 MHz, VCC = 3.0V FCLK = 2 MHz, VCC = 2.5V I – Temp E – Temp CLK = CS = 0V ORG = DI = VSS or VCC (Note 2) (Note 3) 93AA56A/B/C, 93LC56A/B/C (Note 1) 93C56A/B/C All parameters apply over the specified ranges unless otherwise noted. Param. Symbol No. D1 D2 D3 D4 D5 D6 D7 D8 D9 VIH1 VIH2 VIL1 VIL2 Vol1 Vol2 VOH1 VOH2 ILI ILO CIN, COUT Parameter High-level input voltage Low-level input voltage Low-level output voltage High-level output voltage Input leakage current Output leakage current Pin capacitance (all inputs/ outputs) ICC write Write current ICC read Read current D10 ICCS Standby current D11 VPOR VCC voltage detect — — 1.5 3.8 — — V V Note 1: 2: 3: This parameter is periodically sampled and not 100% tested. ORG pin not available on ‘A’ or ‘B’ versions. Ready/Busy status must be cleared from DO, see Section 3.4 "Data Out (DO)". © 2007 Microchip Technology Inc. DS21794E-page 3 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C TABLE 1-2: AC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C, VCC = +1.8V TO +5.5V Automotive (E): TA = -40°C to +125°C, VCC = +2.5V TO +5.5V Min — Max 3 2 1 — Units MHz MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms ms ms Conditions 4.5V ≤ VCC < 5.5V, 93XX56C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V 4.5V ≤ VCC < 5.5V, 93XX56C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V 4.5V ≤ VCC < 5.5V, 93XX56C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V 4.5V ≤ VCC < 5.5V 2.5V ≤ VCC < 4.5V 1.8V ≤ VCC < 2.5V 1.8V ≤ VCC < 5.5V 1.8V ≤ VCC < 5.5V 4.5V ≤ VCC < 5.5V, 93XX56C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V 4.5V ≤ VCC < 5.5V, 93XX56C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V 4.5V ≤ VCC < 5.5V, CL = 100 pF 2.5V ≤ VCC < 4.5V, CL = 100 pF 1.8V ≤ VCC < 2.5V, CL = 100 pF 4.5V ≤ VCC < 5.5V, (Note 1) 1.8V ≤ VCC < 4.5V, (Note 1) 4.5V ≤ VCC < 5.5V, CL = 100 pF 2.5V ≤ VCC < 4.5V, CL = 100 pF 1.8V ≤ VCC < 2.5V, CL = 100 pF Erase/Write mode (AA and LC versions) Erase/Write mode (93C versions) ERAL mode, 4.5V ≤ VCC ≤ 5.5V WRAL mode, 4.5V ≤ VCC ≤ 5.5V All parameters apply over the specified ranges unless otherwise noted. Param. Symbol No. A1 FCLK Parameter Clock frequency A2 TCKH Clock high time 200 250 450 100 200 450 50 100 250 0 250 50 100 250 50 100 250 — A3 TCKL Clock low time — A4 TCSS Chip Select setup time — A5 A6 A7 TCSH TCSL TDIS Chip Select hold time Chip Select low time Data input setup time — — — A8 TDIH Data input hold time — A9 TPD Data output delay time 200 250 400 100 200 200 300 500 6 2 6 15 — A10 A11 TCZ TSV Data output disable time Status valid time — — A12 A13 A14 A15 A16 Note 1: 2: TWC TWC TEC TWL — Program cycle time — — — — Endurance 1M cycles 25°C, VCC = 5.0V, (Note 2) This parameter is periodically sampled and not 100% tested. This application is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which may be obtained from Microchip’s web site at www.microchip.com. DS21794E-page 4 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C FIGURE 1-1: CS VIH VIL VIH CLK VIL TDIS VIH DI VIL TPD DO (Read) DO (Program) VOH VOL VOH Status Valid VOL TSV is relative to CS. TCZ TSV TPD TCZ TDIH TCSS TCKH TCKL TCSH SYNCHRONOUS DATA TIMING Note: TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX56B OR 93XX56C WITH ORG = 1) Instruction ERASE ERAL EWDS EWEN READ WRITE WRAL SB 1 1 1 1 1 1 1 Opcode 11 00 00 00 10 01 00 X 1 0 1 X X 0 Address A6 A5 A4 A3 A2 A1 A0 0 0 1 X X X X X X X X X X X X X X X X X X Data In — — — — — D15 – D0 D15 – D0 Data Out (RDY/BSY) (RDY/BSY) High-Z High-Z D15 – D0 (RDY/BSY) (RDY/BSY) Req. CLK Cycles 11 11 11 11 27 27 27 A6 A5 A4 A3 A2 A1 A0 A6 A5 A4 A3 A2 A1 A0 1 X X X X X X TABLE 1-4: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX56A OR 93XX56C WITH ORG = 0) Instruction ERASE ERAL EWDS EWEN READ WRITE WRAL SB 1 1 1 1 1 1 1 Opcode 11 00 00 00 10 01 00 Address X A7 A6 A5 A4 A3 A2 A1 A0 1 0 1 0 0 1 X X X X X X X X X X X X X X X X X X X X X Data In — — — — — D7 – D0 D7 – D0 Data Out (RDY/BSY) (RDY/BSY) High-Z High-Z D7 – D0 (RDY/BSY) (RDY/BSY) Req. CLK Cycles 12 12 12 12 20 20 20 X A7 A6 A5 A4 A3 A2 A1 A0 X A7 A6 A5 A4 A3 A2 A1 A0 0 1 X X X X X X X © 2007 Microchip Technology Inc. DS21794E-page 5 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.0 FUNCTIONAL DESCRIPTION 2.2 Data In/Data Out (DI/DO) When the ORG pin (93XX56C) pin is connected to VCC, the (x16) organization is selected. When it is connected to ground, the (x8) organization is selected. Instructions, addresses and write data are clocked into the DI pin on the rising edge of the clock (CLK). The DO pin is normally held in a High-Z state except when reading data from the device, or when checking the Ready/ Busy status during a programming operation. The Ready/Busy status can be verified during an Erase/ Write operation by polling the DO pin; DO low indicates that programming is still in progress, while DO high indicates the device is ready. DO will enter the High-Z state on the falling edge of CS. It is possible to connect the Data In and Data Out pins together. However, with this configuration it is possible for a “bus conflict” to occur during the “dummy zero” that precedes the read operation, if A0 is a logic high level. Under such a condition the voltage level seen at Data Out is undefined and will depend upon the relative impedances of Data Out and the signal source driving A0. The higher the current sourcing capability of A0, the higher the voltage at the Data Out pin. In order to limit this current, a resistor should be connected between DI and DO. 2.3 Data Protection 2.1 START Condition The Start bit is detected by the device if CS and DI are both high with respect to the positive edge of CLK for the first time. Before a Start condition is detected, CS, CLK and DI may change in any combination (except to that of a Start condition), without resulting in any device operation (Read, Write, Erase, EWEN, EWDS, ERAL or WRAL). As soon as CS is high, the device is no longer in Standby mode. An instruction following a Start condition will only be executed if the required opcode, address and data bits for any particular instruction are clocked in. Note: When preparing to transmit an instruction, either the CLK or DI signal levels must be at a logic low as CS is toggled active high. All modes of operation are inhibited when VCC is below a typical voltage of 1.5V for ‘93AA’ and ‘93LC’ devices or 3.8V for ‘93C’ devices. The EWEN and EWDS commands give additional protection against accidentally programming during normal operation. Note: For added protection, an EWDS command should be performed after every write operation and an external 10 kΩ pull-down protection resistor should be added to the CS pin. After power-up, the device is automatically in the EWDS mode. Therefore, an EWEN instruction must be performed before the initial ERASE or WRITE instruction can be executed. Block Diagram VCC VSS Address Decoder Memory Array Address Counter Data Register DI ORG* CS Mode Decode Logic Output Buffer DO CLK Clock Register *ORG input is not available on A/B devices DS21794E-page 6 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.4 Erase The ERASE instruction forces all data bits of the specified address to the logical ‘1’ state. CS is brought low following the loading of the last address bit. This falling edge of the CS pin initiates the self-timed programming cycle, except on ‘93C’ devices where the rising edge of CLK before the last address bit initiates the write cycle. The DO pin indicates the Ready/Busy status of the device if CS is brought high after a minimum of 250 ns low (TCSL). DO at logical ‘0’ indicates that programming is still in progress. DO at logical ‘1’ indicates that the register at the specified address has been erased and the device is ready for another instruction. Note: After the Erase cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO. FIGURE 2-1: CS ERASE TIMING FOR 93AA AND 93LC DEVICES TCSL Check Status CLK DI 1 1 1 AN AN-1 AN-2 ••• A0 TSV TCZ Ready High-Z TWC DO High-Z Busy FIGURE 2-2: CS ERASE TIMING FOR 93C DEVICES TCSL Check Status CLK DI 1 1 1 AN AN-1 AN-2 ••• A0 TSV TCZ Ready High-Z TWC DO High-Z Busy © 2007 Microchip Technology Inc. DS21794E-page 7 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.5 Erase All (ERAL) The Erase All (ERAL) instruction will erase the entire memory array to the logical ‘1’ state. The ERAL cycle is identical to the erase cycle, except for the different opcode. The ERAL cycle is completely self-timed and commences at the falling edge of the CS, except on ‘93C’ devices where the rising edge of CLK before the last data bit initiates the write cycle. Clocking of the CLK pin is not necessary after the device has entered the ERAL cycle. The DO pin indicates the Ready/Busy status of the device, if CS is brought high after a minimum of 250 ns low (TCSL). Note: After the ERAL command is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO. VCC must be ≥ 4.5V for proper operation of ERAL. FIGURE 2-3: CS ERAL TIMING FOR 93AA AND 93LC DEVICES TCSL Check Status CLK DI 1 0 0 1 0 x ••• x TSV TCZ Ready High-Z DO High-Z Busy TEC VCC must be ≥ 4.5V for proper operation of ERAL. FIGURE 2-4: CS ERAL TIMING FOR 93C DEVICES TCSL Check Status CLK DI 1 0 0 1 0 x ••• x TSV TCZ Ready High-Z TEC DO High-Z Busy DS21794E-page 8 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.6 Erase/Write Disable and Enable (EWDS/EWEN) Once the EWEN instruction is executed, programming remains enabled until an EWDS instruction is executed or Vcc is removed from the device. To protect against accidental data disturbance, the EWDS instruction can be used to disable all erase/write functions and should follow all programming operations. Execution of a READ instruction is independent of both the EWEN and EWDS instructions. The 93XX56A/B/C powers up in the Erase/Write Disable (EWDS) state. All programming modes must be preceded by an Erase/Write Enable (EWEN) instruction. FIGURE 2-5: CS EWDS TIMING TCSL CLK DI 1 0 0 0 0 x ••• x FIGURE 2-6: EWEN TIMING TCSL CS CLK DI 1 0 0 1 1 x ••• x 2.7 Read The READ instruction outputs the serial data of the addressed memory location on the DO pin. A dummy zero bit precedes the 8-bit (if ORG pin is low or A-Version devices) or 16-bit (if ORG pin is high or B-version devices) output string. The output data bits will toggle on the rising edge of the CLK and are stable after the specified time delay (TPD). Sequential read is possible when CS is held high. The memory data will automatically cycle to the next register and output sequentially. FIGURE 2-7: CS READ TIMING CLK DI 1 1 0 An ••• A0 DO High-Z 0 Dx ••• D0 Dx ••• D0 Dx ••• D0 © 2007 Microchip Technology Inc. DS21794E-page 9 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.8 Write The WRITE instruction is followed by 8 bits (if ORG is low or A-version devices) or 16 bits (if ORG pin is high or B-version devices) of data which are written into the specified address. For 93AA56A/B/C and 93LC56A/B/C devices, after the last data bit is clocked into DI, the falling edge of CS initiates the self-timed auto-erase and programming cycle. For 93C56A/B/C devices, the selftimed auto-erase and programming cycle is initiated by the rising edge of CLK on the last data bit. The DO pin indicates the Ready/Busy status of the device, if CS is brought high after a minimum of 250 ns low (TCSL). DO at logical ‘0’ indicates that programming is still in progress. DO at logical ‘1’ indicates that the register at the specified address has been written with the data specified and the device is ready for another instruction. Note: After the Write cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO. FIGURE 2-8: CS WRITE TIMING FOR 93AA AND 93LC DEVICES TCSL CLK DI 1 0 1 An ••• A0 Dx ••• D0 TSV TCZ Ready DO High-Z Busy TWC High-Z FIGURE 2-9: CS WRITE TIMING FOR 93C DEVICES TCSL CLK DI 1 0 1 An ••• A0 Dx ••• D0 TSV TCZ Ready DO High-Z Busy TWC High-Z DS21794E-page 10 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.9 Write All (WRAL) The Write All (WRAL) instruction will write the entire memory array with the data specified in the command. For 93AA56A/B/C and 93LC56A/B/C devices, after the last data bit is clocked into DI, the falling edge of CS initiates the self-timed auto-erase and programming cycle. For 93C56A/B/C devices, the self-timed autoerase and programming cycle is initiated by the rising edge of CLK on the last data bit. Clocking of the CLK pin is not necessary after the device has entered the WRAL cycle. The WRAL command does include an automatic ERAL cycle for the device. Therefore, the WRAL instruction does not require an ERAL instruction, but the chip must be in the EWEN status. The DO pin indicates the Ready/Busy status of the device if CS is brought high after a minimum of 250 ns low (TCSL). Note: After the Write All cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO. VCC must be ≥ 4.5V for proper operation of WRAL. FIGURE 2-10: CS WRAL TIMING FOR 93AA AND 93LC DEVICES TCSL CLK DI 1 0 0 0 1 x ••• x Dx ••• D0 TSV TCZ Ready High-Z TWL DO High-Z Busy VCC must be ≥ 4.5V for proper operation of WRAL. FIGURE 2-11: CS WRAL TIMING FOR 93C DEVICES TCSL CLK DI 1 0 0 0 1 x ••• x Dx ••• D0 TSV TCZ Ready High-Z TWL DO High-Z Busy © 2007 Microchip Technology Inc. DS21794E-page 11 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 3.0 PIN DESCRIPTIONS PIN DESCRIPTIONS SOIC/PDIP/ MSOP/TSSOP/ DFN 1 2 3 4 5 6 7 8 SOT-23 5 4 3 1 2 — — 6 Rotated SOIC 3 4 5 6 7 8 1 2 Chip Select Serial Clock Data In Data Out Ground Organization / 93XX56C No Internal Connection / 93XX56A/B No Internal Connection Power Supply Function TABLE 3-1: Name CS CLK DI DO VSS ORG/NC NC VCC 3.1 Chip Select (CS) A high level selects the device; a low level deselects the device and forces it into Standby mode. However, a programming cycle which is already in progress will be completed, regardless of the Chip Select (CS) input signal. If CS is brought low during a program cycle, the device will go into Standby mode as soon as the programming cycle is completed. CS must be low for 250 ns minimum (TCSL) between consecutive instructions. If CS is low, the internal control logic is held in a Reset status. data bits before an instruction is executed. CLK and DI then become “don’t care” inputs waiting for a new Start condition to be detected. 3.3 Data In (DI) Data In (DI) is used to clock in a Start bit, opcode, address and data synchronously with the CLK input. 3.4 Data Out (DO) 3.2 Serial Clock (CLK) Data Out (DO) is used in the Read mode to output data synchronously with the CLK input (TPD after the positive edge of CLK). This pin also provides Ready/Busy status information during erase and write cycles. Ready/Busy status information is available on the DO pin if CS is brought high after being low for minimum Chip Select low time (TCSL) and an erase or write operation has been initiated. The Status signal is not available on DO, if CS is held low during the entire erase or write cycle. In this case, DO is in the High-Z mode. If status is checked after the erase/write cycle, the data line will be high to indicate the device is ready. Note: After a programming cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO. The Serial Clock is used to synchronize the communication between a master device and the 93XX series device. Opcodes, address and data bits are clocked in on the positive edge of CLK. Data bits are also clocked out on the positive edge of CLK. CLK can be stopped anywhere in the transmission sequence (at high or low level) and can be continued anytime with respect to Clock High Time (TCKH) and Clock Low Time (TCKL). This gives the controlling master freedom in preparing opcode, address and data. CLK is a “don’t care” if CS is low (device deselected). If CS is high, but the Start condition has not been detected (DI = 0), any number of clock cycles can be received by the device without changing its status (i.e., waiting for a Start condition). CLK cycles are not required during the self-timed write (i.e., auto erase/write) cycle. After detection of a Start condition the specified number of clock cycles (respectively low-to-high transitions of CLK) must be provided. These clock cycles are required to clock in all required opcode, address and 3.5 Organization (ORG) When the ORG pin is connected to VCC or Logic HI, the (x16) memory organization is selected. When the ORG pin is tied to VSS or Logic LO, the (x8) memory organization is selected. For proper operation, ORG must be tied to a valid logic level. 93XX56A devices are always x8 organization and 93XX56B devices are always x16 organization. DS21794E-page 12 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 4.0 4.1 PACKAGING INFORMATION Package Marking Information 8-Lead MSOP (150 mil) Example: 3L56BI 5281L7 XXXXXXT YWWNNN 6-Lead SOT-23 XXNN Example: 2EL7 8-Lead PDIP XXXXXXXX T/XXXNNN YYWW Example: 93LC56B I/P e3 1L7 0528 8-Lead SOIC Example: XXXXXXXT XXXXYYWW NNN 93LC56BI SN e3 0528 1L7 8-Lead TSSOP XXXX TYWW NNN Example: L56B I528 1L7 8-Lead 2x3 DFN XXX YWW NN Example: 344 528 L7 © 2007 Microchip Technology Inc. DS21794E-page 13 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 1st Line Marking Codes Part Number 93AA56A 93AA56B 93AA56C 93LC56A 93LC56B 93LC56C 93C56A 93C56B 93C56C Note: TSSOP A56A A56B A56C L56A L56B L56C C56A C56B C56C MSOP 3A56AT 3A56BT 3A56CT 3L56AT 3L56BT 3L56CT 3C56AT 3C56BT 3C56CT SOT-23 I Temp. 2BNN 2LNN — 2ENN 2PNN — 2HNN 2TNN — E Temp. — — — 2FNN 2RNN — 2JNN 2UNN — I Temp. 331 341 351 334 344 354 337 347 357 DFN E Temp. — — — 335 345 355 338 348 358 T = Temperature grade (I, E) NN = Alphanumeric traceability code Legend: XX...X T Y YY WW NNN Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) e3 Note: For very small packages with no room for the Pb-free JEDEC designator e3 , the marking will only appear on the outer carton or reel label. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Note: DS21794E-page 14 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 8-Lead Plastic Micro Small Outline Package (MS or UA) [MSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 b A A2 c φ e A1 Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint Foot Angle Lead Thickness N e A A2 A1 E E1 D L L1 φ c L1 MILLIMETERS MIN NOM 8 0.65 BSC – 0.75 0.00 – 0.85 – 4.90 BSC 3.00 BSC 3.00 BSC 0.40 0° 0.08 0.60 0.95 REF – – 8° 0.23 0.80 1.10 0.95 0.15 MAX L Lead Width b 0.22 – 0.40 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-111B © 2007 Microchip Technology Inc. DS21794E-page 15 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 6-Lead Plastic Small Outline Transistor (CH or OT) [SOT-23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging b N 4 E E1 PIN 1 ID BY LASER MARK 1 2 e e1 D 3 A A2 c φ A1 L L1 Units Dimension Limits MIN MILLIMETERS NOM 6 0.95 BSC 1.90 BSC 0.90 0.89 0.00 2.20 1.30 2.70 0.10 0.35 0° 0.08 – – – – – – – – – – 1.45 1.30 0.15 3.20 1.80 3.10 0.60 0.80 30° 0.26 MAX Number of Pins Pitch Outside Lead Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint Foot Angle Lead Thickness N e e1 A A2 A1 E E1 D L L1 φ c Lead Width b 0.20 – 0.51 Notes: 1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.127 mm per side. 2. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-028B DS21794E-page 16 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 8-Lead Plastic Dual In-Line (P or PA) – 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE 1 E1 1 2 D 3 E A2 A A1 e b1 b L c eB Units Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing § N e A A2 A1 E E1 D L c b1 b eB – .115 .015 .290 .240 .348 .115 .008 .040 .014 – MIN INCHES NOM 8 .100 BSC – .130 – .310 .250 .365 .130 .010 .060 .018 – .210 .195 – .325 .280 .400 .150 .015 .070 .022 MAX .430 Notes: 1. Pin 1 visual index feature may vary, but must be located with the hatched area. 2. § Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-018B © 2007 Microchip Technology Inc. DS21794E-page 17 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 8-Lead Plastic Small Outline (SN or OA) – Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D e N E E1 NOTE 1 1 2 3 b h φ c h α A A2 A1 L L1 β Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Chamfer (optional) Foot Length Footprint Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom N e A A2 A1 E E1 D h L L1 φ c b α β 0° 0.17 0.31 5° 5° 0.25 0.40 – 1.25 0.10 MIN MILLIMETERS NOM 8 1.27 BSC – – – 6.00 BSC 3.90 BSC 4.90 BSC – – 1.04 REF – – – – – 8° 0.25 0.51 15° 0.50 1.27 1.75 – 0.25 MAX 15° Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. § Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-057B DS21794E-page 18 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 b 2 e c A A2 φ A1 L1 L Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Footprint Foot Angle Lead Thickness N e A A2 A1 E E1 D L L1 φ c 0° 0.09 4.30 2.90 0.45 – 0.80 0.05 MIN MILLIMETERS NOM 8 0.65 BSC – 1.00 – 6.40 BSC 4.40 3.00 0.60 1.00 REF – – 8° 0.20 4.50 3.10 0.75 1.20 1.05 0.15 MAX Lead Width b 0.19 – 0.30 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-086B © 2007 Microchip Technology Inc. DS21794E-page 19 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 8-Lead Plastic Dual Flat, No Lead Package (MC) – 2x3x0.9 mm Body [DFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging e N L D N b K E E2 EXPOSED PAD NOTE 1 1 2 D2 TOP VIEW BOTTOM VIEW 2 1 NOTE 1 A A3 A1 NOTE 2 Units Dimension Limits MIN MILLIMETERS NOM 8 0.50 BSC 0.80 0.00 0.90 0.02 0.20 REF 2.00 BSC 3.00 BSC 1.30 1.50 0.18 0.30 0.20 – – 0.25 0.40 – 1.75 1.90 0.30 0.50 – 1.00 0.05 MAX Number of Pins Pitch Overall Height Standoff Contact Thickness Overall Length Overall Width Exposed Pad Length Exposed Pad Width Contact Width Contact Length Contact-to-Exposed Pad N e A A1 A3 D E D2 E2 b L K Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. Package is saw singulated. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-123B DS21794E-page 20 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C APPENDIX A: Revision B Corrections to Section 1.0, Electrical Characteristics. Section 4.1, 6-Lead SOT-23 package to OT. REVISION HISTORY Revision C Added DFN package. Revision D (11/2006) Updated Package Drawings and Product ID System Revision E (3/2007) Replaced Package Drawings; Revised Product ID System (SOIC-SN package). © 2007 Microchip Technology Inc. DS21794E-page 21 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C NOTES: DS21794E-page 22 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • • • • • Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Development Systems Information Line Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2007 Microchip Technology Inc. DS21794E-page 23 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: RE: Technical Publications Manager Reader Response Total Pages Sent ________ From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y N Literature Number: DS21794E FAX: (______) _________ - _________ Device: 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21794E-page 24 © 2007 Microchip Technology Inc. 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X X X /XX Package Examples: a) b) c) d) 93AA56C-I/MS: 2K, 256x8 or 128x16 Serial EEPROM, MSOP package, 1.8V 93AA56B-I/MS: 2K, 128x16 Serial EEPROM, MSOP package, 1.8V 93AA56AT-I/OT: 2K, 256x8 Serial EEPROM, SOT-23 package, tape and reel, 1.8V 93AA56CT-I/MS: 2K, 256x8 or 128x16 Serial EEPROM, MSOP package, tape and reel, 1.8V 93LC56A-I/MS: 2K, 256x8 Serial EEPROM, MSOP package, 2.5V 93LC56BT-I/OT: 2K, 128x16 Serial EEPROM, SOT-23 package, tape and reel, 2.5V 93LC56B-I/MS: 2K, 128x16 Serial EEPROM, MSOP package, 2.5V 93C56B-I/MS: 2K, 128x16 Serial EEPROM, MSOP package, 5.0V 93C56C-I/MS: 2K, 256x8 or 128x16 Serial EEPROM, MSOP package, 5.0V 93C56AT-I/OT: 2K, 256x8 Serial EEPROM, SOT-23 package, tape and reel, 5.0V Pinout Tape & Reel Temperature Range Device: 93AA56A: 2K 1.8V Microwire Serial EEPROM 93AA56B: 2K 1.8V Microwire Serial EEPROM 93AA56C: 2K 1.8V Microwire Serial EEPROM w/ORG 93LC56A: 2K 2.5V Microwire Serial EEPROM 93LC56B: 2K 2.5V Microwire Serial EEPROM 93LC56C: 2K 2.5V Microwire Serial EEPROM w/ORG 93C56A: 93C56B: 93C56C: 2K 5.0V Microwire Serial EEPROM 2K 5.0V Microwire Serial EEPROM 2K 5.0V Microwire Serial EEPROM w/ORG a) b) c) Pinout: Blank X = = Standard pinout Rotated pinout a) b) c) Tape & Reel: Blank = T = Standard packaging Tape & Reel Temperature Range: I E = = -40°C to +85°C -40°C to +125°C Package: MS OT P SN ST MC = = = = = = Plastic MSOP (Micro Small outline, 8-lead) SOT-23, 6-lead (Tape & Reel only) Plastic DIP (300 mil body), 8-lead Plastic SOIC (3.90 mm body), 8-lead TSSOP, 8-lead 2x3 DFN, 8-lead © 2007 Microchip Technology Inc. DS21794E-page 25 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C NOTES: DS21794E-page 26 © 2007 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • • Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” • • • Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2007 Microchip Technology Inc. DS21794E-page 27 WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 ASIA/PACIFIC Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Habour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Fuzhou Tel: 86-591-8750-3506 Fax: 86-591-8750-3521 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Shunde Tel: 86-757-2839-5507 Fax: 86-757-2839-5571 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7250 Fax: 86-29-8833-7256 ASIA/PACIFIC India - Bangalore Tel: 91-80-4182-8400 Fax: 91-80-4182-8422 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Gumi Tel: 82-54-473-4301 Fax: 82-54-473-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Penang Tel: 60-4-646-8870 Fax: 60-4-646-5086 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 12/08/06 DS21794E-page 28 © 2007 Microchip Technology Inc.