C1411VUA

TC1411/TC1411N 1A High-Speed MOSFET Drivers Features • Latch-Up Protected: Will Withstand 500 mA Reverse Current • Input Will Withstand Negative Inputs Up to 5V • ESD Protected: 4 kV • High Peak Output Current: 1A • Wide Input Supply Voltage Operating Range: - 4.5V to 16V • High Capacitive Load Drive Capability: - 1000 pF in 25 nsec • Short Delay Time: 30 nsec Typ. • Matched Delay Times • Low Supply Current - With Logic ‘1’ Input: 500 µA - With Logic ‘0’ Input: 100 µA • Low Output Impedance: 8Ω • Available in Space-Saving 8-pin MSOP Package • Pinout Same as TC1410/TC1412/TC1413 Description The TC1411/TC1411N are 1A CMOS buffers/drivers. They will not latch-up under any conditions within their power and voltage ratings. They are not subject to damage when up to 5V of noise spiking of either polarity occurs on the ground pin. They can accept, without damage or logic upset, up to 500 mA of current of either polarity being forced back into their output. All terminals are fully protected against up to 4 kV of electrostatic discharge. As MOSFET drivers, the TC1411/TC1411N can easily charge a 1000 pF gate capacitance in 25 nsec with matched rise and fall times, and provide low enough impedance in both the ON and the OFF states to ensure the MOSFET’s intended state will not be affected, even by large transients. The leading and trailing edge propagation delay times are also matched to allow driving short-duration inputs with greater accuracy. Package Types 8-Pin MSOP/PDIP/SOIC VDD 1 IN 2 NC 3 GND 4 2 8 VDD VDD 1 IN 2 NC 3 8 VDD 7 OUT 6 OUT 7 OUT 6 OUT 5 GND 2 6,7 Applications • • • • Switch Mode Power Supplies Pulse Transformer Drive Line Drivers Relay Driver TC1411 TC1411N 5 GND GND 4 6,7 Inverting NC = No Internal Connection Non-Inverting Note: Duplicate pins must be connected together for proper operation. © 2006 Microchip Technology Inc. DS21390D-page 1 TC1411/TC1411N Functional Block Diagram TC1411 Inverting Outputs VDD 300 mV Output Input Effective Input C = 10 pF 4.7V Non-Inverting Outputs TC1411N GND DS21390D-page 2 © 2006 Microchip Technology Inc. TC1411/TC1411N 1.0 ELECTRICAL CHARACTERISTICS † Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings † Supply Voltage ..................................................... +20V Input Voltage ...................... VDD + 0.3V to GND – 5.0V Power Dissipation (TA ≤ 70°C) MSOP .......................................................... 340 mW PDIP ............................................................ 730 mW SOIC............................................................ 470 mW Storage Temperature Range .............. -65°C to +150°C Maximum Junction Temperature ...................... +150°C DC CHARACTERISTICS Electrical Specifications: Unless otherwise noted, over operating temperature range with 4.5V ≤ VDD ≤ 16V. Typical values are measured at TA = +25°C, VDD = 16V. Parameters Input Logic ‘1’, High Input Voltage Logic ‘0’, Low Input Voltage Input Current Output High Output Voltage Low Output Voltage Output Resistance VOH VOL RO VDD – 0.025 — — — — Peak Output Current Latch-Up Protection Withstand Reverse Current Switching Time (Note 1) Rise Time tR — — — Fall Time tF — — — Delay Time tD1 — — — Delay Time tD2 — — — Power Supply Power Supply Current Note 1: IS — — Switching times ensured by design. 0.5 0.1 1.0 0.15 mA VIN = 3V, VDD = 16V VIN = 0V 25 27 29 25 27 29 30 33 35 30 33 35 35 40 40 35 40 40 40 45 45 40 45 45 ns ns ns ns TA = +25°C 0°C ≤ TA ≤ +70°C -40°C ≤ TA ≤ +85°C, Figure 4-1 TA = +25°C 0°C ≤ TA ≤ +70°C -40°C ≤ TA ≤ +85°C, Figure 4-1 TA = +25°C, 0°C ≤ TA ≤ +70°C -40°C ≤ TA ≤ +85°C, Figure 4-1 TA = +25°C 0°C ≤ TA ≤ +70°C -40°C ≤ TA ≤ +85°C, Figure 4-1 IPK IREV — — — — 8 10 10 1.0 0.5 — 0.025 11 14 14 — — A A V V Ω DC Test DC Test VDD = 16V, IO = 10 mA, TA = +25°C 0°C ≤ TA ≤ +70°C -40°C ≤ TA ≤ +85°C VDD = 16V Duty cycle ≤ 2%, t ≤ 300 µs, VDD = 16V VIH VIL IIN 2.0 — -1.0 -10 — — — — — 0.8 1.0 10 V V µA 0V ≤ VIN ≤ VDD, TA = +25°C -40°C ≤ TA ≤ +85°C Sym Min Typ Max Units Conditions © 2006 Microchip Technology Inc. DS21390D-page 3 TC1411/TC1411N TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V ≤ VDD ≤ 16V. Parameters Temperature Ranges Specified Temperature Range (C) Specified Temperature Range (E) Specified Temperature Range (V) Maximum Junction Temperature Storage Temperature Range Package Thermal Resistances Thermal Resistance, 8L-MSOP Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC θJA θJA θJA — — — 206 125 155 — — — ºC/W ºC/W ºC/W TA TA TA TJ TA 0 -40 -40 — -65 — — — — — +70 +85 +125 +150 +150 ºC ºC ºC ºC ºC Sym Min Typ Max Units Conditions DS21390D-page 4 © 2006 Microchip Technology Inc. TC1411/TC1411N 2.0 Note: TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, over operating temperature range with 4.5V ≤ VDD ≤ 16V. 500 TA = +25°C 500 VSUPPLY = 16V VIN = 3V 400 400 ISUPPLY (µA) ISUPPLY (µA) VIN = 3V 300 300 200 200 100 VIN = 0V 100 VIN = 0V 0 4 6 8 10 12 14 16 0 -40 -20 0 20 40 60 80 VDD (V) TEMPERATURE (°C) FIGURE 2-1: Quiescent Supply Current vs. Supply Voltage. 1.6 FIGURE 2-4: vs. Temperature. 1.6 Quiescent Supply Current TA = +25°C VSUPPLY = 16V 1.5 1.5 VTHRESHOLD (V) 1.4 VTHRESHOLD (V) VIH VIH 1.4 1.3 1.3 1.2 VIL 1.2 VIL 1.1 4 6 8 10 12 14 16 1.1 -40 -20 0 20 40 60 80 VDD (V) TEMPERATURE (°C) FIGURE 2-2: Voltage. 25 Input Threshold vs. Supply FIGURE 2-5: Temperature. 25 Input Threshold vs. 20 TA = +85°C RDS-ON (Ohms) 20 RDS-ON (Ohms) TA = +25°C 15 15 TA = +85°C TA = +25°C 10 10 TA = -40°C 5 5 TA = -40°C 04 6 8 10 VDD (V) 12 14 16 0 4 6 8 10 VDD (V) 12 14 16 FIGURE 2-3: High-State Output Resistance vs. Supply Voltage. FIGURE 2-6: Low-State Output Resistance vs. Supply Voltage. © 2006 Microchip Technology Inc. DS21390D-page 5 TC1411/TC1411N Note: Unless otherwise indicated, over operating temperature range with 4.5V ≤ VDD ≤ 16V. 100 CLOAD = 1000 pF 100 CLOAD = 1000 pF 80 80 tRISE (nsec) 60 tFALL (nsec) TA = +85°C TA = +25°C 40 60 TA = +85°C TA = +25°C 40 20 TA = -40°C 20 TA = -40°C 12 14 16 0 0 4 6 8 10 VDD (V) 4 6 8 10 12 14 16 VDD (V) FIGURE 2-7: Voltage. 100 Rise Time vs. Supply FIGURE 2-10: Voltage. 100 Fall Time vs. Supply CLOAD = 1000 pF CLOAD = 1000 pF 80 80 tD1 (nsec) 60 tD2 (nsec) TA = +85°C 60 TA = +85°C TA = +25°C TA = +25°C 40 40 TA = -40°C 20 20 TA = -40°C 0 4 6 8 10 VDD (V) 12 14 16 0 4 6 8 10 VDD (V) 12 14 16 FIGURE 2-8: Supply Voltage. 100 Propagation Delay vs. FIGURE 2-11: Supply Voltage. 36 Propagation Delay vs. TA = +25°C VDD = 16V TA = +25°C VDD = 16V tRISE Propagation Delays (nsec) 80 34 tD2 tRISE, tFALL (nsec) 60 32 40 tFALL 30 tD1 20 28 0 26 0 500 1000 1500 2000 2500 3000 3500 0 500 1000 1500 2000 2500 3000 3500 CLOAD (pF) CLOAD (pF) FIGURE 2-9: Capacitive Load. Rise and Fall Times vs. FIGURE 2-12: Capacitive Load. Propagation Delays vs. DS21390D-page 6 © 2006 Microchip Technology Inc. TC1411/TC1411N 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: Pin No. 1 2 3 4 5 6 7 8 PIN FUNCTION TABLE Description Supply input, 4.5V to 16V Control input No connection Ground Ground CMOS push-pull output, common to pin 7 CMOS push-pull output, common to pin 6 Supply input, 4.5V to 16V Symbol VDD INPUT NC GND GND OUTPUT OUTPUT VDD 3.1 Supply Input (VDD) 3.3 CMOS Push-pull Output (OUTPUT) The VDD input is the bias supply for the MOSFET driver and is rated for 4.5V to 16V with respect to the ground pin. The VDD input should be bypassed to ground with a local ceramic capacitor. The value of the capacitor should be chosen based on the capacitive load that is being driven. A value of 1.0 µF is suggested. The MOSFET driver output is a low impedance, CMOS push-pull style output, capable of driving a capacitive load with 1A peak currents. 3.4 Ground (GND) 3.2 Control Input (INPUT) The MOSFET driver input is a high-impedance, TTL/CMOS-compatible input. The input has 300 mV of hysteresis between the high and low thresholds that prevents output glitching even when the rise and fall time of the input signal is very slow. The ground pins are the return path for the bias current and for the high peak currents which discharge the load capacitor. The ground pins should be tied into a ground plane or have very short traces to the bias supply source return. 3.5 No Connect (NC) No internal connection. © 2006 Microchip Technology Inc. DS21390D-page 7 TC1411/TC1411N 4.0 APPLICATION INFORMATION +5V Input VDD = 16V 0V 4.7 µF 1, 8 Input 2 6, 7 Output CL = 1000 pF 0.1 µF VDD Output 0V 10% 10% 10% tD1 tF 90% tD2 tR 90% 90% TC1411 TC1411N +5V Input 4, 5 Input: 100 kHz, square wave, tRISE = tFALL ≤ 10 nsec 0V VDD Output 0V 10% Inverting Driver TC1411 90% tD1 90% 10% tR 90% tD2 10% tF Non-Inverting Driver TC1411N FIGURE 4-1: Switching Time Test Circuit. DS21390D-page 8 © 2006 Microchip Technology Inc. TC1411/TC1411N 5.0 5.1 PACKAGING INFORMATION Package Marking Information 8-Lead MSOP Example: XXXXXXX YWWNNN 1411NE 635256 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: TC1411 e3 CPA^^256 0635 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN Example: TC1411C e3 OA^^0635 256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2006 Microchip Technology Inc. DS21390D-page 9 TC1411/TC1411N 8-Lead Plastic Micro Small Outline Package (UA) (MSOP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 B n 1 α c φ A A2 F β Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint (Reference) Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom n p A A2 A1 E E1 D L F φ c B α β .016 .030 .000 MIN L A1 INCHES NOM 8 MAX MIN MILLIMETERS* NOM 8 0.65 BSC .043 .037 .006 0.75 0.00 4.90 BSC 3.00 BSC 3.00 BSC .031 8° .009 .016 15° 15° 0.40 0° 0.08 0.22 5° 5° 0.60 0.95 REF 8° 0.23 0.40 15° 15° 0.80 0.85 1.10 0.95 0.15 MAX .026 BSC .033 .193 BSC .118 BSC .118 BSC .024 .037 REF 0° .003 .009 5° 5° .006 .012 - * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M JEDEC Equivalent: MO-187 Drawing No. C04-111 Revised 07-21-05 DS21390D-page 10 © 2006 Microchip Technology Inc. TC1411/TC1411N 8-Lead Plastic Dual In-line (PA) – 300 mil (PDIP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 D 2 n 1 α E A A2 c L A1 β eB B1 p B MAX Number of Pins Pitch Top to Seating Plane A .140 .170 4.32 Molded Package Thickness .115 .145 3.68 A2 Base to Seating Plane A1 .015 Shoulder to Shoulder Width E .300 .313 .325 8.26 Molded Package Width E1 .240 .250 .260 6.60 Overall Length D .360 .373 .385 9.78 Tip to Seating Plane L .125 .130 .135 3.43 c Lead Thickness .008 .012 .015 0.38 Upper Lead Width B1 .045 .058 .070 1.78 Lower Lead Width B .014 .018 .022 0.56 Overall Row Spacing § eB .310 .370 .430 10.92 α Mold Draft Angle Top 5 10 15 15 β Mold Draft Angle Bottom 5 10 15 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 Units Dimension Limits n p MIN INCHES* NOM 8 .100 .155 .130 MAX MIN MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 © 2006 Microchip Technology Inc. DS21390D-page 11 TC1411/TC1411N 8-Lead Plastic Small Outline (OA) – Narrow, 150 mil (SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 B n 1 45° h α c A A2 φ β L A1 MAX Number of Pins Pitch Overall Height A .053 .069 1.75 Molded Package Thickness A2 .052 .061 1.55 Standoff § A1 .004 .010 0.25 Overall Width E .228 .244 6.20 Molded Package Width .146 .157 3.99 E1 Overall Length D .189 .197 5.00 Chamfer Distance h .010 .020 0.51 Foot Length L .019 .030 0.76 φ Foot Angle 0 8 8 c Lead Thickness .008 .010 0.25 Lead Width B .013 .020 0.51 α Mold Draft Angle Top 0 15 15 β Mold Draft Angle Bottom 0 15 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 Units Dimension Limits n p MIN INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12 MAX MIN MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12 DS21390D-page 12 © 2006 Microchip Technology Inc. TC1411/TC1411N APPENDIX A: REVISION HISTORY Revision D (September 2006) • Added -40°C to +125°C temperature range to Temperature Characteristics table and Product Information System page. • Added disclaimer to package outline drawings. Revision C (March 2003) • Added 8-Lead MSOP Package. Revision B (May 2002) • Converted TELCOM data sheet for Embedded Control Handbook Revision A (March 2001) • Original Release of this Document. © 2006 Microchip Technology Inc. DS21390D-page 13 TC1411/TC1411N NOTES: DS21390D-page 14 © 2006 Microchip Technology Inc. TC1411/TC1411N PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XX Package Examples: a) b) Device: TC1411: 1 A Single MOSFET Driver, Inverting TC1411N: 1 A Single MOSFET Driver, Non-Inverting C E V = = = 0°C to +70°C -40°C to +85°C -40°C to +125°C c) TC1411COA: TC1411CPA: TC1411EUA713: 1A Single MOSFET driver, 8LD SOIC pkg, 0°C to +70°C. 1A Single MOSFET driver, 8LD PDIP package, 0°C to +70°C. Tape and Reel, 1A Single MOSFET driver, 8LD MSOP package, -40°C to +85°C. Tape and Reel, 1A Single MOSFET driver, 8LD SOIC pkg, -40°C to +125°C. 1A Single MOSFET driver, 8LD PDIP package, 0°C to +70°C. 1A Single MOSFET driver, 8LD PDIP package, -40°C to +85°C. 1A Single MOSFET driver, 8LD MSOP package, -40°C to +85°C. 1A Single MOSFET driver, 8LD PDIP package, -40°C to +125°C Temperature Range: d) TC1411VOA713: Package: OA = Plastic SOIC, (150 mil Body), 8-lead OA713 = Plastic SOIC, (150 mil Body), 8-lead (Tape and Reel) UA = Plastic Micro Small Outline (MSOP), 8-lead * UA713 = Plastic Micro Small Outline (MSOP), 8-lead * (Tape and Reel) PA = Plastic DIP (300 mil Body), 8-lead * MSOP package is only available in E-Temp. a) b) c) d) TC1411NCPA: TC1411NEPA: TC1411NEUA: TC1411NVPA: © 2006 Microchip Technology Inc. DS21390D-page 15 TC1411/TC1411N NOTES: DS21390D-page 16 © 2006 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • • • Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” • • Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2006 Microchip Technology Inc. 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