MCP2022

MCP2021/2 LIN Transceiver with Voltage Regulator Features • The MCP2021 and MCP2022 are compliant with LIN Bus Specifications 1.3, 2.0, and 2.1 and are compliant to SAE J2602 • Support Baud Rates up to 20 Kbaud with LIN-compatible output driver • 43V load dump protected • Very low EMI meets stringent OEM requirements • Wide supply voltage, 6.0V - 18.0V continuous: - Maximum input voltage of 30V • Extended Temperature Range: -40 to +125°C • Interface to PIC EUSART and standard USARTs • Local Interconnect Network (LIN) bus pin: - Internal pull-up resistor and diode - Protected against ground shorts - Protected against loss of ground - High current drive • Automatic thermal shutdown • On-Board Voltage Regulator: - Output voltage of 5.0V with tolerances of ±3% overtemperature range - Available with alternate output voltage of 3.3V with tolerances of ±3% overtemperature range - Maximum continuous input voltage of 30V - Internal thermal overload protection - Internal short circuit current limit - External components limited to filter capacitor only and load capacitor • Two low-power modes: - Receiver on, Transmitter off, voltage regulator on (≅ 85 µA) - Receiver monitoring bus, Transmitter off, voltage regulator off (≅ 16 µA) Description The MCP2021/2 provides a bidirectional, half-duplex communication physical interface to automotive, and industrial LIN systems to meet the LIN bus specification Revision 2.0. The device incorporates a voltage regulator with 5V @ 50 mA or 3.3V @ 50 mA regulated power supply output. The regulator is short circuit protected, and is protected by an internal thermal shutdown circuit. The regulator has been specifically designed to operate in the automotive environment and will survive reverse battery connections, +43V load dump transients, and double-battery jumps. The device has been designed to meet the stringent quiescent current requirements of the automotive industry. MCP2021/2 family members: • 8-pin PDIP, DFN and SOIC packages: - MCP2021-330, LIN-compatible driver, 8-pin, 3.3V regulator - MCP2021-500, LIN-compatible driver, 8-pin, 5.0V regulator • 14-lead PDIP, TSSOP and SOIC packages with RESET output: - MCP2022-330, LIN-compatible driver, 14-pin, 3.3V regulator - MCP2022-500, LIN-compatible driver, 14-pin, 5.0V regulator Package Types DFN-8, PDIP-8, SOIC-8 MCP2021 RXD CS/LWAKE VREG TXD 1 2 3 4 8 7 6 5 FAULT/TXE VBB LBUS VSS PDIP-14, SOIC-14, TSSOP-14 RXD CS/LWAKE VREG TXD RESET NC NC 1 2 14 13 FAULT/TXE VBB LBUS VSS NC NC NC MCP2022 3 4 5 6 7 12 11 10 9 8 © 2009 Microchip Technology Inc. DS22018E-page 1 MCP2021/2 Block Diagram Short Circuit Protection Thermal Protection RESET Voltage Regulator VBB Ratiometric Reference Wake-Up Logic and Power Control VREG Internal Circuits RXD ~30 kΩ CS/LWAKE TXD FAULT/TXE Thermal Protection Short Circuit Protection OC LBUS VSS DS22018E-page 2 © 2009 Microchip Technology Inc. MCP2021/2 1.0 DEVICE OVERVIEW 1.2 1.2.1 Internal Protection ESD PROTECTION The MCP2021/2 provides a physical interface between a microcontroller and a LIN half-duplex bus. It is intended for automotive and industrial applications with serial bus speeds up to 20 Kbaud. The MCP2021/2 provides a half-duplex, bidirectional communications interface between a microcontroller and the serial network bus. This device will translate the CMOS/TTL logic levels to LIN level logic, and vice versa. The LIN specification 2.0 requires that the transceiver of all nodes in the system be connected via the LIN pin, referenced to ground and with a maximum external termination resistance of 510Ω from LIN bus to battery supply. The 510Ω corresponds to 1 Master and 16 Slave nodes. The MCP2021-500 provides a +5V 50 mA regulated power output. The regulator uses a LDO design, is short-circuit-protected and will turn the regulator output off if it falls below 3.5V. The MCP2021/2 also includes thermal shutdown protection. The regulator has been specifically designed to operate in the automotive environment and will survive reverse battery connections, +43V load dump transients and double-battery jumps. The other members of the MCP2021-330 family output +3.3V at 50 mA with a turn-off voltage of 2.5V. (see Section 1.6 “Internal Voltage Regulator”). For component-level ESD ratings, please refer to the maximum operation specifications. 1.2.2 GROUND LOSS PROTECTION The LIN Bus specification states that the LIN pin must transition to the recessive state when ground is disconnected. Therefore, a loss of ground effectively forces the LIN line to a hi-impedance level. 1.2.3 THERMAL PROTECTION The thermal protection circuit monitors the die temperature and is able to shut down the LIN transmitter and voltage regulator. There are three causes for a thermal overload. A thermal shut down can be triggered by any one, or a combination of, the following thermal overload conditions. • Voltage regulator overload • LIN bus output overload • Increase in die temperature due to increase in environment temperature Driving the TXD and checking the RXD pin makes it possible to determine whether there is a bus contention (Rx = low, Tx = high) or a thermal overload condition (Rx = high, Tx = low). 1.1 1.1.1 Optional External Protection REVERSE BATTERY PROTECTION FIGURE 1-1: An external reverse-battery-blocking diode should be used to provide polarity protection (see Example 1-1). THERMAL SHUTDOWN STATE DIAGRAMS Output Overload LIN bus shorted to VBB Operation Mode Transmitter Shutdown 1.1.2 TRANSIENT VOLTAGE PROTECTION (LOAD DUMP) An external 43V transient suppressor (TVS) diode, between VBB and ground, with a 50Ω transient protection resistor (RTP) in series with the battery supply and the VBB pin serve to protect the device from power transients (see Example 1-1) and ESD events. While this protection is optional, it should be considered as good engineering practice. Voltage Regulator Shutdown Temp < SHUTDOWNTEMP Temp < SHUTDOWNTEMP EQUATION 1-1: RTP 5.75V, regulator on. VBB ≤ 5.5V, regulator tracks VBB VBB < 4.25V, regulator will turn off © 2009 Microchip Technology Inc. DS22018E-page 11 MCP2021/2 FIGURE 1-6: VOLTAGE REGULATOR OUTPUT ON POWER DIP VBB V 12 8 6 4 3.5 2 0 VREG V 5 4 3.5 3 t 0 (1) Note 1: 2: 3: 4: (2) (3) (4) t Voltage regulator on. VBB ≤ 5.5V, regulator tracks VBB until VBB < 4.25V. VREG < 3.5V, regulator is off. VBB > 5.75V, regulator on. DS22018E-page 12 © 2009 Microchip Technology Inc. MCP2021/2 FIGURE 1-7: VOLTAGE REGULATOR OUTPUT ON OVERCURRENT SITUATION IREG mA 50 0 VREG V t 6 5.0 3.5 3 0 (1) Note 1: 2: (2) t IREG less than 50 mA, regulator on. After IREG exceeds IREGmax, voltage regulator output will be reduced until VREG off is reached. 1.7 ICSP™ Considerations The following should be considered when the MCP2021/2 is connected to pins supporting in-circuit programming: • Power used for programming the microcontroller can be supplied from the programmer, or from the MCP2021/2. • The voltage on VREG should not exceed the maximum output voltage of VREG. © 2009 Microchip Technology Inc. DS22018E-page 13 MCP2021/2 NOTES: DS22018E-page 14 © 2009 Microchip Technology Inc. MCP2021/2 2.0 2.1 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings† VIN DC Voltage on RXD and TXD ........................................................................................................ -0.3 to VREG+0.3V VIN DC Voltage on FAULT and RESET .........................................................................................................-0.3 to +5.5V VIN DC Voltage on CS/LWAKE.......................................................................................................................-0.3 to +43V VBB Battery Voltage, non-operating (LIN bus recessive, no regulator load, t < 60s) .....................................-0.3 to +43V VBB Battery Voltage, transient ISO 7637 Test 1 ......................................................................................................-200V VBB Battery Voltage, transient ISO 7637 Test 2a ...................................................................................................+150V VBB Battery Voltage, transient ISO 7637 Test 3a ....................................................................................................-300V VBB Battery Voltage, transient ISO 7637 Test 3b ...................................................................................................+200V VBB Battery Voltage, continuous ....................................................................................................................-0.3 to +30V VLBUS Bus Voltage, continuous.......................................................................................................................-18 to +30V VLBUS Bus Voltage, transient (Note 1)............................................................................................................-27 to +43V ILBUS Bus Short Circuit Current Limit ....................................................................................................................200 mA ESD protection on LIN, VBB (IEC 61000-4-2, 330 Ohm, 150 pF) (Note 3) .............................................. minimum ±9 kV ESD protection on LIN, VBB (Charge Device Model) (Note 2).............................................................................. ±1500V ESD protection on LIN, VBB (Human Body Model, 1 kOhm, 100 pF) (Note 4) ....................................................... ±8 kV ESD protection on LIN, VBB (Machine Model) (Note 2) ..........................................................................................±800V ESD protection on all other pins (Human Body Model) (Note 2) ............................................................................ > 4 kV Maximum Junction Temperature ............................................................................................................................. 150°C Storage Temperature .................................................................................................................................. -55 to +150°C Note 1: ISO 7637/1 load dump compliant (t < 500 ms). 2: According to JESD22-A114-B. 3: According to IBEE, without bus filter. 4: Limited by Test Equipment. † NOTICE: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2009 Microchip Technology Inc. DS22018E-page 15 MCP2021/2 2.2 DC Specifications Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VBB = 6.0V to 18.0V TA = -40°C to +125°C CLOADREG = 10 µF Sym IBBQ — VBB Transmitter-off Current IBBTO — Min. Typ. 115 120 90 Max. 210 215 190 Units µA µA µA Conditions IOUT = 0 mA, LBUS recessive VOUT = 3.3V With VREG on, transmitter off, receiver on, FAULT/ TXE = VIL, CS = VIH VOUT = 3.3V With VREG powered-off, receiver on and transmitter off, FAULT/TXE = VIH, TXD = VIH, CS = VIL) VBB = 12V, GND to VBB, VLIN = 0-18V DC Specifications Parameter Power VBB Quiescent Operating Current — VBB Power-down Current IBBPD — 95 16 210 26 µA µA VBB Current with VSS Floating Microcontroller Interface High Level Input Voltage (TXD, FAULT/TXE) Low Level Input Voltage (TXD, FAULT/TXE) High Level Input Current (TXD, FAULT/TXE) Low Level Input Current (TXD, FAULT/TXE) Pull-up Current on Input (TXD) High Level Input Voltage (CS/LWAKE) Low Level Input Voltage (CS/LWAKE) High Level Input Current (CS/LWAKE) Low Level Input Current (CS/LWAKE) Pull-down Current on Input (CS/LWAKE) Note 1: 2: 3: IBBNOGND -1 — 1 mA VIH 2.0 or (0.25VREG +0.8) -0.3 -2.5 -10 -3.0 0.7VREG -0.3 — — — — VREG +0.3 0.15 VREG — — — V VIL IIH IIL IPUTXD VIH VIL IIH IIL IPDCS — — — — — — — — — V µA µA µA V V µA µA µA Input voltage = 0.8*VREG Input voltage = 0.2*VREG ~1.3MΩ internal pull-down to VSS @ VIH = 3.5V Input voltage = 0.8*VREG Input voltage = 0.2*VREG ~800 kΩ internal pull-up to VREG @ VIH = 0.7*VREG Through a current-limiting resistor VBB 0.3VREG 7.0 3.0 6.0 Internal current limited. 2.0 ms maximum recovery time (RLBUS = 0Ω, TX = 0.4 VREG, VLBUS = VBB). For design guidance only, not tested. Node has to sustain the current that can flow under this condition; bus must be operational under this condition. DS22018E-page 16 © 2009 Microchip Technology Inc. MCP2021/2 2.2 DC Specifications (Continued) Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VBB = 6.0V to 18.0V TA = -40°C to +125°C CLOADREG = 10 µF Sym VIH(LBUS) VIL(LBUS) VHYS IOL(LBUS) IPU(LBUS) ISC VOH(LBUS) VOLLO (LBUS) IBUS_PAS_DOM Min. 0.6 VBB -8 — DC Specifications Parameter Bus Interface High Level Input Voltage Low Level Input Voltage Input Hysteresis Low Level Output Current Pull-up Current on Input Short Circuit Current Limit High Level Output Voltage Low Level Output Voltage Input Leakage Current (at the receiver during dominant bus level) Leakage Current (disconnected from ground) Leakage Current (disconnected from VBAT) Typ. — — — — — — — — — Max. 18 0.4 VBB 0.175 VBB 200 180 200 VBB 0.2 VBB — Units V V V mA µA mA V V mA Conditions Recessive state Dominant state VIH(LBUS) - VIL(LBUS) Output voltage = 0.1 VBB, VBB = 12V ~30 kΩ internal pull-up @ VIH (LBUS) = 0.7 VBB (Note 1) VOH(LBUS) must be at least 0.8 VBB 40 5 50 0.8 VBB — -1 Driver off, VBUS = 0V, VBAT = 12V GNDDEVICE = VBAT, 0V < VBUS < 18V, VBAT = 12V VBAT = GND, 0 < VBUS < 18V, TA = -40°C to +85°C (Note 3) TA = +85°C to +125°C VBUS_CNT = (VIL (LBUS) + VIH (LBUS))/2 IBUS_NO_GND -1 — +1 mA IBUS — — 10 µA 50 Receiver Center Voltage Slave Termination Note 1: 2: 3: VBUS_CNT Rslave 0.475 VBB 20 0.5 VBB 30 µA V kΩ 0.525 VBB 47 (RLBUS Internal current limited. 2.0 ms maximum recovery time For design guidance only, not tested. Node has to sustain the current that can flow under this condition; bus must be operational under this condition. = 0Ω, TX = 0.4 VREG, VLBUS = VBB). © 2009 Microchip Technology Inc. DS22018E-page 17 MCP2021/2 2.2 DC Specification (Continued) Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VBB = 6.0V to 18.0V TA = -40°C to +125°C CLOADREG = 10 µF Sym VOUT ΔVOUT2 Min. 4.85 — Typ. 5.00 10 Max. 5.15 50 Units V mV Conditions 0 mA < IOUT < 50 mA, 5 mA < IOUT < 50 mA refer to Section 1.6 “Internal Voltage Regulator” IOUT = 0 mA, (Note 2) 1 VPP @10-20 kHz CLOAD = 10 µf, ILOAD = 50 mA DC Specifications Parameter Voltage Regulator - 5.0V Output Voltage Load Regulation Quiescent Current Power Supply Ripple Reject Output Noise Voltage IVRQ PSRR — — — — 25 50 µA dB eN — — 100 µVRMS 10 Hz – 40 MHz CFILTER = 10 µf, CBP = 0.1 µf, CLOAD 10 µf, ILOAD = 50 mA V V V V See Figure 1-5 Shutdown Voltage Input Voltage to Maintain Regulation Input Voltage to Turn Off Output Input Voltage to Turn On Output Note 1: 2: 3: VSD VBB VOFF VON 3.5 6.0 4.0 5.5 — — — — 4.0 18.0 4.5 6.0 Internal current limited. 2.0 ms maximum recovery time (RLBUS = 0Ω, TX = 0.4 VREG, VLBUS = VBB). For design guidance only, not tested. Node has to sustain the current that can flow under this condition; bus must be operational under this condition. FIGURE 2-1: MCP2021-500 SAFE OPERATING RANGE 60 12V DFN Voltage Regulator Load (mA) 50 12V SOIC 18V DFN 40 18V SOIC 30 20 10 0 -40 -34 -28 -22 -16 -10 -4 2 8 14 20 26 32 38 44 50 56 62 68 74 80 86 92 98 104 110 116 122 Temperature (°C) DS22018E-page 18 © 2009 Microchip Technology Inc. MCP2021/2 2.2 DC Specification (Continued) Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VBB = 6.0V to 18.0V TA = -40°C to +125°C CLOADREG = 10 µF Sym VOUT ΔVOUT1 ΔVOUT2 Min. 3.20 — — Typ. 3.30 10 10 Max. 3.40 50 50 Units V mV mV Conditions 0 mA < IOUT < 50 mA IOUT = 1 mA, 6.0V < VBB < 18V 5 mA < IOUT < 50 mA Refer to Section 1.6 “Internal Voltage Regulator” IOUT = 0 mA, (Note 2) 1 VPP @10-20 kHz CLOAD = 10 µf, ILOAD = 50 mA DC Specifications Parameter Voltage Regulator - 3.3V Output Voltage Line Regulation Load Regulation Quiescent Current Power Supply Ripple Reject Output Noise Voltage IVRQ PSRR — — — — 25 50 µA dB eN — — 100 µVRMS 10 Hz – 40 MHz /√Hz CFILTER = 10 µf, CBP = 0.1 µf CLOAD = 10 µf, ILOAD = 50 mA V V V V See Figure 1-5 Shutdown Voltage Input Voltage to Maintain Regulation Input Voltage to Turn Off Output Input Voltage to Turn On Output Note 1: 2: 3: VSD VBB VOFF VON 2.5 6.0 4.0 5.5 — — — — 2.7 18.0 4.5 6.0 Internal current limited. 2.0 ms maximum recovery time (RLBUS = 0Ω, TX = 0.4 VREG, VLBUS = VBB). For design guidance only, not tested. Node has to sustain the current that can flow under this condition; bus must be operational under this condition. FIGURE 2-2: MCP2021-330 SAFE OPERATING RANGE 60 Voltage Regulator Load (mA) 12V DFN 50 12V SOIC 18V DFN 40 30 20 10 0 -40 -34 -28 -22 -16 -10 -4 2 8 14 20 26 32 38 44 50 56 62 68 74 80 86 92 98 104 110 116 122 Temperature (°C) 18V SOIC © 2009 Microchip Technology Inc. DS22018E-page 19 MCP2021/2 FIGURE 2-3: ESR CURVES FOR LOAD CAPACITOR SELECTION ESR Curves 10 Instable 1 ESR [ohm] Stable only with Tantalum or Electrolytic cap. Stable with 0.1 Instable Tantalum, Electrolytic and Ceramic cap. 0.01 Instable 0.001 0.1 1 10 Load Capacitor [uF] 100 1000 DS22018E-page 20 © 2009 Microchip Technology Inc. MCP2021/2 2.3 AC Specification VBB = 6.0V to 18.0V; TA = -40°C to +125°C Sym tSLOPE tTRANSPD tRECPD tRECSYM Min. 3.5 — — -2.0 Typ. — — — — Max. 22.5 4.0 6.0 2.0 Units µs µs µs µs Test Conditions 7.3V