RE46C190

RE46C190 CMOS Low Voltage Photoelectric Smoke Detector ASIC with Interconnect and Timer Mode Features • • • • • • • • • • • • • • Two AA Battery Operation Internal Power On Reset Low Quiescent Current Consumption Available in 16L N SOIC Local Alarm Memory Interconnect up to 40 Detectors 9 Minute Timer for Sensitivity Control Temporal or Continuous Horn Pattern Internal Low Battery and Chamber Test All Internal Oscillator Internal Infrared Emitter Diode (IRED) driver Adjustable IRED Drive current Adjustable Hush Sensitivity 2% Low Battery Set Point Description The RE46C190 is a low power, low voltage CMOS photoelectric type smoke detector IC. With minimal external components, this circuit will provide all the required features for a photoelectric-type smoke detector. The design incorporates a gain-selectable photo amplifier for use with an infrared emitter/detector pair. An internal oscillator strobes power to the smoke detection circuitry every 10 seconds, to keep the standby current to a minimum. If smoke is sensed, the detection rate is increased to verify an Alarm condition. A high gain mode is available for push button chamber testing. A check for a low battery condition is performed every 86 seconds, and chamber integrity is tested once every 43 seconds, when in Standby. The temporal horn pattern supports the NFPA 72 emergency evacuation signal. An interconnect pin allows multiple detectors to be connected such that, when one unit alarms, all units will sound. An internal 9 minute timer can be used for a Reduced Sensitivity mode. Utilizing low power CMOS technology, the RE46C190 was designed for use in smoke detectors that comply with Underwriters Laboratory Specification UL217 and UL268. PIN CONFIGURATION RE46C190 SOIC VSS IRED VDD TEST TEST2 IRP IRN RLED 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 LX VBST HS HB IO IRCAP FEED GLED  2010 Microchip Technology Inc. DS22271A-page 1 RE46C190 TYPICAL BLOCK DIAGRAM TEST2 (5) TEST (4) Precision Reference VDD (3) R3 R4 + IRP (6) IRN (7) Photo Integrator + Low Battery Comparator LX (16) Boost Control Current Sense Boost Comparator Smoke Comparator Control Logic and Timing Level Shift Horn Driver + IRCAP (11) Programmable Limits High Normal Hysteresis Trimmed Oscilator POR and BIAS HB (13) HS (14) FEED (10) Programming Control Interconnect IO (12) GLED (9) + VBST (15) RLED (8) IRED (2) VSS (1) Programmable IRED Current DS22271A-page 2  2010 Microchip Technology Inc. RE46C190 TYPICAL BATTERY APPLICATION VDD R1 Battery 3V 100 C1 10 µF C2 1 µF Push-to-Test/ Hush L1 10 µH RE46C190 D1 1 VSS VBST LX 16 VBST 15 HS 14 HB 13 IO 12 IRCAP11 FEED10 GLED 9 C6 33 µF R5 330 To other Units C5 R4 1.5M 1 nF R3 200K C4 4.7 µF VBST R7 100 R6 330 D4 RED D5 GREEN TP1 C3 100 µF 2 IRED 3 VDD TP2 Smoke Chamber D2 D3 4 TEST 5 TEST2 6 IRP 7 IRN 8 RLED Note 1: C2 should be located as close as possible to the device power pins, and C1 should be located as close as possible to VSS. 2: R3, R4 and C5 are typical values and may be adjusted to maximize sound pressure. 3: DC-DC converter in High Boost mode (nominal VBST = 9.6V) can draw current pulses of greater than 1A, and is therefore very sensitive to series resistance. Critical components of this resistance are the inductor DC resistance, the internal resistance of the battery and the resistance in the connections from the inductor to the battery, from the inductor to the LX pin and from the VSS pin to the battery. In order to function properly under full load at VDD= 2V, the total of the inductor and interconnect resistances should not exceed 0.3 . The internal battery resistance should be no more than 0.5  and a low ESR capacitor of 10 µF or more should be connected in parallel with the battery, to average the current draw over the boost converter cycle. 4: Schottky diode D1 must have a maximum peak current rating of at least 1.5A. For best results it should have forward voltage specification of less than 0.5V at 1A, and low reverse leakage. 5: Inductor L1 must have a maximum peak current rating of at least 1.5A.  2010 Microchip Technology Inc. DS22271A-page 3 RE46C190 NOTES: DS22271A-page 4  2010 Microchip Technology Inc. RE46C190 1.0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings† Supply Voltage .....................................VDD=5.5V; VBST =13V Input Voltage Range Except FEED, TEST..... VIN = -.3V to VDD +.3V FEED Input Voltage Range ..................... VINFD =-10 to +22V TEST Input Voltage Range ......... VINTEST =-.3V to VBST+.3V Input Current except FEED ................................... IIN = 10 mA Continuous Operating Current (HS, HB, VBST)...... IO= 40 mA Continuous Operating Current (IRED) ...............IOIR= 300 mA Operating Temperature ...............................TA = -10 to +60°C Storage Temperature ............................TSTG = -55 to +125°C ESD Human Body Model .................................. VHBM = 750V ESD Machine Model .............................................VMM = 75V DC ELECTRICAL CHARACTERISTICS DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10 to +60°C, VDD = 3V, VBST = 4.2V, Typical Application (unless otherwise noted)(Note 1, Note 2, Note 3) Parameter Supply Voltage Supply Current Symbol VDD IDD1 Test Pin 3 3 Min 2 — Typ — 1 Max 5.0 2 Units V µA Conditions Operating Standby, Inputs low, No loads, Boost Off, No smoke check Standby, Inputs low, No loads, Boost Off, No smoke check During smoke check IRCAP charging for Smoke Check, GLED operation IOUT = 40 mA No local alarm, RLED Operation, IOUT = 40 mA, IO as an input IRP = VDD or VSS IRN = VDD or VSS FEED = 22V; VBST = 9V FEED = -10V; VBST = 10.7V FEED, VBST = 9V No local alarm, IO as an input Standby Boost Current IRCAP Supply Current Boost Voltage IBST1 15 — 100 — nA IIRCAP VBST1 11 15 — 3.0 500 3.6 — 4.2 µA V VBST2 15 8.5 9.6 10.7 V Input Leakage IINOP IIHF IILF 6 7 10 10 10 12 -200 -200 — -50 — — — — 20 -15 — — 200 200 50 — 2.7 800 pA pA µA µA V mV Input Voltage Low VIL1 VIL2 Note 1: 2: 3: 4: Wherever a specific VBST value is listed under test conditions, the VBST is forced externally with the inductor disconnected and the DC-DC converter NOT running. Typical values are for design information only. Limits over the specified temperature range are not production tested and are based on characterization data. Unless otherwise stated, production test is at room temperature with guardbanded limits. Not production tested.  2010 Microchip Technology Inc. DS22271A-page 5 RE46C190 DC ELECTRICAL CHARACTERISTICS (CONTINUED) DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10 to +60°C, VDD = 3V, VBST = 4.2V, Typical Application (unless otherwise noted)(Note 1, Note 2, Note 3) Parameter Input Voltage High Symbol VIH1 VIH2 IO Hysteresis Input Pull Down Current Output Voltage Low VHYST1 IPD1 IPDIO1 IPDIO2 VOL1 VOL2 VOL3 Output High Voltage Output Current VOH1 IIOH1 IIODMP IIRED50 Test Pin 10 12 12 4, 5 12 12 13, 14 8 9 13, 14 12 12 2 Min 6.2 2.0 — 0.25 20 — — — — 8.5 -4 5 45 Typ — — 150 — — — — — — — -5 30 50 Max — — — 10 80 140 1 300 300 — — — 55 Units V V mV µA µA µA V mV mV V mA mA mA VIN = VDD VIN = VDD VIN = 15V IOL = 16 mA, VBST = 9V IOL = 10 mA, VBST = 9V IOL = 10 mA, VBST = 3.6V IOL = 16 mA, VBST = 9V Alarm, VIO = 3V or VIO = 0V, VBST = 9V At Conclusion of Local Alarm or Test, VIO=1V IRED on, VIRED = 1V, VBST = 5V, IRCAP = 5V, (50 mA option selected; TA = 27°C) IRED on, VIRED = 1V, VBST = 5V, IRCAP = 5V, (100 mA option selected; TA = 27°C) IRED on, VIRED = 1V, VBST = 5V, IRCAP = 5V, (150 mA option selected; TA = 27°C) IRED on, VIRED = 1V, VBST = 5V, IRCAP = 5V, (200 mA option selected; TA = 27°C) VBST = 5V, IRCAP = 5V; Note 4 Conditions FEED; VBST = 9V No local alarm, IO as an input IIRED100 2 90 100 110 mA IIRED150 2 135 150 165 mA IIRED2050 2 180 200 220 mA IRED Current Temperature Coefficient Note 1: 2: 3: 4: TCIRED — 0.5 — %/°C Wherever a specific VBST value is listed under test conditions, the VBST is forced externally with the inductor disconnected and the DC-DC converter NOT running. Typical values are for design information only. Limits over the specified temperature range are not production tested and are based on characterization data. Unless otherwise stated, production test is at room temperature with guardbanded limits. Not production tested. DS22271A-page 6  2010 Microchip Technology Inc. RE46C190 DC ELECTRICAL CHARACTERISTICS (CONTINUED) DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10 to +60°C, VDD = 3V, VBST = 4.2V, Typical Application (unless otherwise noted)(Note 1, Note 2, Note 3) Parameter Low Battery Alarm Voltage Symbol VLB1 VLB2 VLB3 VLB4 VLB5 VLB6 VLB7 VLB8 Low Battery Hysteresis IRCAP Turn On Voltage IRCAP Turn Off Voltage Note 1: 2: 3: 4: VLBHYST VTIR1 VTIR2 Test Pin 3 3 3 3 3 3 3 3 3 11 11 Min 2.05 2.15 2.25 2.35 2.45 2.55 2.65 2.75 — 3.6 4.0 Typ 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 100 4.0 4.4 Max 2.15 2.25 2.35 2.45 2.55 2.65 2.75 2.85 — 4.4 4.8 Units V V V V V V V V mV V V Falling edge; VBST = 5V; IOUT = 20 mA Rising edge; VBST = 5V; IOUT = 20 mA Conditions Falling Edge; 2.1V nominal selected Falling Edge; 2.2V nominal selected Falling Edge; 2.3V nominal selected Falling Edge; 2.4V nominal selected Falling Edge; 2.5V nominal selected Falling Edge; 2.6V nominal selected Falling Edge; 2.7V nominal selected Falling Edge; 2.8V nominal selected Wherever a specific VBST value is listed under test conditions, the VBST is forced externally with the inductor disconnected and the DC-DC converter NOT running. Typical values are for design information only. Limits over the specified temperature range are not production tested and are based on characterization data. Unless otherwise stated, production test is at room temperature with guardbanded limits. Not production tested.  2010 Microchip Technology Inc. DS22271A-page 7 RE46C190 AC ELECTRICAL CHARACTERISTICS AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10° to +60°C, VDD = 3V, VBST = 4.2V, Typical Application (unless otherwise noted) (Note 1 to Note 4). Parameter Time Base Internal Clock Period RLED Indicator On Time Standby Period Local Alarm Period TON1 TPLED1 TPLED2A 8 8 8 9.80 320 470 10.4 344 500 11.0 368 530 ms s ms Operating Standby, no alarm Local alarm condition with temporal horn pattern Local alarm condition with continuous horn pattern Timer mode, no local alarm Remote alarm only TPCLK 9.80 10.4 11.0 ms PROGSET, IO = high Symbol Test Pin Min Typ Max Units Condition TPLED2B 8 625 667 710 ms Hush Timer Period External Alarm Period GLED Indicator Latched Alarm Period Latched Alarm Pulse Train (3x) Off Time Latched Alarm LED Enabled Duration Smoke Check Smoke Test Period with Temporal Horn Pattern TPLED4 TPLED0 8 8 10 10.7 LED IS NOT ON 11.4 s s TPLED3 TOFLED TLALED 9 9 9 40 1.25 22.4 43 1.33 23.9 46 1.41 25.3 s s Hours Latched Alarm Condition, LED enabled Latched Alarm Condition, LED enabled Latched Alarm Condition, LED enabled Standby, no alarm Standby, after one valid smoke sample Standby, after two consecutive valid smoke samples Local Alarm (three consecutive valid smoke samples) Push button test, >1 chamber detections Push button test, no chamber detections In remote alarm TPER0A TPER1A TPER2A 2 2 2 10 1.88 0.94 10.7 2.0 1.0 11.4 2.12 1.06 s s s TPER3A 2 0.94 1.0 1.06 s TPER4A 2 235 313 250 333 8.0 265 353 8.5 ms ms s TPER5A Note 1: 2: 3: 4: 2 7.5 See timing diagram for Horn Pattern (Figure 5-2). TPCLK and TIRON are 100% production tested. All other AC parameters are verified by functional testing. Typical values are for design information only. Limits over the specified temperature range are not production tested, and are based on characterization data. DS22271A-page 8  2010 Microchip Technology Inc. RE46C190 AC ELECTRICAL CHARACTERISTICS (CONTINUED) AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10° to +60°C, VDD = 3V, VBST = 4.2V, Typical Application (unless otherwise noted) (Note 1 to Note 4). Parameter Smoke Test Period with Continuous Horn Pattern Symbol Test Pin TPER0B TPER1B TPER2B 2 2 2 Min 10 2.5 1.25 Typ 10.7 2.7 1.33 Max 11.4 2.9 1.41 Units s s s Condition Standby, no alarm Standby, after one valid smoke sample Standby, after two consecutive valid smoke samples Local Alarm (three consecutive valid smoke samples) Push button test In remote alarm Standby, no alarm Standby, no alarm LTD enabled RLED on RLED on Low battery, no alarm Chamber failure Low battery, no alarm Chamber failure Failed chamber, no alarm, 3x chirp option Local or remote alarm (Note 1) Local or remote alarm (Note 1) Local or remote alarm (Note 1) Local or remote alarm (Note 1) Local or remote alarm (Note 1) TPER3B 2 1.25 1.33 1.41 s TPER4B TPER5B Chamber Test Period Long Term Drift Sample Period Low Battery Low Battery Sample Period Horn Operation Low Battery Horn Period Chamber Fail Horn Period Low Battery Horn On Time Chamber Fail Horn On Time Chamber Fail Off Time Alarm On Time with Temporal Horn Pattern Alarm Off Time with Temporal Horn Pattern Alarm On Time with Continuous Horn Pattern Alarm Off Time with Continuous Horn Pattern Note 1: 2: 3: 4: THPER1 THPER2 THON1 THON2 THOF1 THON2A TPLB1 TPLB2 TPCT1 TLTD 2 2 2 2 313 10 40 400 333 10.7 43 430 353 11.4 46 460 ms s s s 3 3 13 13 13 13 13 13 320 80 40 40 9.8 9.8 305 470 344 86 43 43 10.4 10.4 325 500 368 92 46 46 11.0 11.0 345 530 s s s s ms ms ms ms THOF2A THOF3A THON2B 13 13 13 470 1.4 235 500 1.5 250 530 1.6 265 ms s ms THOF2B 13 78 83 88 ms See timing diagram for Horn Pattern (Figure 5-2). TPCLK and TIRON are 100% production tested. All other AC parameters are verified by functional testing. Typical values are for design information only. Limits over the specified temperature range are not production tested, and are based on characterization data.  2010 Microchip Technology Inc. DS22271A-page 9 RE46C190 AC ELECTRICAL CHARACTERISTICS (CONTINUED) AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10° to +60°C, VDD = 3V, VBST = 4.2V, Typical Application (unless otherwise noted) (Note 1 to Note 4). Parameter Push-to-Test Alarm Memory On Time Push-to-Test Alarm Memory Horn Period IO Active Delay Remote Alarm Delay with Temporal Horn Pattern Symbol Test Pin THON4 THPER4 13 13 Min 9.8 235 Typ 10.4 250 Max 11.0 265 Units ms ms Condition Alarm memory active, push-to-test Alarm memory active, push-to-test From start of local alarm to IO active No local alarm, from IO active to alarm No local alarm, from IO active to alarm At conclusion of local alarm or test Standby, no alarm No alarm EOL Enabled; Standby Interconnect Signal Operation (IO) TIODLY1 TIODLY2A 12 12 — 0.780 0 1.00 — 1.25 s s Remote Alarm Delay TIODLY2B with Continuous Horn Pattern IO Charge Dump Duration IO Filter Hush Timer Operation Hush Timer Period EOL End-of-Life Age Sample Detection IRED On Time TIRON TEOL TTPER TIODMP TIOFILT 12 380 572 785 ms 12 12 1.23 — 8.0 314 1.31 — 8.6 334 1.39 313 9.1 354 s ms Min Hours 2 2 2 2 — — — — 100 200 300 400 — — — — µs µs µs µs Prog Bits 3,4 = 1,1 Prog Bits 3,4 = 0,1 Prog Bits 3,4 = 1,0 Prog Bits 3,4 = 0,0 Note 1: 2: 3: 4: See timing diagram for Horn Pattern (Figure 5-2). TPCLK and TIRON are 100% production tested. All other AC parameters are verified by functional testing. Typical values are for design information only. Limits over the specified temperature range are not production tested, and are based on characterization data. TEMPERATURE CHARACTERISTICS Electrical Specifications: All limits specified for VDD = 3V, VBST = 4.2V and VSS = 0V, Except where noted in the Electrical Characteristics. Parameters Temperature Ranges Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 16L-SOIC (150 mil.) θJA — 86.1 — °C/W TA TSTG -10 -55 — — +60 +125 °C °C Sym Min Typ Max Units Conditions DS22271A-page 10  2010 Microchip Technology Inc. RE46C190 2.0 PIN DESCRIPTIONS PIN FUNCTION TABLE Symbol VSS IRED VDD TEST TEST2 IRP IRN RLED GLED FEED IRCAP IO HB HS VBST LX Function Connect to the negative supply voltage. Provides a regulated and programmable pulsed current for the infrared emitter diode. Connect to the positive supply or battery voltage. This input is used to invoke Test modes and the Timer mode. This input has an internal pull-down. Test input for test and programming modes. This input has an internal pull-down. Connect to the anode of the photo diode. Connect to the cathode of the photo diode. Open drain NMOS output, used to drive a visible LED. This pin provides load current for the low battery test, and is a visual indicator for Alarm and Hush modes. Open drain NMOS output used to drive a visible LED to provide visual indication of an Alarm Memory condition. Usually connected to the feedback electrode through a current limiting resistor. If not used, this pin must be connected to VDD or VSS. Used to charge and monitor the IRED capacitor. This bidirectional pin provides the capability to interconnect many detectors in a single system. This pin has an internal pull-down device and a charge dump device. This pin is connected to the metal electrode of a piezoelectric transducer. This pin is a complementary output to HB, connected to the ceramic electrode of the piezoelectric transducer. Boosted voltage produced by DC-DC converter. Open drain NMOS output, used to drive the boost converter inductor. The inductor should be connected from this pin to the positive supply through a low resistance path. The descriptions of the pins are listed in Table 2-1. TABLE 2-1: RE46C190 SOIC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16  2010 Microchip Technology Inc. DS22271A-page 11 RE46C190 NOTES: DS22271A-page 12  2010 Microchip Technology Inc. RE46C190 3.0 3.1 DEVICE DESCRIPTION Standby Internal Timing 3.3 Supervisory Tests The internal oscillator is trimmed to ±6% tolerance. Once every 10 seconds, the boost converter is powered up, the IRcap is charged from VBST and then the detection circuitry is active for 10 ms. Prior to completion of the 10 mS period, the IRED pulse is active for a user-programmable duration of 100400 µs. During this IRED pulse, the photo diode current is integrated and then digitized. The result is compared to a limit value stored in EEPROM during calibration to determine the photo chamber status. If a smoke condition is present, the period to the next detection decreases, and additional checks are made. Once every 86 seconds, the status of the battery voltage is checked by enabling the boost converter for 10 ms and comparing a fraction of the VDD voltage to an internal reference. In each period of 344 seconds, the battery voltage is checked four times. Three checks are unloaded and one check is performed with the RLED enabled, which provides a battery load. The High Boost mode is active only for the loaded low battery test. In addition, once every 43 seconds the chamber is activated and a High Gain mode and chamber test limits are internally selected. A check of the chamber is made by amplifying background reflections. The Low Boost mode is used for the chamber test. If either the low battery test or the chamber test fails, the horn will pulse on for 10 ms every 43 seconds, and will continue to pulse until the failing condition passes. If two consecutive chamber tests fail, the horn will pulse on three times for 10 ms, separated by 330 ms every 43 seconds. Each of the two supervisory test audible indicators is separated by approximately 20 seconds. As an option, a Low Battery Silence mode can be invoked. If a low battery condition exists, and the TEST input is driven high, the RLED will turn on. If the TEST input is held for more than 0.5 second, the unit will enter the Push-to-test operation described in Section 3.4 “Push-to-Test Operation (PTT)”. After the TEST input is driven low, the unit enters in Low Battery Hush mode, and the 10 ms horn pulse is silenced for 8 hours. The activation of the test button will also initiate the 9 minute Reduced Sensitivity mode described in Section 3.6 “Reduced Sensitivity Mode”. At the end of the 8 hours, the audible indication will resume if the low battery condition still exists. 3.2 Smoke Detection Circuitry The digitized photo amplifier integrator output is compared to the stored limit value at the conclusion of the IRED pulse period. The IRED drive is all internal, and both the period and current are user programmable. Three consecutive smoke detections will cause the device to go into Alarm and activate the horn and interconnect circuits. In Alarm, the horn is driven at the high boost voltage level, which is regulated based on an internal voltage reference, and therefore results in consistent audibility over battery life. RLED will turn on for 10 ms at a 2 Hz rate. In Local Alarm, the integration limit is internally decreased to provide alarm hysteresis. The integrator has three separate gain settings: • Normal and Hysteresis • Reduced Sensitivity (HUSH) • High Gain for Chamber Test and Push-to-Test There are four separate sets of integration limits (all user programmable): • • • • Normal Detection Hysteresis HUSH Chamber Test and Push-to-Test modes 3.4 Push-to-Test Operation (PTT) In addition, there are user selectable integrator gain settings to optimize detection levels (see Table 4-1). If the TEST input pin is activated (VIH), the smoke detection rate increases to once every 250 ms after one internal clock cycle. In Push-to-Test, the photo amplifier High Gain mode is selected, and background reflections are used to simulate a smoke condition. After the required three consecutive detections, the device will go into a Local Alarm condition. When the TEST input is driven low (VIL), the photo amplifier Normal Gain is selected, after one clock cycle. The detection rate continues at once every 250 ms until three consecutive No Smoke conditions are detected. At this point, the device returns to standby timing. In addition, after the TEST input goes low, the device enters the HUSH mode (see Section 3.6 “Reduced Sensitivity Mode”).  2010 Microchip Technology Inc. DS22271A-page 13 RE46C190 3.5 Interconnect Operation 3.7 Local Alarm Memory The bidirectional IO pin allows the interconnection of multiple detectors. In a Local Alarm condition, this pin is driven high (High Boost) immediately through a constant current source. Shorting this output to ground will not cause excessive current. The IO is ignored as input during a Local Alarm. The IO pin also has an NMOS discharge device that is active for 1.3 seconds after the conclusion of any type of Local Alarm. This device helps to quickly discharge any capacitance associated with the interconnect line. If a remote, active high signal is detected, the device goes into Remote Alarm and the horn will be active. RLED will be off, indicating a Remote Alarm condition. Internal protection circuitry allows the signaling unit to have a higher supply voltage than the signaled unit, without excessive current draw. The interconnect input has a 336 ms nominal digital filter. This allows the interconnection to other types of alarms (carbon monoxide, for example) that may have a pulsed interconnect signal. An Alarm Memory feature allows easy identification of any unit that had previously been in a Local Alarm condition. If a detector has entered a Local Alarm, when it exits that Local Alarm, the Alarm Memory latch is set. Initially the GLED can be used to visually identify any unit that had previously been in a Local Alarm condition. The GLED flashes three times spaced 1.3 seconds apart. This pattern will repeat every 43 seconds. The duration of the flash is 10 ms. In order to preserve battery power, this visual indication will stop after a period of 24 hours. The user will still be able to identify a unit with an active alarm memory by pressing the Push-to-Test button. When this button is active, the horn will chirp for 10 ms every 250 ms. If the Alarm Memory condition is set, then any time the Push-to-Test button is pressed and released, the Alarm Memory latch is reset. The initial 24 hour visual indication is not displayed if a low battery condition exists. 3.8 End of Life Indicator 3.6 Reduced Sensitivity Mode A Reduced Sensitivity or Hush mode is initiated by activating the TEST input (VIH). If the TEST input is activated during a Local Alarm, the unit is immediately reset out of the alarm condition, and the horn is silenced. When the TEST input is deactivated (VIL), the device enters into a 9-minute nominal Hush mode. During this period, the HUSH integration limit is selected. The hush gain is user programmable. In Reduced Sensitivity mode, the RLED flashes for 10 ms every 10 seconds to indicate that the mode is active. As an option, the Hush mode will be cancelled if any of the following conditions exist: • Reduced sensitivity threshold is exceeded (high smoke level) • An interconnect alarm occurs • TEST input is activated again As an option, after every 14 days of continuous operation, the device will read a stored age count from the EEPROM and increment this count. After 10 years of powered operation, an audible warning will occur indicating that the unit should be replaced. This indicator will be similar to the chamber test failure warning in that the horn will pulse on three times for 10 ms separated by 330 ms every 43 seconds. This indicator will be separated from the low battery indicator by approximately 20 seconds. 3.9 Photo Chamber Long Term Drift Adjustment As an option, the design includes a Long Term Drift Adjustment for the photo chamber. If this option is selected, during calibration a normal no-smoke baseline integration measurement is made and stored in EEPROM. During normal operation, a new baseline is calculated by making 64 integration measurements over a period of 8 hours. These measurements are averaged and compared to the original baseline stored during calibration to calculate the long term drift. All four limits stored during calibration are adjusted by this drift factor. Drift sampling is suspended during Hush, Local Smoke and Remote Smoke conditions. DS22271A-page 14  2010 Microchip Technology Inc. RE46C190 4.0 USER PROGRAMMING MODES PARAMETRIC PROGRAMMING Range 100-400 µs 50-200 mA 2.1 – 2.8V 100 µs Normal/Hysteresis GF = 1 GF = 2 GF = 3 GF = 4 Hush GF = 1 GF = 2 GF = 3 GF = 4 Chamber Test GF = 1 GF = 2 GF = 3 GF = 4 Note 1: 58 29 14.5 7.2 116 58 29 14.5 29 14.5 7.2 3.6 200 µs 29 14.5 7.2 3.6 58 29 14.5 7.2 14.5 7.2 3.6 1.8 300 µs 19.4 9.6 4.8 2.4 38.8 19.4 9.6 4.8 9.6 4.8 2.4 1.2 Resolution 100 µs 50 mA 100 mV 400 µs 14.5 7.2 3.6 1.8 29 14.5 7.2 3.6 7.2 3.6 1.8 0.9 Parametric Programming IRED Period IRED Current Sink Low Battery Detection Voltage Photo Detection Limits TABLE 4-1: Typical Maximum Input Current (nA) 2: 3: GF is the user selectable Photo Integration Gain Factor. Once selected, it applies to all modes of operation. For example, if GF = 1 and integration time is selected to be 100 µs, the ranges will be as follows: Normal/Hysteresis = 58 nA, Hush = 116 nA, Chamber Test = 29 nA. Nominal measurement resolution in each case will be 1/31 of the maximum input range. The same current resolution and ranges applies to the limits. TABLE 4-2: Tone Select FEATURES PROGRAMMING Features Options Continuous or NFPA Tone Enable/Disable Enable/Disable Enable/Disable Option 1: Hush mode is not cancelled for any reason. If the test button is pushed during Hush, the unit reverts to Normal Sensitivity to test the unit, but when it comes out of test, resumes in Hush where it left off. Option 2: The Hush mode is cancelled if the Reduced Sensitivity threshold is exceeded (high smoke level), and if an external (interconnect alarm) is signaled. If the test button is pushed during Hush, after the test is executed, the Hush mode is terminated. 10 Year End-of-life Indicator Photo Chamber Long Term Drift Adjustment Low Battery Hush Hush Options  2010 Microchip Technology Inc. DS22271A-page 15 RE46C190 4.1 Calibration and Programming Procedures When TEST2 is held at VDD, TEST becomes a tri-state input with nominal input levels at VSS, VDD and VBST. A TEST clock occurs whenever the TEST input switches from VSS to VBST. The TEST Data column represents the state of TEST when used as a data input, which would be either VSS or VDD. The TEST pin can therefore be used as both a clock, to change modes, and a data input, once a mode is set. Other pin functions are described in Section 4.2 “User Selections”. Eleven separate programming and test modes are available for user customization. To enter these modes, after power-up, TEST2 must be driven to VDD and held at that level. The TEST input is then clocked to step through the modes. FEED and IO are reconfigured to become test mode inputs, while RLED, GLED and HB become test mode outputs. The test mode functions for each pin are outlined in Table 4-3. TABLE 4-3: Mode TEST MODE FUNCTIONS TEST Clock VBST VSS 0 0 0 0 0 0 0 0 0 1 2 3 4 5 6 7 8 9 10 11 TEST Data VDD VSS ProgData ProgData ProgData ProgData ProgData ProgData ProgData ProgData ProgData not used not used not used not used not used ProgData not used not used not used not used not used TEST2 VDD VSS VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD FEED VBST VSS IO VDD VSS RLED — — GLED — — GLED GLED GLED GLED GLED GLED GLED GLED GLED HB — — HB HB HB HB HB HB HB HB HB Description VIH VIL T0 Photo Gain Factor (2 bits) Integ Time (2 bits) IRED Current (2 bits) Low Battery Trip (3 bits) LTD Enable (1 bit) Hush Option (1 bit) LB Hush Enable (1 bit) EOL Enable (1 bit) Tone Select (1 bit) ProgCLK ProgEn 14 bits RLED ProgCLK ProgEn 14 bits RLED ProgCLK ProgEn 14 bits RLED ProgCLK ProgEn 14 bits RLED ProgCLK ProgEn 14 bits RLED ProgCLK ProgEn 14 bits RLED ProgCLK ProgEn 14 bits RLED ProgCLK ProgEn 14 bits RLED ProgCLK ProgEn 14 bits RLED CalCLK CalCLK CalCLK CalCLK LatchLim( 3) T1 T2 T3 T4 T5 T6 T7 T8 T9 Norm Lim Set (5 bits)( 4) Hyst Lim Set (5 bits)( 4) Hush Lim Set (5 bits)( 4) Ch Test Lim Set (5 bits)( 4) LTD Baseline (5 bits) Serial Read/Write Norm Lim Check Hyst Lim Check Hush Lim Check Gamp IntegOut SmkComp( 1) Gamp IntegOut SmkComp( 1) Gamp IntegOut SmkComp( 1) Gamp IntegOut SmkComp( 1) LatchLim( 3) LatchLim( 3) LatchLim( 3) MeasEn ProgEn 25 bits Gamp IntegOut SmkComp( 1) ProgCLK MeasEn MeasEn MeasEn MeasEn FEED ProgEn not used not used not used not used HornEn RLED GLED Serial Out SCMP( 2) SCMP( 2) SCMP( 2) SCMP( 2) HB Gamp IntegOut Gamp IntegOut Gamp IntegOut Gamp IntegOut RLED GLED T10 Ch Test Lim Check T11 Horn Test Note 1: 2: 3: 4: SmkComp (HB) – digital comparator output (high if Gamp < IntegOut; low if Gamp > IntegOut) SCMP (HB) – digital output representing comparison of measurement value and associated limit. Signal is valid only after MeasEn has been asserted and measurement has been made. (SCMP high if measured value > limit; low if measured value < limit). LatchLim (IO) – digital input used to latch present state of limits (Gamp level) for later storage. T1-T4 limits are latched, but not stored until ProgEn is asserted in T5 mode. Operating the circuit in this manner with nearly continuous IRED current for an extended period of time may result in undesired or excessive heating of the part. The duration of this step should be minimized. DS22271A-page 16  2010 Microchip Technology Inc. RE46C190 4.2 User Selections Prior to smoke calibration, the user must program the functional options and parametric selections. This requires that 14 bits, representing selected values, be clocked in serially using TEST as a data input and FEED as a clock input, and then be stored in the internal EEPROM. The detailed steps are as follows: 1. Power up with bias conditions as shown in Figure 4-1. At power-up TEST = TEST2 = FEED = IO = VSS. RE46C190 1 VSS V1 3V 2 IRED 3 VDD 4 TEST 5 TEST2 6 IRP D2 D3 Smoke Chamber Monitor RLED, GLED, and HB V4 V5 V6 V7 7 IRN 8 RLED LX 16 VBST 15 HS 14 HB 13 IO 12 IRCAP 11 FEED 10 GLED 9 5V V3 5V V2 FIGURE 4-1: Nominal Application Circuit for Programming.  2010 Microchip Technology Inc. DS22271A-page 17 RE46C190 2. 3. Drive TEST2 input from VSS to VDD and hold at VDD through Step 5 below. Using TEST as data and FEED as clock, shift in values as selected from Register 4-1. Note: For test mode T0 only 14 bits (bits 25-38) will be loaded. For test mode T6 all 39 bits (bits 0-38), will be loaded. REGISTER 4-1: CONFIGURATION AND CALIBRATION SETTINGS REGISTER W-x TS W-x EOL W-x LBH W-x HUSH W-x LTD W-x LB0 W-x LB1 bit 32 W-x IRC0 W-x IT1 W-x IT0 W-x PAGF1 W-x PAGF0 W-x NL4 bit 24 W-x NL2 W-x NL1 W-x NL0 W-x HYL4 W-x HYL3 W-x HYL2 W-x HYL1 bit 16 W-x HUL4 W-x HUL3 W-x HUL2 W-x HUL1 W-x HUL0 W-x CTL4 W-x CTL3 bit 8 W-x CTL1 W-x CTL0 W-x LTD4 W-x LTD3 W-x LTD2 W-x LTD1 W-x LTD0 bit 0 bit 38 W-x LB2 bit 31 W-x NL3 bit 23 W-x HYL0 bit 15 W-x CTL2 bit 7 Legend: R = Readable bit -n = Value at POR bit 38 W = Writable bit ‘1’ = Bit is set U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared x = Bit is unknown W-x IRC1 TS: Tone Select bit 1 = Temporal Horn Pattern 0 = Continuous Horn Pattern EOL: End of Life Enable bit 1 = Enable 0 = Disable LBH: Low Battery Hush Enable bit 1 = Enable 0 = Disable HUSH: Hush Option bit 1 = Cancelled for high smoke level, interconnect alarm, or second push of TEST button (as described above) 0 = Never Cancel LTD: Long Term Drift Enable bit 1 = Enable 0 = Disable bit 37 bit 36 bit 35 bit 34 DS22271A-page 18  2010 Microchip Technology Inc. RE46C190 REGISTER 4-1: bit 33-31 CONFIGURATION AND CALIBRATION SETTINGS REGISTER (CONTINUED) LB: Low Battery Trip Point bits 000 = 2.1V 001 = 2.5V 010 = 2.3V 011 = 2.7V 100 = 2.2V 101 = 2.6V 110 = 2.4V 111 = 2.8V IRC: IRED Current bits 00 = 50 mA 01 = 100 mA 10 = 150 mA 11 = 200 mA IT: Integration Time bits 00 = 400 µs 01 = 300 µs 10 = 200 µs 11 = 100 µs PAGF: Photo Amplifier Gain Factor bits 00 = 1 01 = 2 10 = 3 11 = 4 NL: Normal Limits bits (Section 3.2) 00000 = 0 00001 = 1 • • • 11110 = 30 11111 = 31 HYL: Hysteresis Limits bits (Section 3.2) 00000 = 0 00001 = 1 • • • 11110 = 30 11111 = 31 HUL: Hush Limits bits (Section 3.6) 00000 = 0 00001 = 1 • • • 11110 = 30 11111 = 31 bit 30-29 bit 28-27 bit 26-25 bit 24-20 bit 19-15 bit 14-10  2010 Microchip Technology Inc. DS22271A-page 19 RE46C190 REGISTER 4-1: bit 9-5 CONFIGURATION AND CALIBRATION SETTINGS REGISTER (CONTINUED) CTL: Chamber Test Limits bits (Section 3.3) 00000 = 0 00001 = 1 • • • 11110 = 30 11111 = 31 LTD: Long Term Drift Sample bits (Section 3.9) 00000 = 0 00001 = 1 • • • 11110 = 30 11111 = 31 4. After shifting in data, pull IO input to VDD, then VSS (minimum pulse width of 10 ms) to store shift register contents into the memory. If any changes are required, power down the part and return to Step 1. All bit values must be reentered. bit 4-0 The minimum pulse width for FEED is 10 µs, while the minimum pulse width for TEST is 100 µs. For example, for the following options, the sequence would be: data bit 00011000100001 5. - 25 26 27 28 29 30 31 32 33 34 35 36 37 38 = 200 µs = 100 mA = 2.2V Photo Amp Gain Factor = 1 Integration Time IRED Current Low Battery Trip Long Term Drift, Low Battery Hush and EOL are all disabled Hush Option Tone Select = Never Cancel = Temporal VDD TEST2 VSS VDD TEST VSS VBST FEED bit 25 bit 26 bit 27 bit 28 bit 29 bit 30 bit 31 bit 32 bit 33 bit 34 bit 35 bit 36 bit 37 bit 38 VSS Min Tsetup2 = 2 µs VDD IO VSS Min Tsetup1 = 1 µs Min Thold1 = 1 µs Min PW1 = 10us Min T1 = 20 µs Min Td1 = 2 µs … Min PW2 = 10 ms FIGURE 4-2: Timing Diagram for Mode T0. DS22271A-page 20  2010 Microchip Technology Inc. RE46C190 As an alternative to Figure 4-1, Figure 4-3 can be used to program while in the application circuit. Note that in addition to the five programming supplies, connections to VSS are needed at TP1 and TP2. VDD L1 10 µH Push-To-Test/ Hush R1 V1 3V VBST C3 R6 330 R7 100 TP1 100 µF TP2 100 C1 10 µF Monitor RLED, GLED and HB VBST RE46C190 D1 1 VSS 2 IRED 3 VDD C2 1 µF LX 16 VBST 15 HS 14 HB 13 V2 5V R4 1.5M C5 1 nF R3 200K C4 4.7 µF Smoke Chamber D4 D5 D2 D3 RED GREEN 4 TEST 5 TEST2 6 IRP 7 IRN 8 RLED IO 12 IRCAP 11 FEED 10 R5 330 C6 33 µF To other Units V3 5V GLED 9 V4 V5 V6 V7 FIGURE 4-3: Circuit for Programming in the Typical Application.  2010 Microchip Technology Inc. DS22271A-page 21 RE46C190 4.3 Smoke Calibration 5. A separate calibration mode is entered for each measurement mode (Normal, Hysteresis, Hush and Chamber Test) so that independent limits can be set for each. In all calibration modes, the integrator output can be accessed at the GLED output. The Gamp output voltage, which represents the smoke detection level, can be accessed at the RLED output. The SmkComp output voltage is the result of the comparison of Gamp with the integrator output, and can be accessed at HB. The FEED input can be clocked to step up the smoke detection level at RLED. Once the desired smoke threshold is reached, the TEST input is pulsed low to high to store the result. The procedure is described in the following steps: 1. 2. Power up with the bias conditions shown in Figure 4-1. Drive TEST2 input from VSS to VDD to enter the Programming mode. TEST2 should remain at VDD through Step 8 described below. Apply a clock pulse to the TEST input to enter in T1 mode. This initiates the calibration mode for Normal Limits setting. The Integrator output saw tooth should appear at GLED and the smoke detection level at RLED. Clock FEED to increase the smoke detection level as needed. Once the desired smoke threshold is reached, the IO input is pulsed low to high to enter the result. See typical waveforms in Figure 4-4. Operating the circuit in this manner, with nearly continuous IRED current for an extended period of time, may result in undesired or excessive heating of the part. The duration of this step should be minimized. Apply a second clock pulse to the TEST input to enter in T2 mode. This initiates the calibration mode for Hysteresis Limits. Clock FEED as in Step 3 and apply pulse to IO, once desired level is reached.Operating the circuit in this manner, with nearly continuous IRED current for an extended period of time, may result in undesired or excessive heating of the part. The duration of this step should be minimized. 7. Apply a clock pulse to the TEST input again to enter in T3 mode and initiate calibration for Hush Limits. Clock FEED as in the steps above and apply a pulse to IO, once the desired level is reached. Operating the circuit in this manner, with nearly continuous IRED current for an extended period of time, may result in undesired or excessive heating of the part. The duration of this step should be minimized. Apply a clock pulse to the TEST input a fourth time to enter in T4 mode, and initiate the calibration for Chamber Test Limits. Clock FEED and apply pulse to IO, once desired level is reached. Operating the circuit in this manner, with nearly continuous IRED current for an extended period of time, may result in undesired or excessive heating of the part. The duration of this step should be minimized. If the Long Term Drift Adjustment is enabled, after all limits have been set, the long term drift (LTD) baseline measurement must be made. To do this, a measurement must be made under no-smoke conditions. To enable the baseline measurement, pull TEST from VSS to VBST again and return to VSS. Once the chamber is clear, pulse FEED low to high to make the baseline measurement. After limits have been set and baseline LTD measurement has been made, pulse IO to store all results in memory. Before this step, no limits are stored in memory. 6. 3. 8. 4. DS22271A-page 22  2010 Microchip Technology Inc. RE46C190 VDD TEST2 VSS Min Tsetup2 = 2 µs VBST TEST VSS Min PW3 = 100 µs VBST FEED VSS Min Td2 = 10 µs VDD IO VSS Min PW1 = 10 µs Min T1 = 20 µs Min PW5 = 2 ms Min PW2 = 10 ms GLED … … … … IRED … … … … RLED HB FIGURE 4-4: Timing Diagram for Modes T1 to T5.  2010 Microchip Technology Inc. DS22271A-page 23 RE46C190 4.4 Serial Read/Write 5 bit Normal Limits (LSB first) As an alternative to the steps in Section 4.3 “Smoke Calibration”, if the system has been well characterized, the limits and baseline can be entered directly from a serial read/write calibration mode. To enter this mode, follow these steps: 1. 2. Set up the application as shown in Figure 4-1. Drive TEST2 input from VSS to VDD to enter in Programming mode. TEST2 should remain at VDD until all data has been entered. Clock the TEST input to mode T6 (High = VBST, Low = VSS, 6 clocks). This enables the serial read/write mode. TEST now acts as a data input (High = VDD, Low = VSS). FEED acts as the clock input (High = VBST, Low = VSS). Clock in the limits, LTD baseline, functional and parametric options. The data sequence should be as follows: LTD sample (LSB first) Chamber Test Limits (LSB first) Hush Limits (LSB first) Hysteresis Limits (LSB first), Then, the data sequence follows the pattern described in Register 4-1: 2 bit 2 bit 2 bit 3 bit 1 bit 1 bit 1 bit 1 bit 1 bit 5. Photo Amp Gain Factor Integration Time IRED current Low Battery Trip Point Long Term Drift Enable Hush Option Low Battery Hush Enable EOL enable Tone Select 3. 4. A serial data output is available at HB. After all 39 bits have been entered, pulse IO to store into the EEPROM memory. 5 bit 5 bit 5 bit 5 bit VDD TEST2 VSS VBST TEST VSS VSS D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 … D39 Min Tsetup2 = 2 µs VBST FEED VSS Min PW3 = 100 µs Min T2 = 120 µs … Min Tsetup1 = 1 µs VDD IO VSS Min Thold1 = 1 µs Min PW1 = 10 µs Min T1 = 20 µs … Min PW2 = 10 ms FIGURE 4-5: Timing Diagram for Mode T6. DS22271A-page 24  2010 Microchip Technology Inc. RE46C190 4.5 Limits Verification After all limits and LTD baseline have been entered and stored into the memory, additional test modes are available to verify if the limits are functioning as expected. Table 4-4 describes several verification tests. TABLE 4-4: Limit Normal Limits LIMITS VERIFICATION DESCRIPTION Test Description Clock TEST to Mode T7 (7 clocks). With appropriate smoke level in chamber, pull FEED to VDD and hold for at least 1 ms. The HB output will indicate the detection status (High = smoke detected). Clock TEST to Mode T8 (8 clocks). Pulse FEED and monitor HB as in Normal Limits case. Clock TEST to Mode T9 (9 clocks). Pulse FEED and monitor HB. Clock TEST to Mode T10 (10 clocks). Pulse FEED and monitor HB. Hysteresis Limits Hush Limits Chamber Test Limits V DD TEST2 V SS V BST TEST V SS Min Tsetup2 = 2 µs Vbst FEED V SS Min PW3 = 100 µs Min T2 = 120 µs Min Td2 = 10 µs V DD IO V SS Min PW5 = 2 ms GLED … … … IRED … … … RLED HB FIGURE 4-6: Timing Diagram for Modes T7-T10.  2010 Microchip Technology Inc. DS22271A-page 25 RE46C190 4.6 Horn Test The last test mode allows the horn to be enabled indefinitely for audibility testing. To enter this mode, clock TEST to Mode T11 (11 clocks). The IO pin is configured as horn enable. V DD TEST2 V SS V BST TEST V SS Min Tsetup2 = 2 µs V DD IO V SS Min PW3 = 100 µs Min T2 = 120 µs Horn Enabled FIGURE 4-7: Timing Diagram for Mode T11. DS22271A-page 26  2010 Microchip Technology Inc. RE46C190 5.0 5.1 APPLICATION NOTES Standby Current Calculation and Battery Life A calculation of the standby current for the battery life is shown in Table 5-1, based on the following parameters: VBAT VBST1 VBST2 Boost capacitor size Boost Efficiency IRED on time IRED Current = = = = = = = 3 3.6 9 4.70E-06 8.50E-01 2.000E-04 1.000E-01 The supply current shown in the DC Electrical Characteristics table is only one component of the average standby current and, in most cases, can be a small fraction of the total, because power consumption generally occurs in relatively infrequent bursts and depends on many external factors. These include the values selected for IRED current and integration time, the VBST and IR capacitor sizes and leakages, the VBAT level, and the magnitude of any external resistances that will adversely affect the boost converter efficiency. TABLE 5-1: STANDBY CURRENT CALCULATION Voltage (V) 3 3.6 3.6 3.6 3.6 IDD Component Fixed IDD Current (A) 1.00E-06 1.00E-03 0.10 1.00E-03 0.10 Duration (s) — 1.00E-02 2.00E-04 1.00E-02 2.00E-04 Energy (J) — 3.60E-05 7.20E-05 3.60E-05 7.20E-05 Period (s) — 43 43 10.75 10.75 Average Power (W) 3.00E-06 9.85E-07 1.97E-06 3.94E-06 7.88E-06 IBAT Contribution (A) 1.00E-06 3.28E-07 6.57E-07 1.31E-06 2.63E-06 IBAT (µA) 1.0 0.3 0.7 1.3 2.6 Photo Detection Current Chamber test (excluding IR drive) IR drive during Chamber Test Smoke Detection (excluding IR drive) IR drive during Smoke Detection Loaded Test Load Boost Unloaded Test Load 3.6 1.00E-04 1.00E-02 3.60E-06 43 9.85E-08 3.28E-08 8.09E-06 0.0 8.1 9 VBST1 to VBST2 2.00E-02 — 1.00E-02 — 1.80E-03 6.85E-05 344 344 6.16E-06 2.34E-07 2.05E-06 7.81E-08 2.1 0.1 Low Battery Check Current Total The following paragraphs explain the components in Table 5-1, and the calculations in the example. 5.1.1 FIXED IDD The IDD is the Supply Current shown in the DC Electrical Characteristics table. 5.1.2 PHOTO DETECTION CURRENT Photo Detection Current is the current draw due to the smoke testing every 10.75 seconds, and the chamber test every 43 seconds. The current for both the IR diode and the internal measurement circuitry comes primarily from VBST, so the average current must be scaled for both on-time and boost voltage. The contribution to IBAT is determined by first calculating the energy consumed by each component, given its duration. An average power is then calculated based on the period of the event and the boost converter efficiency (assumed to be 85% in this case). An IBAT contribution is then calculated based on this average power and the given VBAT. For example, the IR drive contribution during chamber test is detailed in Equation 5-1: EQUATION 5-1: 3.6V  0.1A  200  s -------------------------------------------------- = 0.657  A 43s  0.85  3V  2010 Microchip Technology Inc. DS22271A-page 27 RE46C190 5.1.3 LOW BATTERY CHECK CURRENT The Low Battery Check Current is the current required for the low battery test. It includes both the loaded (RLED on) and unloaded (RLED Off) tests. The boost component of the loaded test represents the cost of charging the boost capacitor to the higher voltage level. This has a fixed cost for every loaded check, because the capacitor is gradually discharged during subsequent operations, and the energy is generally not recovered. The other calculations are similar to those shown in Equation 5-1. The unloaded test has a minimal contribution because it involves only some internal reference and comparator circuitry. 5.1.4 BATTERY LIFE When estimating the battery life, several additional factors must be considered. These include battery resistance, battery self discharge rate, capacitor leakages and the effect of the operating temperature on all of these characteristics. Some number of false alarms and user tests should also be included in any calculation. For ten year applications, a 3V spiral wound lithium manganese dioxide battery with a laser seal is recommended. These can be found with capacities of 1400 to 1600 mAh. DS22271A-page 28  2010 Microchip Technology Inc. RE46C190 5.1.5 FUNCTIONAL TIMING DIAGRAMS Standby, No Alarm (not to Scale) TI RON TPER0 IRED Chamber Test (Internal Signal) TPCT1 Low Battery Test (Internal signal) TPLB2 TON1 RLED TPLB1 LTD Sample TLT D EOL TEO L Low Supply Test Failure Low Battery Test (Internal signal) RLED TH ON1 HORN THPER1 Chamber Test Failure Chamber Test (Internal Signal) THO N2 HORN THO F2 THPER2 FIGURE 5-1: RE46C190 Timing Diagram – Standby, No Alarm, Low Supply Test Failure and Chamber Test Failure.  2010 Microchip Technology Inc. DS22271A-page 29 RE46C190 Local Alarm with Temporal Horn Pattern (not to Scale) No Alarm Local Alarm TI RON IRED TPER3A TON1 RLED TPLED2A THO N2A THOF2A THOF3A HORN TIODLY1 IO as Output Local Alarm with International Horn Pattern (not to Scale) No Alarm Local Alarm TIRO N IRED TPER3B TON1 RLED TPLED2B THO N2B THO F2B HORN TIODLY1 IO as Output Interconnect as Input with Temporal Horn pattern (not to Scale) TIO FILT IO as Input TIO DLYA HORN Interconnect as Input with International Horn Pattern (not to Scale) TIO FILT IO as Input TIO DLYB FIGURE 5-2: RE46C190 Timing Diagram – Local Alarm with Temporal Horn Pattern, Local Alarm with International Horn Pattern, Interconnect as Input with Temporal Horn Pattern and Interconnect as Input with International Horn Pattern. DS22271A-page 30  2010 Microchip Technology Inc. RE46C190 Alarm Memory (not to Scale) Alarm Memory Alarm, No Low Battery Alarm Memory; No Alarm; No Low Battery Alarm Memory After 24 Hour Timer Indication RLED TPLED1 TON1 T PLED2 TPLED1 GLED TON1 T OFLED T PLED1 TLALED THON4 HB THPER4 TEST Hush Timer (not to Scale) Alarm, No Low Battery Timer Mode; No Alarm; No Low Battery Standby, No Alarm RLED TPLED4 TON1 T PLED2 TTPER TPLED1 HB TEST FIGURE 5-3: RE46C190 Timing Diagram – Alarm Memory and Hush Timer.  2010 Microchip Technology Inc. DS22271A-page 31 RE46C190 NOTES: DS22271A-page 32  2010 Microchip Technology Inc. RE46C190 6.0 6.1 PACKAGING INFORMATION Package Marking Information 16-Lead SOIC (.150”) XXXXXXXXXXXXX XXXXXXXXXXXXX YYWWNNN Example RE46C190 V/SL e3 1035256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2010 Microchip Technology Inc. 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