16Mb: 3V Embedded Parallel NOR Flash
Features
Parallel NOR Flash Embedded Memory
M29W160ET, M29W160EB
Features
• Common Flash interface
– 64-bit security code
• Low power consumption: Standby and automatic
mode
• 100,000 PROGRAM/ERASE cycles per block
• Electronic signature
– Manufacturer code: 0020h
– Top device code M29W160ET: 22C4h
– Bottom device code M29W160EB: 2249h
• Packages
– 48-pin TSOP (N) 12mm x 20mm
– 48-ball TFBGA (ZA) 6mm x 8mm
– 64-ball FBGA (ZS) 11mm x 13mm
• Automotive grade parts available
• Supply voltage
– VCC = 2.7–3.6V (program, erase, read)
• Access times
– 70, 90ns
• Program time
– 10µs per byte/word (TYP)
• Memory organization
– 3 parameter and 31 main blocks
– 1 boot block (top or bottom location)
• Program/erase controller
– Embedded byte/word program algorithms
• Erase suspend and resume capability
– Read or program another block during an ERASE
SUSPEND operation
• UNLOCK BYPASS PROGRAM COMMAND
– Fast buffered/batch programming
• Temporary block unprotect mode
PDF: 09005aef84e1488c
m29W_160e.pdf - Rev. C 02/18 EN
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
16Mb: 3V Embedded Parallel NOR Flash
Features
Part Numbering Information
Devices are shipped from the factory with memory content bits erased to 1. For available options, such as packages or speed, or for further information, contact your Micron sales representative. Part numbers can be verified at
www.micron.com. Feature and specification comparison by device type is available at www.micron.com/products.
Contact the factory for devices not found.
Table 1: Part Number Information
Part Number
Category
Category Details
Device Type
M29 = Parallel Flash memory
Operating Voltage
W = 2.7 to 3.6V
Device function
160E = 16Mb memory array
Configuration
T = Top boot
B = Bottom boot
Speed
7A = 70ns
Package
Notes
1
70 = 70 ns
2
80 = 80ns
3
90 = 90ns
4
N = 48-pin TSOP, 12mm x 20mm
ZA = 48-ball TFBGA, 6mm x 8mm, 0.80mm pitch
ZS = 64-ball Fortified BGA, 11mm x 13mm, 1mm pitch
Temperature Range
6 = –40° to 85°C
3 = –40°C to 125°C
Voltage Extension
Blank = Standard option
S = VCC,min extension to 2.5V of VCC and available only with 80ns speed class option
Shipping Options
Blank = Standard packing
T = Tape and reel packing
E = RoHS-compliant package, standard packing
F = RoHS-compliant package, tape and reel packing
Notes:
1. Device speed in conjunction with temperature range = 6 to denote automotive grade (–40° to 85°C) parts.
2. Device speed in conjunction with temperature range = 6 to denote industrial grade (–40° to 85°C) parts, or
in conjunction with temperature range = 3 to denote automotive grade (–40° to 125°C) parts.
3. Access time, automotive device, in conjunction with temperature range = 3 and voltage extension = S.
4. Device speed in conjunction with temperature range = 6 to denote industrial grade (–40° to 85°C) parts.
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m29W_160e.pdf - Rev. C 02/18 EN
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16Mb: 3V Embedded Parallel NOR Flash
Features
Contents
Important Notes and Warnings ......................................................................................................................... 7
General Description ......................................................................................................................................... 8
Signal Assignments ......................................................................................................................................... 10
Signal Descriptions ......................................................................................................................................... 13
Memory Organization .................................................................................................................................... 15
Memory Configuration ............................................................................................................................... 15
Memory Map, x8 – 16Mb Density ................................................................................................................ 15
Memory Map, x16 – 16Mb Density .............................................................................................................. 16
Bus Operations ............................................................................................................................................... 17
Read .......................................................................................................................................................... 17
Write .......................................................................................................................................................... 17
Standby and Automatic Standby ................................................................................................................. 17
Output Disable ........................................................................................................................................... 17
Commands .................................................................................................................................................... 18
READ Operations ........................................................................................................................................... 19
READ/RESET Command ............................................................................................................................ 19
READ CFI Command .................................................................................................................................. 19
AUTO SELECT Operations .............................................................................................................................. 20
AUTO SELECT Command ........................................................................................................................... 20
Read Device ID ............................................................................................................................................... 20
Block and Chip Protection .............................................................................................................................. 21
BLOCK PROTECT Command ...................................................................................................................... 21
Block Protection Using Programmer Equipment .......................................................................................... 22
In-System Block Protection ......................................................................................................................... 24
BYPASS Operations ......................................................................................................................................... 26
UNLOCK BYPASS Command ...................................................................................................................... 26
UNLOCK BYPASS RESET Command ............................................................................................................ 26
PROGRAM Operations .................................................................................................................................... 26
PROGRAM Command ................................................................................................................................ 26
UNLOCK BYPASS PROGRAM Command ..................................................................................................... 26
ERASE Operations .......................................................................................................................................... 27
CHIP ERASE Command .............................................................................................................................. 27
BLOCK ERASE Command ........................................................................................................................... 27
ERASE SUSPEND Command ....................................................................................................................... 28
ERASE RESUME Command ........................................................................................................................ 28
Status Register ................................................................................................................................................ 29
Data Polling Bit (DQ7) ................................................................................................................................ 29
Toggle Bit (DQ6) ......................................................................................................................................... 29
Error Bit (DQ5) ........................................................................................................................................... 29
Erase Timer Bit (DQ3) ................................................................................................................................. 30
Alternative Toggle Bit (DQ2) ........................................................................................................................ 30
Absolute Ratings and Operating Conditions ..................................................................................................... 33
DC Characteristics .......................................................................................................................................... 35
Read AC Characteristics .................................................................................................................................. 36
Write AC Characteristics ................................................................................................................................. 38
Program/Erase Characteristics ........................................................................................................................ 42
Reset Characteristics ...................................................................................................................................... 43
Package Dimensions ....................................................................................................................................... 44
Revision History ............................................................................................................................................. 47
Rev. C – 2/18 ............................................................................................................................................... 47
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m29W_160e.pdf - Rev. C 02/18 EN
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16Mb: 3V Embedded Parallel NOR Flash
Features
Rev. B – 06/13 ............................................................................................................................................. 47
Rev. A – 07/12 ............................................................................................................................................. 47
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m29W_160e.pdf - Rev. C 02/18 EN
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16Mb: 3V Embedded Parallel NOR Flash
Features
List of Figures
Figure 1: Logic Diagram ................................................................................................................................... 9
Figure 2: 48-Pin TSOP 160ET/B ...................................................................................................................... 10
Figure 3: 48-Ball TFBGA 160ET/B ................................................................................................................... 11
Figure 4: 64-Ball FBGA 160ET/B ..................................................................................................................... 12
Figure 5: Block Protect Flowchart – Programmer Equipment ........................................................................... 22
Figure 6: Chip Unprotect Flowchart – Programmer Equipment ....................................................................... 23
Figure 7: Block Protect Flowchart – In-System Equipment ............................................................................... 24
Figure 8: Chip Protection Flowchart – In-System Equipment ........................................................................... 25
Figure 9: Data Polling Flowchart .................................................................................................................... 31
Figure 10: Data Toggle Flowchart ................................................................................................................... 32
Figure 11: AC Measurement Load Circuit ....................................................................................................... 34
Figure 12: AC Measurement I/O Waveform ..................................................................................................... 34
Figure 13: Random AC Timing ....................................................................................................................... 37
Figure 14: WE#-Controlled AC Timing ............................................................................................................ 39
Figure 15: CE#-Controlled AC Timing ............................................................................................................. 41
Figure 16: Reset/Block Temporary Unprotect AC Waveforms ........................................................................... 43
Figure 17: 48-Pin TSOP – 12mm x 20mm ........................................................................................................ 44
Figure 18: 48-Ball TFBGA – 6mm x 8mm ......................................................................................................... 45
Figure 19: 64-Ball FBGA – 11mm x 13mm ....................................................................................................... 46
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16Mb: 3V Embedded Parallel NOR Flash
Features
List of Tables
Table 1: Part Number Information ................................................................................................................... 2
Table 2: Signal Names ...................................................................................................................................... 9
Table 3: Signal Descriptions ........................................................................................................................... 13
Table 4: x8 Top Boot, Blocks [34:0] .................................................................................................................. 15
Table 5: x8 Bottom Boot, Blocks [34:0] ............................................................................................................ 15
Table 6: x16 Top Boot, Blocks [34:0] ................................................................................................................ 16
Table 7: x16 Bottom Boot, Blocks [34:0] .......................................................................................................... 16
Table 8: Bus Operations ................................................................................................................................. 17
Table 9: Commands – 16-Bit Mode (BYTE# = V IL) ............................................................................................ 18
Table 10: Commands – 8-Bit Mode (BYTE# = V IL) ............................................................................................ 18
Table 11: Read Electronic Signature ............................................................................................................... 20
Table 12: Block and Chip Protection Signal Settings ........................................................................................ 21
Table 13: Status Register Bits .......................................................................................................................... 30
Table 14: Absolute Maximum/Minimum Ratings ............................................................................................ 33
Table 15: Operating Conditions ...................................................................................................................... 33
Table 16: Input/Output Capacitance .............................................................................................................. 34
Table 17: DC Current Characteristics .............................................................................................................. 35
Table 18: DC Voltage Characteristics .............................................................................................................. 35
Table 19: Read AC Characteristics .................................................................................................................. 36
Table 20: WE#-Controlled Write AC Characteristics ......................................................................................... 38
Table 21: CE#-Controlled Write AC Characteristics ......................................................................................... 40
Table 22: Program/Erase Times and Endurance Cycles ................................................................................... 42
Table 23: Reset/Block Temporary Unprotect AC Characteristics ...................................................................... 43
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m29W_160e.pdf - Rev. C 02/18 EN
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16Mb: 3V Embedded Parallel NOR Flash
Important Notes and Warnings
Important Notes and Warnings
Micron Technology, Inc. ("Micron") reserves the right to make changes to information published in this document,
including without limitation specifications and product descriptions. This document supersedes and replaces all
information supplied prior to the publication hereof. You may not rely on any information set forth in this document if you obtain the product described herein from any unauthorized distributor or other source not authorized
by Micron.
Automotive Applications. Products are not designed or intended for use in automotive applications unless specifically designated by Micron as automotive-grade by their respective data sheets. Distributor and customer/distributor shall assume the sole risk and liability for and shall indemnify and hold Micron harmless against all claims,
costs, damages, and expenses and reasonable attorneys' fees arising out of, directly or indirectly, any claim of
product liability, personal injury, death, or property damage resulting directly or indirectly from any use of nonautomotive-grade products in automotive applications. Customer/distributor shall ensure that the terms and conditions of sale between customer/distributor and any customer of distributor/customer (1) state that Micron
products are not designed or intended for use in automotive applications unless specifically designated by Micron
as automotive-grade by their respective data sheets and (2) require such customer of distributor/customer to indemnify and hold Micron harmless against all claims, costs, damages, and expenses and reasonable attorneys'
fees arising out of, directly or indirectly, any claim of product liability, personal injury, death, or property damage
resulting from any use of non-automotive-grade products in automotive applications.
Critical Applications. Products are not authorized for use in applications in which failure of the Micron component could result, directly or indirectly in death, personal injury, or severe property or environmental damage
("Critical Applications"). Customer must protect against death, personal injury, and severe property and environmental damage by incorporating safety design measures into customer's applications to ensure that failure of the
Micron component will not result in such harms. Should customer or distributor purchase, use, or sell any Micron
component for any critical application, customer and distributor shall indemnify and hold harmless Micron and
its subsidiaries, subcontractors, and affiliates and the directors, officers, and employees of each against all claims,
costs, damages, and expenses and reasonable attorneys' fees arising out of, directly or indirectly, any claim of
product liability, personal injury, or death arising in any way out of such critical application, whether or not Micron or its subsidiaries, subcontractors, or affiliates were negligent in the design, manufacture, or warning of the
Micron product.
Customer Responsibility. Customers are responsible for the design, manufacture, and operation of their systems,
applications, and products using Micron products. ALL SEMICONDUCTOR PRODUCTS HAVE INHERENT FAILURE RATES AND LIMITED USEFUL LIVES. IT IS THE CUSTOMER'S SOLE RESPONSIBILITY TO DETERMINE
WHETHER THE MICRON PRODUCT IS SUITABLE AND FIT FOR THE CUSTOMER'S SYSTEM, APPLICATION, OR
PRODUCT. Customers must ensure that adequate design, manufacturing, and operating safeguards are included
in customer's applications and products to eliminate the risk that personal injury, death, or severe property or environmental damages will result from failure of any semiconductor component.
Limited Warranty. In no event shall Micron be liable for any indirect, incidental, punitive, special or consequential
damages (including without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such damages are based on tort, warranty,
breach of contract or other legal theory, unless explicitly stated in a written agreement executed by Micron's duly
authorized representative.
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16Mb: 3V Embedded Parallel NOR Flash
General Description
General Description
The M29W160ET/B (2Mb x8 or 1Mb x16) is a nonvolatile device that can be read, erased
and reprogrammed. These operations can be performed using a single low voltage (2.7–
3.6V) supply. On power-up the memory defaults to read mode where it can be read in
the same way as a ROM or EPROM.
The device is divided into blocks that can be erased independently to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental PROGRAM or ERASE commands from modifying the memory. PROGRAM and
ERASE commands are written to the command interface of the memory. An on-chip
program/erase controller simplifies the process of programming or erasing the memory
by taking care of all of the special operations that are required to update the memory
contents.
The end of a PROGRAM or ERASE operation can be detected and any error conditions
identified. The command set required to control the memory is consistent with JEDEC
standards.
The blocks in the memory are asymmetrically arranged. The first or last 64KB have been
divided into four additional blocks. The 16KB boot block can be used for a small initialization code to start the microprocessor, the two 8 KB parameter blocks can be used for
parameter storage, and the remaining 32KB is a small main block where the application
may be stored.
CE#, OE#, and WE# signals control the bus operation. They enable simple connection to
most microprocessors, often without additional logic.
The device supplied with all the bits erased (set to 1).
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16Mb: 3V Embedded Parallel NOR Flash
General Description
Figure 1: Logic Diagram
VCC
15
20
A[19:0]
DQ[14:0]
DQ15/A-1
WE#
CE#
OE#
RY/BY#
RST#
BYTE#
VSS
Table 2: Signal Names
Name
Description
Type
A[19:0]
Address inputs
Input
CE#
Chip enable
Input
OE#
Output enable
Input
WE#
Write enable
Input
Byte/word organization select
Input
Reset/block temporary unprotect
Input
BYTE#
RST#
DQ[7:0]
Data I/O
I/O
DQ[14:8]
Data I/O
I/O
DQ15/A-1
Data I/O or address input
I/O
RY/BY#
Ready/busy output
Output
VCC
Core power supply
Supply
VSS
Ground
Supply
NC
Not connected internally
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–
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16Mb: 3V Embedded Parallel NOR Flash
Signal Assignments
Signal Assignments
Figure 2: 48-Pin TSOP 160ET/B
A15
A14
A13
A12
A11
A10
A9
A8
A19
RFU
WE#
RST#
RFU
RFU
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Note:
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48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE#
VSS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
VSS
CE#
A0
1. RFU = reserved for future use.
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16Mb: 3V Embedded Parallel NOR Flash
Signal Assignments
Figure 3: 48-Ball TFBGA 160ET/B
1
2
3
4
5
6
6
5
4
3
2
1
A
A
A3
A7 RY/BY# WE#
A9
A13
A13
A9
WE# RY/BY# A7
A3
B
B
A4
A17
RFU
RST#
A8
A12
A12
A8
RST#
RFU
A17
A4
C
C
A2
A6
A18
RFU
A10
A14
A14
A10
RFU
A18
A6
A2
D
D
A1
A5
RFU
A19
A11
A15
A15
A11
A19
RFU
A5
A1
E
E
A0
D0
D2
D5
D7
A16
A16
D7
D5
D2
D0
A0
F
F
CE#
D8
D10
D12
D14 BYTE#
BYTE# D14
D12
D10
D8
CE#
G
G
OE#
D9
D11
VCC
D13 D15/A-1
D15/A-1 D13
VCC
D11
D9
OE#
H
H
VSS
D1
D3
D4
D6
VSS
VSS
Top view – ball side down
Note:
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D6
D4
D3
D1
VSS
Bottom view – ball side up
1. RFU = reserved for future use.
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16Mb: 3V Embedded Parallel NOR Flash
Signal Assignments
Figure 4: 64-Ball FBGA 160ET/B
1
2
3
4
5
6
7
8
8
7
6
5
4
3
2
1
A
A
RFU
A3
A7 RY/BY# WE#
A9
A13
RFU
RFU
A13
A9
WE# RY/BY# A7
A3
RFU
B
B
RFU
A4
A17 VPP/WP# RST#
A8
A12
RFU
RFU
A12
A8
RST# VPP/WP# A17
A4
RFU
C
C
RFU
A2
A6
A18
RFU
A10
A14
RFU
RFU
A14
A10
RFU
A18
A6
A2
RFU
D
D
RFU
A1
A5
RFU
A19
A11
A15
VCC
VCC
A15
A11
A19
RFU
A5
A1
RFU
E
E
RFU
A0
D0
D2
D5
D7
A16
VSS
VSS
A16
D7
D5
D2
D0
A0
RFU
F
F
VCC
CE#
D8
D10
D12
D14 BYTE# RFU
RFU BYTE# D14
D12
D10
D8
CE#
VCC
G
G
RFU
OE#
D9
D11
VCC
D13 D15/A-1 RFU
RFU D15/A-1 D13
VCC
D11
D9
OE#
RFU
H
H
RFU
VSS
D1
D3
D4
D6
VSS
RFU
RFU
Top view – ball side down
Note:
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VSS
D6
D4
D3
D1
VSS
RFU
Bottom view – ball side up
1. RFU = reserved for future use.
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16Mb: 3V Embedded Parallel NOR Flash
Signal Descriptions
Signal Descriptions
The table below is a comprehensive list of signals for this device family. All signals listed
may not be supported on this device. See Signal Assignments for information specific to
this device.
Table 3: Signal Descriptions
Name
Type
Description
A[MAX:0]
Input
Address: Selects the cells in the memory array to access during READ operations. During
WRITE operations, controls the commands sent to the command interface of the program/
erase controller.
CE#
Input
Chip enable: Activates the memory, enabling READ and WRITE operations. When CE# is
HIGH, all other pins are ignored.
OE#
Input
Output enable: Controls the bus READ operation of the memory.
WE#
Input
Write enable: Controls the bus WRITE operation of the command interface.
BYTE#
Input
Byte/word organization select: Switches between x8 and x16 bus modes. When BYTE# is
LOW, the device is in x8 mode; when HIGH, the device is in x16 mode.
RST#
Input
Reset/block temporary unprotect: Applies a hardware reset to the memory or temporarily
removes protection from all blocks that have been protected. A hardware reset is achieved
by holding RST# LOW for at least tPLPX. When RST# goes HIGH, the memory is ready for
READ and WRITE operations after tPHEL or tRHEL, whichever occurs last.
Holding RST# at VID temporarily unprotects the protected blocks so that PROGRAM and
ERASE operations are possible on all blocks. The transition from HIGH to VID must be slower
than tPHPHH.
DQ[7:0]
I/O
Data I/O: Outputs the data stored at the selected address during READ operations. During
WRITE operations, represents the commands sent to the command interface of the program/
erase controller.
DQ[14:8]
I/O
Data I/O: Outputs data stored at the selected address during a READ operation when BYTE#
is HIGH. When BYTE# is LOW, these pins are not used and are High-Z. During a WRITE operation, the command register does not use these bits. When reading the status register, these
bits should be ignored.
DQ15/A-1
I/O
Data I/O or address input: When BYTE# is HIGH, this pin behaves as a data I/O pin,
DQ[14:8]. When BYTE# is LOW, this pin behaves as an address pin; DQ15/A-1 LOW selects the
LSB of the word on the other addresses, DQ15/A-1 HIGH selects the MSB. Throughout the
text, consider references to data I/O to include this pin when BYTE# is HIGH and consider references to address inputs to include this pin when BYTE# is LOW, except when stated explicitly otherwise.
RY/BY#
Output
Ready/busy: Open-drain output that can be used to identify when the device can be read.
RY/BY# is High-Z during read, auto select, and erase suspend modes. After a hardware reset,
a READ or WRITE operation cannot begin until RY/BY# becomes High-Z.
During a PROGRAM or ERASE operation, RY/BY# is LOW and remains LOW during READ/
RESET commands or hardware resets until the memory is ready to enter read mode.
The use of an open-drain output enables the RY/BY# pins from several memory devices to be
connected to a single pull-up resistor. A LOW indicates that one or more of the devices is
busy.
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Signal Descriptions
Table 3: Signal Descriptions (Continued)
Name
Type
VCC
Supply
Supply voltage: Provides the power supply for device operations. The command interface is
disabled when VCC
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