MT16KTF1G64HZ-1G6E2

4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Features 1.35V DDR3L SDRAM SODIMM MT16KTF51264HZ – 4GB MT16KTF1G64HZ – 8GB Features Figure 1: 204-Pin SODIMM (MO-268 R/C-F, R/C-F3) • DDR3L functionality and operations supported as defined in the component data sheet • 204-pin, small outline dual in-line memory module (SODIMM) • Fast data transfer rates: PC3-14900, PC3-12800, or PC3-10600 • 4GB (512 Meg x 64), 8GB (1 Gig x 64) • VDD = 1.35V (1.283V–1.45V) • VDD = 1.5V (1.425–1.575V) • Backward compatible to V DD = 1.5V ±0.075V • VDDSPD = 3.0–3.6V • Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals • Dual rank • Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS) • On-board I2C serial presence-detect (SPD) EEPROM • Selectable BC4 or BL8 on-the-fly (OTF) • Gold edge contacts • Halogen-free • Fly-by topology • Terminated control, command, and address bus Module height: 30mm (1.181in) Options Marking • Operating temperature – Commercial (0°C ≤ T A ≤ +70°C) • Package – 204-pin DIMM (halogen-free) • Frequency/CAS latency – 1.07ns @ CL = 13 (DDR3-1866) – 1.25ns @ CL = 11 (DDR3-1600) – 1.5ns @ CL = 9 (DDR3-1333) None Z -1G9 -1G6 -1G4 Table 1: Key Timing Parameters Data Rate (MT/s) Speed Industry Grade Nomenclature CL = 13 CL = 11 CL = 10 tRCD tRP tRC CL = 9 CL = 8 CL = 7 CL = 6 CL = 5 (ns) (ns) (ns) -1G9 PC3-14900 1866 1600 1333 1333 1066 1066 800 667 13.125 13.125 47.125 -1G6 PC3-12800 – 1600 1333 1333 1066 1066 800 667 13.125 13.125 48.125 -1G4 PC3-10600 – – 1333 1333 1066 1066 800 667 13.125 13.125 49.125 -1G1 PC3-8500 – – – – 1066 1066 800 667 13.125 13.125 50.625 -1G0 PC3-8500 – – – – 1066 – 800 667 15 15 52.5 -80B PC3-6400 – – – – – – 800 667 15 15 52.5 PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 1 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Features Table 2: Addressing Parameter Refresh count Row address 4GB 8GB 8K 8K 32K A[14:0] 64K A[15:0] Device bank address 8 BA[2:0] 8 BA[2:0] Device configuration 2Gb (256 Meg x 8) 4Gb (512 Meg x8) Column address 1K A[9:0] 1K A[9:0] Module rank address 2 S#[1:0] 2 S#[1:0] Table 3: Part Numbers and Timing Parameters – 4GB Modules Base device: MT41K256M8,1 2Gb 1.35V DDR3L SDRAM Module Part Number2 Density Configuration Module Bandwidth Memory Clock/ Data Rate Clock Cycles (CL-tRCD-tRP) MT16KTF51264HZ-1G6__ 4GB 512 Meg x 64 12.8 GB/s 1.25ns/1600 MT/s 11-11-11 MT16KTF51264HZ-1G4__ 4GB 512 Meg x 64 10.6 GB/s 1.5ns/1333 MT/s 9-9-9 Module Bandwidth Memory Clock/ Data Rate Clock Cycles (CL-tRCD-tRP) Table 4: Part Numbers and Timing Parameters – 8GB Modules Base device: MT41K512M8,1 4Gb 1.35V DDR3L SDRAM Module Part Number2 Density Configuration MT16KTF1G64HZ-1G9__ 8GB 1 Gig x 64 14.9 GB/s 1.07ns/1866 MT/s 13-13-13 MT16KTF1G64HZ-1G6__ 8GB 1 Gig x 64 12.8 GB/s 1.25ns/1600 MT/s 11-11-11 MT16KTF1G64HZ-1G4__ 8GB 1 Gig x 64 10.6 GB/s 1.5ns/1333 MT/s 9-9-9 Notes: 1. The data sheet for the base device can be found on Micron’s web site. 2. All part numbers end with a two-place code (not shown) that designates component and PCB revisions. Consult factory for current revision codes. Example: MT16KTF1G64HZ-1G9N1. PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 2 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Pin Assignments Pin Assignments Table 5: Pin Assignments 204-Pin DDR3 SODIMM Front 204-Pin DDR3 SODIMM Back Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol 1 VREFDQ 53 DQ19 105 VDD 157 DQ42 2 VSS 54 VSS 106 VDD 158 DQ46 3 VSS 55 VSS 107 A10 159 DQ43 4 DQ4 56 DQ28 108 BA1 160 DQ47 5 DQ0 57 DQ24 109 BA0 161 VSS 6 DQ5 58 DQ29 110 RAS# 162 VSS 7 DQ1 59 DQ25 111 VDD 163 DQ48 8 VSS 60 VSS 112 VDD 164 DQ52 9 VSS 61 VSS 113 WE# 165 DQ49 10 DQS0# 62 DQS3# 114 S0# 166 DQ53 11 DM0 63 DM3 115 CAS# 167 VSS 12 DQS0 64 DQS3 116 ODT0 168 VSS 13 VSS 65 VSS 117 VDD 169 DQS6# 14 VSS 66 VSS 118 VDD 170 DM6 15 DQ2 67 DQ26 119 A13 171 DQS6 16 DQ6 68 DQ30 120 ODT1 172 VSS 17 DQ3 69 DQ27 121 S1# 173 VSS 18 DQ7 70 DQ31 122 NC 174 DQ54 19 VSS 71 VSS 123 VDD 175 DQ50 20 VSS 72 VSS 124 VDD 176 DQ55 21 DQ8 73 CKE0 125 NC 177 DQ51 22 DQ12 74 CKE1 126 VREFCA 178 VSS 23 DQ9 75 VDD 127 VSS 179 VSS 24 DQ13 76 VDD 128 VSS 180 DQ60 25 VSS 77 NC 129 DQ32 181 DQ56 26 VSS 78 NC/A151 130 DQ36 182 DQ61 27 DQS1# 79 BA2 131 DQ33 183 DQ57 28 DM1 80 A14 132 DQ37 184 VSS 29 DQS1 81 VDD 133 VSS 185 VSS 30 RESET# 82 VDD 134 VSS 186 DQS7# DQS7 31 VSS 83 A12 135 DQS4# 187 DM7 32 VSS 84 A11 136 DM4 188 33 DQ10 85 A9 137 DQS4 189 VSS 34 DQ14 86 A7 138 VSS 190 VSS 35 DQ11 87 VDD 139 VSS 191 DQ58 36 DQ15 88 VDD 140 DQ38 192 DQ62 37 VSS 89 A8 141 DQ34 193 DQ59 38 VSS 90 A6 142 DQ39 194 DQ63 39 DQ16 91 A5 143 DQ35 195 VSS 40 DQ20 92 A4 144 VSS 196 VSS 41 DQ17 93 VDD 145 VSS 197 SA0 42 DQ21 94 VDD 146 DQ44 198 NF 43 VSS 95 A3 147 DQ40 199 VDDSPD 44 VSS 96 A2 148 DQ45 200 SDA 45 DQS2# 97 A1 149 DQ41 201 SA1 46 DM2 98 A0 150 VSS 202 SCL 47 DQS2 99 VDD 151 VSS 203 VTT 48 VSS 100 VDD 152 DQS5# 204 VTT 49 VSS 101 CK0 153 DM5 – – 50 DQ22 102 CK1 154 DQS5 – – 51 DQ18 103 CK0# 155 VSS – – 52 DQ23 104 CK1# 156 VSS – – Note: 1. Pin 78 is NC 4GB, A15 for 8GB. PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 3 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Pin Descriptions Pin Descriptions The pin description table below is a comprehensive list of all possible pins for all DDR3 modules. All pins listed may not be supported on this module. See Pin Assignments for information specific to this module. Table 6: Pin Descriptions Symbol Type Description Ax Input Address inputs: Provide the row address for ACTIVE commands, and the column address and auto precharge bit (A10) for READ/WRITE commands, to select one location out of the memory array in the respective bank. A10 sampled during a PRECHARGE command determines whether the PRECHARGE applies to one bank (A10 LOW, bank selected by BAx) or all banks (A10 HIGH). The address inputs also provide the op-code during a LOAD MODE command. See the Pin Assignments table for density-specific addressing information. BAx Input Bank address inputs: Define the device bank to which an ACTIVE, READ, WRITE, or PRECHARGE command is being applied. BA define which mode register (MR0, MR1, MR2, or MR3) is loaded during the LOAD MODE command. CKx, CKx# Input Clock: Differential clock inputs. All control, command, and address input signals are sampled on the crossing of the positive edge of CK and the negative edge of CK#. CKEx Input Clock enable: Enables (registered HIGH) and disables (registered LOW) internal circuitry and clocks on the DRAM. DMx Input Data mask (x8 devices only): DM is an input mask signal for write data. Input data is masked when DM is sampled HIGH, along with that input data, during a write access. Although DM pins are input-only, DM loading is designed to match that of the DQ and DQS pins. ODTx Input On-die termination: Enables (registered HIGH) and disables (registered LOW) termination resistance internal to the DDR3 SDRAM. When enabled in normal operation, ODT is only applied to the following pins: DQ, DQS, DQS#, DM, and CB. The ODT input will be ignored if disabled via the LOAD MODE command. Par_In Input Parity input: Parity bit for Ax, RAS#, CAS#, and WE#. RAS#, CAS#, WE# Input Command inputs: RAS#, CAS#, and WE# (along with S#) define the command being entered. RESET# Input (LVCMOS) Reset: RESET# is an active LOW asychronous input that is connected to each DRAM and the registering clock driver. After RESET# goes HIGH, the DRAM must be reinitialized as though a normal power-up was executed. Sx# Input Chip select: Enables (registered LOW) and disables (registered HIGH) the command decoder. SAx Input Serial address inputs: Used to configure the temperature sensor/SPD EEPROM address range on the I2C bus. SCL Input Serial clock for temperature sensor/SPD EEPROM: Used to synchronize communication to and from the temperature sensor/SPD EEPROM on the I2C bus. CBx I/O Check bits: Used for system error detection and correction. DQx I/O Data input/output: Bidirectional data bus. DQSx, DQSx# I/O Data strobe: Differential data strobes. Output with read data; edge-aligned with read data; input with write data; center-aligned with write data. PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 4 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Pin Descriptions Table 6: Pin Descriptions (Continued) Symbol Type SDA I/O Description Serial data: Used to transfer addresses and data into and out of the temperature sensor/SPD EEPROM on the I2C bus. TDQSx, TDQSx# Output Redundant data strobe (x8 devices only): TDQS is enabled/disabled via the LOAD MODE command to the extended mode register (EMR). When TDQS is enabled, DM is disabled and TDQS and TDQS# provide termination resistance; otherwise, TDQS# are no function. Err_Out# Output Parity error output: Parity error found on the command and address bus. (open drain) EVENT# Output Temperature event: The EVENT# pin is asserted by the temperature sensor when crit(open drain) ical temperature thresholds have been exceeded. VDD Supply Power supply: 1.35V (1.283–1.45V) backward-compatible to 1.5V (1.425–1.575V). The component VDD and VDDQ are connected to the module VDD. VDDSPD Supply Temperature sensor/SPD EEPROM power supply: 3.0–3.6V. VREFCA Supply Reference voltage: Control, command, and address VDD/2. VREFDQ Supply Reference voltage: DQ, DM VDD/2. VSS Supply Ground. VTT Supply Termination voltage: Used for control, command, and address VDD/2. NC – No connect: These pins are not connected on the module. NF – No function: These pins are connected within the module, but provide no functionality. PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 5 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM DQ Map DQ Map Table 7: Component-to-Module DQ Map, PCB 0900 R/C-F (Front) Component Reference Number Component DQ U1 U5 U7 U9 PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN Module DQ Module Pin Number Component Reference Number Component DQ Module DQ Module Pin Number 0 2 15 U2 0 18 51 1 5 6 1 21 42 2 3 17 2 19 53 3 0 5 3 16 39 4 6 16 4 22 50 5 4 4 5 20 40 6 7 18 6 23 52 7 1 7 7 17 41 0 42 157 0 58 191 1 45 148 1 61 182 2 43 159 2 59 193 3 40 147 3 56 181 4 46 158 4 62 192 5 44 146 5 60 180 6 47 160 6 63 194 7 41 149 7 57 183 0 13 24 0 26 67 1 10 33 1 29 58 2 8 21 2 27 69 3 11 35 3 24 57 4 9 23 4 30 68 5 15 36 5 28 56 6 12 22 6 31 70 7 14 34 7 25 59 0 34 141 0 53 166 1 37 132 1 50 175 2 35 143 2 48 163 3 32 129 3 51 177 4 38 140 4 49 165 5 36 130 5 55 176 6 39 142 6 52 164 7 33 131 7 54 174 U6 U8 U10 6 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM DQ Map Table 8: Component-to-Module DQ Map, PCB 0900 R/C-F (Back) Component Reference Number Component DQ U11 U15 U17 U19 PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN Module DQ Module Pin Number Component Reference Number Component DQ Module DQ Module Pin Number 0 61 182 U12 0 45 148 1 58 191 1 42 157 2 56 181 2 40 147 3 59 193 3 43 159 4 57 183 4 41 149 5 63 194 5 47 160 6 60 180 6 44 146 7 62 192 7 46 158 0 21 42 0 5 6 1 18 51 1 2 15 2 16 39 2 0 5 3 19 53 3 3 17 4 17 41 4 1 7 5 23 52 5 7 18 6 20 40 6 4 4 7 22 50 7 6 16 0 50 175 0 37 132 1 53 166 1 34 141 2 51 177 2 32 129 3 48 163 3 35 143 4 54 174 4 33 131 5 52 164 5 39 142 6 55 176 6 36 130 7 49 165 7 38 140 0 29 58 0 10 33 1 26 67 1 13 24 2 24 57 2 11 35 3 27 69 3 8 21 4 25 59 4 14 34 5 31 70 5 12 22 6 28 56 6 15 36 7 30 68 7 9 23 U16 U18 U20 7 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM DQ Map Table 9: Component-to-Module DQ Map, PCB 1569 R/C-F3 (Front) Component Reference Number Component DQ U2 U4 U6 U8 PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN Module DQ Module Pin Number Component Reference Number Component DQ Module DQ Module Pin Number 0 2 13 U3 0 18 49 1 5 6 1 21 42 2 3 15 2 19 51 3 0 5 3 16 37 4 6 16 4 22 48 5 4 4 5 20 40 6 7 18 6 23 50 7 17 39 0 58 191 7 1 7 0 42 159 1 45 150 1 61 182 2 43 161 2 59 193 3 40 151 3 56 183 4 46 160 4 62 192 5 44 148 5 60 180 6 47 162 6 63 194 7 41 153 7 57 185 0 13 24 0 26 63 1 10 31 1 29 56 2 8 19 2 27 65 3 11 33 3 24 55 4 9 21 4 30 66 5 15 36 5 28 54 6 12 22 6 31 68 7 14 34 7 25 57 0 34 145 0 53 168 1 37 136 1 50 177 2 35 147 2 48 165 3 32 133 3 51 179 4 38 142 4 49 167 5 36 134 5 55 176 6 39 144 6 52 166 7 33 135 7 54 174 U5 U7 U9 8 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM DQ Map Table 10: Component-to-Module DQ Map, PCB 1569 R/C-F (Back) Component Reference Number Component DQ U11 U13 U15 U17 PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN Module DQ Module Pin Number Component Reference Number Component DQ Module DQ Module Pin Number 0 61 182 U12 0 45 150 1 58 191 1 42 159 2 56 183 2 40 151 3 59 193 3 43 161 4 57 185 4 41 153 5 63 194 5 47 162 6 60 180 6 44 148 7 62 192 7 46 160 0 21 42 0 5 6 1 18 49 1 2 13 2 16 37 2 0 5 3 19 51 3 3 15 4 17 39 4 1 7 5 23 50 5 7 18 6 20 40 6 4 4 7 22 48 7 6 16 0 50 177 0 37 136 1 53 168 1 34 145 2 51 179 2 32 133 3 48 165 3 35 147 4 54 174 4 33 135 5 52 166 5 39 144 6 55 176 6 36 134 7 49 167 7 38 142 0 29 56 0 10 31 1 26 63 1 13 24 2 24 55 2 11 33 3 27 65 3 8 19 4 25 57 4 14 34 5 31 68 5 12 22 6 28 54 6 15 36 7 30 66 7 9 21 U14 U16 U18 9 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Functional Block Diagram Functional Block Diagram Figure 2: Functional Block Diagram (PCB 0900, R/C-F) S1# S0# DQS0# DQS0 DM0 DQS4# DQS4 DM4 DM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS1# DQS1 DM1 DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS DQS# DM CS# DQ DQ DQ DQ DQ DQ DQ DQ U1 DQ DM DQS# DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 U16 ZQ DQS5# DQS5 DM5 VSS DM DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS2# DQS2 DM2 CS# DQ DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS CS# DQ DQS# DM CS# DQ DQ DQ DQ DQ DQ DQ DQ U7 DQ DQS6# DQS6 DM6 DM VSS CS# DQ DQS# DM CS# DQ DQ DQ DQ DQ DQ DQ DQ U2 DQ DM DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS CS# DQ DQS# DM CS# DQ DQ DQ DQ DQ DQ DQ DQ U19 DQ CS# DQ DQS# U18 CS# DQ DQS# DM DQ DQ DQ DQ DQ DQ DQ DQ CS# DQ DQS# U5 ZQ VSS DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS ZQ DM DQ DQ DQ DQ DQ DQ DQ DQ U12 DM CS# DQ DQS# DM DQ DQ DQ DQ DQ DQ DQ DQ U17 CS# DQ DQS# U10 ZQ DQS7# DQS7 DM7 VSS DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 VSS DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQS3# DQS3 DM3 DQS# ZQ DQ DQ DQ DQ DQ DQ DQ DQ ZQ DQS# U15 DQ U9 DM U20 CS# VSS DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 ZQ DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS DQS# VSS DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS DM DQS# DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 U8 ZQ DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS VSS CS# DQ DQS# U11 DM DQ DQ DQ DQ DQ DQ DQ DQ CS# DQ DQS# U6 ZQ VSS Rank 0 = U1, U2, U7, U9, U11, U12, U17, U19 Rank 1 = U5, U6, U8, U10, U15, U16, U18, U20 BA[2:0] A[15/14:0] RAS# CAS# WE# CKE0 CKE1 ODT0 ODT1 RESET# BA[2:0]: DDR3 SDRAM A[15/14:0]: DDR3 SDRAM RAS#: DDR3 SDRAM CAS#: DDR3 SDRAM SCL WP A0 WE#: DDR3 SDRAM CKE0: Rank 0 CKE1: Rank 1 ODT0: Rank 0 ODT1: Rank 1 VDDSPD RESET#: DDR3 SDRAM DDR3 SDRAM VTT DDR3 SDRAM CK[1:0] CK#[1:0] Note: PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN A1 A2 SDA CK0 CK0# Rank 0 CK1 CK1# Rank 1 VSS SA0 SA1 VSS Command, address and clock line terminations CKE[1:0], A[15/14:0], RAS#, CAS#, WE#, S#[1:0], ODT[1:0], BA[2:0] U14 SPD EEPROM SPD EEPROM VDD DDR3 SDRAM VTT DDR3 SDRAM VREFCA DDR3 SDRAM VREFDQ DDR3 SDRAM VSS DDR3 SDRAM VDD 1. The ZQ ball on each DDR3 component is connected to an external 240Ω ±1% resistor that is tied to ground. It is used for the calibration of the component’s ODT and output driver. 10 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Functional Block Diagram Figure 3: Functional Block Diagram (PCB 1569, R/C-F3) S1# S0# DQS0# DQS0 DM0 DQS4# DQS4 DM4 DM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS DQS1# DQS1 DM1 DQS# DM DQ DQ DQ DQ DQ DQ DQ DQ U2 CS# DQ DM DQS# DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 U14 ZQ DQS5# DQS5 DM5 VSS DM DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS2# DQS2 DM2 CS# DQ DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS CS# DQ DQS# DM DQ DQ DQ DQ DQ DQ DQ DQ U6 CS# DQ DQS6# DQS6 DM6 DM VSS CS# DQ DQS# DM DQ DQ DQ DQ DQ DQ DQ DQ U3 CS# DQ DM DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS CS# DQ DQS# DM DQ DQ DQ DQ DQ DQ DQ DQ U17 CS# DQ CS# DQ DQS# U16 CS# DQ DQS# DM DQ DQ DQ DQ DQ DQ DQ DQ CS# DQ DQS# U4 ZQ VSS DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS ZQ DM DQ DQ DQ DQ DQ DQ DQ DQ U12 DM VSS DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 VSS DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQS3# DQS3 DM3 DQS# ZQ DQ DQ DQ DQ DQ DQ DQ DQ ZQ DQS# U13 DQ U8 DM U18 CS# VSS DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 ZQ DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS DQS# VSS DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ DQ DQ DQ DQ DQ DQ DQ ZQ CS# DQ DQS# DM CS# DQ DQ DQ DQ DQ DQ DQ DQ U15 DQ DQS# U9 ZQ VSS DQS7# DQS7 DM7 DM DQS# DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 U7 ZQ DQ DQ DQ DQ DQ DQ DQ DQ ZQ VSS VSS CS# DQ DQS# U11 DM DQ DQ DQ DQ DQ DQ DQ DQ CS# DQ DQS# U5 ZQ VSS Rank 0 = U2, U3, U6, U7, U8, U11, U12, U15 Rank 1 = U4, U5, U7, U19, U13, U14, U16, U18 BA[2:0] A[14:0] RAS# CAS# WE# CKE0 CKE1 ODT0 ODT1 RESET# BA[2:0]: DDR3 SDRAM A[14:0]: DDR3 SDRAM RAS#: DDR3 SDRAM CAS#: DDR3 SDRAM WE#: DDR3 SDRAM CKE0: Rank 0 CKE1: Rank 1 ODT0: Rank 0 ODT1: Rank 1 RESET#: DDR3 SDRAM SCL WP A0 CK[1:0] CK#[1:0] Note: PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN A1 A2 VSS SA0 SA1 VSS VDDSPD Command, address and clock line terminations CKE[1:0], A[14:0], RAS#, CAS#, WE#, ODT[1:0], BA[2:0] U10 SPD EEPROM DDR3 SDRAM VTT DDR3 SDRAM SDA CK0 CK0# Rank 0 CK1 CK1# Rank 1 SPD EEPROM VDD DDR3 SDRAM VTT DDR3 SDRAM VREFCA DDR3 SDRAM VREFDQ DDR3 SDRAM VSS DDR3 SDRAM VDD 1. The ZQ ball on each DDR3 component is connected to an external 240Ω ±1% resistor that is tied to ground. It is used for the calibration of the component’s ODT and output driver. 11 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM General Description General Description DDR3 SDRAM modules are high-speed, CMOS dynamic random access memory modules that use internally configured 8-bank DDR3 SDRAM devices. DDR3 SDRAM modules use DDR architecture to achieve high-speed operation. DDR3 architecture is essentially an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR3 SDRAM module effectively consists of a single 8n-bit-wide, one-clock-cycle data transfer at the internal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins. DDR3 modules use two sets of differential signals: DQS, DQS# to capture data and CK and CK# to capture commands, addresses, and control signals. Differential clocks and data strobes ensure exceptional noise immunity for these signals and provide precise crossing points to capture input signals. Fly-By Topology DDR3 modules use faster clock speeds than earlier DDR technologies, making signal quality more important than ever. For improved signal quality, the clock, control, command, and address buses have been routed in a fly-by topology, where each clock, control, command, and address pin on each DRAM is connected to a single trace and terminated (rather than a tree structure, where the termination is off the module near the connector). Inherent to fly-by topology, the timing skew between the clock and DQS signals can be easily accounted for by using the write-leveling feature of DDR3. Serial Presence-Detect EEPROM Operation DDR3 SDRAM modules incorporate serial presence-detect. The SPD data is stored in a 256-byte EEPROM. The first 128 bytes are programmed by Micron to comply with JEDEC standard JC-45, "Appendix X: Serial Presence Detect (SPD) for DDR3 SDRAM Modules." These bytes identify module-specific timing parameters, configuration information, and physical attributes. The remaining 128 bytes of storage are available for use by the customer. System READ/WRITE operations between the master (system logic) and the slave EEPROM device occur via a standard I2C bus using the DIMM’s SCL (clock) SDA (data), and SA (address) pins. Write protect (WP) is connected to V SS, permanently disabling hardware write protection. For further information refer to Micron technical note TN-04-42, "Memory Module Serial Presence-Detect." PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 12 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Electrical Specifications Electrical Specifications Stresses greater than those listed may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions outside those indicated in each device's data sheet is not implied. Exposure to absolute maximum rating conditions for extended periods may adversely affect reliability. Table 11: Absolute Maximum Ratings Symbol Parameter Min Max Units VDD VDD supply voltage relative to VSS –0.4 1.975 V VIN, VOUT Voltage on any pin relative to VSS –0.4 1.975 V Table 12: Operating Conditions Symbol Parameter VDD VDD supply voltage IVTT Termination reference current from VTT VTT Termination reference voltage (DC) – command/address bus II IOZ IVREF Input leakage current; Any input 0V ≤ VIN ≤ VDD; VREF input 0V ≤ VIN ≤ 0.95V (All other pins not under test = 0V) Output leakage current; 0V ≤ VOUT ≤ VDD; DQ and ODT are disabled; ODT is HIGH Min Nom 1.283 1.35 1.45 V 1.425 1.5 1.575 V –600 – 600 mA 0.49 × VDD - 20mV Max 0.5 × VDD 0.51 × VDD + 20mV Units Notes V Address inputs, RAS#, CAS#, WE#, BA –32 0 32 S#, CKE, ODT, CK, CK# –16 0 16 DM –4 0 4 DQ, DQS, DQS# –10 0 10 µA –16 0 16 µA VREF supply leakage current; VREFDQ = VDD/2 or VREFCA = VDD/2 (All other pins not under test = 0V) 1 2 µA TA Module ambient operating temperature Commercial 0 – 70 °C 3, 4 TC DDR3 SDRAM component Commercial case operating temperature 0 – 95 °C 3, 4, 5 Notes: PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 1. Module is backward-compatible with 1.5V operation. Refer to device specification for details and operation guidance. 2. VTT termination voltage in excess of the stated limit will adversely affect the command and address signals’ voltage margin and will reduce timing margins. 3. TA and TC are simultaneous requirements. 4. For further information, refer to technical note TN-00-08: “Thermal Applications,” available on Micron’s web site. 5. The refresh rate is required to double when 85°C < TC ≤ 95°C. 13 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM DRAM Operating Conditions DRAM Operating Conditions Recommended AC operating conditions are given in the DDR3 component data sheets. Component specifications are available at micron.com. Module speed grades correlate with component speed grades, as shown below. Table 13: Module and Component Speed Grades DDR3 components may exceed the listed module speed grades; module may not be available in all listed speed grades Module Speed Grade Component Speed Grade -2G1 -093 -1G9 -107 -1G6 -125 -1G4 -15E -1G1 -187E -1G0 -187 -80C -25E -80B -25 Design Considerations Simulations Micron memory modules are designed to optimize signal integrity through carefully designed terminations, controlled board impedances, routing topologies, trace length matching, and decoupling. However, good signal integrity starts at the system level. Micron encourages designers to simulate the signal characteristics of the system's memory bus to ensure adequate signal integrity of the entire memory system. Power Operating voltages are specified at the DRAM, not at the edge connector of the module. Designers must account for any system voltage drops at anticipated power levels to ensure the required supply voltage is maintained. PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 14 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM IDD Specifications IDD Specifications Table 14: DDR3 IDD Specifications and Conditions – 4GB (Die Revision K) Values are for the MT41K256M8 DDR3L SDRAM only and are computed from values specified in the 1.35V 2Gb (256 Meg x 8) component data sheet Parameter Symbol 1600 1333 Units IDD01 Operating current 0: One bank ACTIVATE-to-PRECHARGE Operating current 1: One bank ACTIVATE-to-READ-to-PRECHARGE 1 400 mA 512 496 mA IDD2P0 2 192 192 mA Precharge power-down current: Fast exit IDD2P1 2 224 224 mA Precharge quiet standby current IDD2Q2 320 320 mA Precharge standby current IDD2N2 336 336 mA 1 344 328 mA Precharge power-down current: Slow exit Precharge standby ODT current IDD1 408 IDD2NT Active power-down current IDD3P 2 336 336 mA Active standby current IDD3N2 512 480 mA Burst read operating current IDD4R1 848 752 mA 1 Burst write operating current IDD4W 872 776 mA Refresh current IDD5B1 1536 1528 mA Self refresh temperature current: MAX TC = 85°C IDD62 192 192 mA Self refresh temperature current (SRT-enabled): MAX TC = 95°C All banks interleaved read current IDD6ET IDD7 Reset current 240 240 mA 1 1344 1296 mA 2 224 224 mA IDD8 Notes: PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 2 1. One module rank in the active IDD; the other rank in IDD2P0 (slow exit). 2. All ranks in this IDD condition. 15 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM IDD Specifications Table 15: DDR3 IDD Specifications and Conditions – 8GB (Die Revisions E) Values are for the MT41K512M8 DDR3L SDRAM only and are computed from values specified in the 1.35V 4Gb (512 Meg x 8) component data sheet Parameter Symbol 1866 1600 1333 Units IDD01 Operating current 0: One bank ACTIVATE-to-PRECHARGE Operating current 1: One bank ACTIVATE-to-READ-to-PRECHARGE 1 IDD1 2 Precharge power-down current: Slow exit IDD2P0 640 584 520 mA 704 672 640 mA 288 288 288 mA Precharge power-down current: Fast exit IDD2P1 2 592 512 448 mA Precharge quiet standby current IDD2Q2 560 512 448 mA Precharge standby current IDD2N2 560 512 464 mA 1 480 456 424 mA Precharge standby ODT current IDD2NT Active power-down current IDD3P 2 656 608 560 mA Active standby current IDD3N2 656 608 560 mA Burst read operating current IDD4R1 1536 1400 1264 mA Burst write operating current IDD4W 1 1272 1144 1024 mA Refresh current IDD5B1 2080 2024 1968 mA Self refresh temperature current: MAX TC = 85°C IDD62 320 320 320 mA Self refresh temperature current (SRT-enabled): MAX TC = 95°C All banks interleaved read current IDD6ET 400 400 400 mA 1 2152 1904 1664 mA 2 320 320 320 mA IDD7 Reset current IDD8 Notes: PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 2 1. One module rank in the active IDD; the other rank in IDD2P0 (slow exit). 2. All ranks in this IDD condition. 16 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM IDD Specifications Table 16: DDR3 IDD Specifications and Conditions – 8GB (Die Revision N) Values are for the MT41K512M8 DDR3L SDRAM only and are computed from values specified in the 1.35V 4Gb (512 Meg x 8) component data sheet Parameter Symbol 1866 1600 Units IDD01 Operating current 0: One bank ACTIVATE-to-PRECHARGE Operating current 1: One bank ACTIVATE-to-READ-to-PRECHARGE 1 440 mA 576 552 mA IDD2P0 2 128 128 mA Precharge power-down current: Fast exit IDD2P1 2 256 224 mA Precharge quiet standby current IDD2Q2 416 384 mA Precharge standby current IDD2N2 416 384 mA 1 304 288 mA Precharge power-down current: Slow exit Precharge standby ODT current IDD1 456 IDD2NT Active power-down current IDD3P 2 448 416 mA Active standby current IDD3N2 512 480 mA Burst read operating current IDD4R1 904 824 mA 1 Burst write operating current IDD4W 904 824 mA Refresh current IDD5B1 1504 1464 mA Self refresh temperature current: MAX TC = 85°C IDD62 192 192 mA Self refresh temperature current (SRT-enabled): MAX TC = 95°C All banks interleaved read current IDD6ET IDD7 Reset current 256 256 mA 1 1184 1104 mA 2 160 160 mA IDD8 Notes: PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 2 1. One module rank in the active IDD; the other rank in IDD2P0 (slow exit). 2. All ranks in this IDD condition. 17 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM IDD Specifications Table 17: DDR3 IDD Specifications and Conditions – 8GB (Die Revision P) Values are for the MT41K512M8 DDR3L SDRAM only and are computed from values specified in the 1.35V 4Gb (512 Meg x 8) component data sheet Parameter Symbol 1866 1600 Units IDD01 Operating current 0: One bank ACTIVATE-to-PRECHARGE Operating current 1: One bank ACTIVATE-to-READ-to-PRECHARGE 1 304 mA 440 424 mA IDD2P0 2 176 160 mA Precharge power-down current: Fast exit IDD2P1 2 176 176 mA Precharge quiet standby current IDD2Q2 240 240 mA Precharge standby current IDD2N2 272 256 mA 1 264 240 mA Precharge power-down current: Slow exit Precharge standby ODT current IDD1 320 IDD2NT Active power-down current IDD3P 2 240 240 mA Active standby current IDD3N2 336 320 mA Burst read operating current IDD4R1 904 800 mA 1 Burst write operating current IDD4W 992 888 mA Refresh current IDD5B1 1304 1296 mA Self refresh temperature current: MAX TC = 85°C IDD62 240 240 mA Self refresh temperature current (SRT-enabled): MAX TC = 95°C All banks interleaved read current IDD6ET IDD7 Reset current 368 368 mA 1 1256 1120 mA 2 208 208 mA IDD8 Notes: PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 2 1. One module rank in the active IDD; the other rank in IDD2P0 (slow exit). 2. All ranks in this IDD condition. 18 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Serial Presence-Detect EEPROM Serial Presence-Detect EEPROM For the latest SPD data, refer to Micron's SPD page: micron.com/spd. Table 18: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to VDDSPD Parameter/Condition Symbol Min Max Units VDDSPD 3.0 3.6 V VIL –0.45 VDDSPD x 0.3 V Input high voltage: Logic 1; All inputs VIH VDDSPD x 0.7 VDDSPD + 1.0 V Output low voltage: IOUT = 3mA VOL – 0.4 V Input leakage current: VIN = GND to VDD ILI 0.1 2.0 µA Output leakage current: VOUT = GND to VDD ILO 0.05 2.0 µA Supply voltage Input low voltage: Logic 0; All inputs Table 19: Serial Presence-Detect EEPROM AC Operating Conditions Parameter/Condition Symbol Min Max Units tSCL 10 400 kHz Clock pulse width HIGH time tHIGH 0.6 – µs Clock pulse width LOW time tLOW 1.3 – µs Clock frequency Notes SDA rise time tR – 300 µs 1 SDA fall time tF 20 300 ns 1 Data-in setup time tSU:DAT 100 – ns Data-in hold time tHD:DI 0 – µs Data-out hold time tHD:DAT 200 900 ns Data out access time from SCL LOW tAA:DAT 0.2 0.9 µs 2 Start condition setup time tSU:STA 0.6 – µs 3 Start condition hold time tHD:STA 0.6 – µs Stop condition setup time tSU:STO 0.6 – µs tBUF 1.3 – µs tW – 10 ms Time the bus must be free before a new transition can start WRITE time Notes: PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 1. Guaranteed by design and characterization, not necessarily tested. 2. To avoid spurious start and stop conditions, a minimum delay is placed between the falling edge of SCL and the falling or rising edge of SDA. 3. For a restart condition, or following a WRITE cycle. 19 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Module Dimensions Module Dimensions Figure 4: 204-Pin DDR3 SODIMM (PCB 0900, R/C-F) Front view 3.8 (0.150) MAX 67.75 (2.667) 67.45 (2.656) 2.0 (0.079) R (2X) U1 U2 U5 U6 30.15 (1.187) 29.85 (1.175) 1.8 (0.071) (2X) U7 U8 U9 U10 0.45 (0.018) TYP 0.6 (0.024) TYP 20.0 (0.787) TYP 6.0 (0.236) TYP 1.0 (0.039) TYP 2.0 (0.079) TYP Pin 1 Pin 203 63.6 (2.504) TYP 45° 4X 1.10 (0.043) 0.90 (0.035) Back view U11 U12 U17 U18 U14 U15 U16 U19 U20 4.0 (0.157) TYP 2.55 (0.10) TYP 3.0 (0.12) TYP Pin 204 Pin 2 21.0 (0.827) TYP 39.0 (1.535) TYP 24.8 (0.976) TYP Notes: PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 1. All dimensions are in millimeters (inches); MAX/MIN or typical (TYP) where noted. 2. The dimensional diagram is for reference only. 20 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved. 4GB, 8GB (x64, DR) 204-Pin 1.35V DDR3L SODIMM Module Dimensions Figure 5: 204-Pin DDR3 SODIMM (PCB 1569, R/C-F3) Front view 3.8 (0.150) MAX 67.75 (2.667) 67.45 (2.656) 2.0 (0.079) R (2X) U2 U3 U4 U5 30.15 (1.187) 29.85 (1.175) 1.8 (0.071) (2X) U6 U7 U8 U9 20.0 (0.787) TYP 6.0 (0.236) TYP 1.0 (0.039) TYP 2.0 (0.079) TYP PIN 1 0.45 (0.018) TYP PIN 203 63.6 (2.504) TYP 45° 4X 1.10 (0.043) 0.90 (0.035) 0.6 (0.024) TYP Back view U11 U12 U15 U16 U10 U13 U14 U17 U18 4.0 (0.157) TYP 2.55 (0.10) TYP 3.0 (0.12) TYP PIN 204 39.0 (1.535) TYP PIN 2 21.0 (0.827) TYP 24.8 (0.976) TYP Notes: 1. All dimensions are in millimeters (inches); MAX/MIN or typical (TYP) where noted. 2. The dimensional diagram is for reference only. 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-4000 www.micron.com/products/support Sales inquiries: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. PDF: 09005aef846206a0 ktf16c512_1gx64hz.pdf - Rev. K 7/15 EN 21 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2011 Micron Technology, Inc. All rights reserved.