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MT5C6401

MT5C6401

  • 厂商:

    MICRON(镁光)

  • 封装:

  • 描述:

    MT5C6401 - 64K x 1 SRAM - Micron Technology

  • 数据手册
  • 价格&库存
MT5C6401 数据手册
OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM SRAM FEATURES • High speed: 9, 10, 12, 15, 20 and 25ns • High-performance, low-power, CMOS double-metal process • Single +5V ±10% power supply • Easy memory expansion with /C/E option • All inputs and outputs are TTL-compatible 64K x 1 SRAM PIN ASSIGNMENT (Top View) 22-Pin DIP (SA-2) A0 1 2 3 4 5 6 7 8 9 10 11 22 21 20 19 18 17 16 15 14 13 12 Vcc A15 A14 A13 A12 A11 A10 A9 A8 D CE OPTIONS • Timing 9ns access 10ns access 12ns access 15ns access 20ns access 25ns access • Packages Plastic DIP (300 mil) Plastic SOJ (300 mil) • 2V data retention • Temperature Commercial Industrial Automotive Extended MARKING -9 -10 -12 -15 -20 -25 A1 A2 A3 A4 A5 A6 A7 Q None DJ L WE Vss 24-Pin SOJ (SD-1) A0 A1 A2 A3 A4 A5 NC A6 A7 Q WE Vss 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 Vcc A15 A14 A13 A12 NC A11 A10 A9 A8 D CE (0°C to +70°C) (-40°C to +85°C) (-40°C to +125°C) (-55°C to +125°C) None IT AT XT • Part Number Example: MT5C6401DJ-10 L NOTE: Not all combinations of operating temperature, speed, data retention and low power are necessarily available. Please contact the factory for availability of specific part number combinations. GENERAL DESCRIPTION The MT5C6401 is organized as a 65,556 x 1 SRAM using a four-transistor memory cell with a high-speed, low-power CMOS process. Micron SRAMs are fabricated using doublelayer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, Micron offers chip enable (/C/E) with all organizations. This enhancement can place the outputs in High-Z for additional flexibility in system design. The x1 configuration features separate data input and output. MT5C6401 REV. 12/93 Writing to these devices is accomplished when write enable (?W/E) and /C/E inputs are both LOW. Reading is accomplished when ?W/E remains HIGH and /C/E goes to LOW. The device offers a reduced power standby mode when disabled. This allows system designers to meet low standby power requirements. All devices operate from a single +5V power supply and all inputs and outputs are fully TTL-compatible. 1 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM FUNCTIONAL BLOCK DIAGRAM Vcc GND A A A A A A 65,536-BIT MEMORY ARRAY I/O CONTROL A ROW DECODER D Q CE (LSB) WE COLUMN DECODER (LSB) POWER DOWN A A A A A A A TRUTH TABLE MODE STANDBY READ WRITE /C/E H L L ?W/E X H L INPUT DON’T CARE DON’T CARE DATA-IN OUTPUT HIGH-Z Q HIGH-Z POWER STANDBY ACTIVE ACTIVE MT5C6401 REV. 12/93 2 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM ABSOLUTE MAXIMUM RATINGS* Voltage on VCC Supply Relative to VSS .............. -1V to +7V Storage Temperature (plastic) .................... -55°C to +150°C Power Dissipation ............................................................. 1W Short Circuit Output Current ..................................... 50mA Voltage on Any Pin Relative to VSS ............ -1V to VCC +1V *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (0°C ≤ TA ≤ 70°C; Vcc = 5V ±10%) DESCRIPTION Input High (Logic 1) Voltage Input Low (Logic 0) Voltage Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Supply Voltage 0V ≤ VIN ≤ VCC Output(s) disabled 0V ≤ VOUT ≤ VCC IOH = -4.0mA IOL = 8.0mA CONDITIONS SYMBOL VIH VIL ILI ILO VOH VOL VCC 4.5 MIN 2.2 -0.5 -5 -5 2.4 0.4 5.5 MAX VCC +1 0.8 5 5 UNITS V V µA µA V V V 1 1 1 NOTES 1 1, 2 MAX DESCRIPTION Power Supply Current: Operating Power Supply Current: Standby CONDITIONS /C/E ≤ VIL; VCC = MAX f = MAX = 1/ tRC outputs open /C/E ≥ VIH; VCC = MAX f = MAX = 1/ tRC outputs open /C/E ≥ VCC -0.2V; VCC = MAX VIN ≤ VSS +0.2V or VIN ≥ VCC -0.2V; f = 0 SYMBOL ICC TYP 125 -9 -10 -12 -15 -20 -25 130 UNITS NOTES mA 3, 13 190 185 175 165 140 ISB1 22 60 50 45 40 35 35 mA 13 ISB2 0.5 3 3 3 3 3 5 mA 13 CAPACITANCE DESCRIPTION Input Capacitance Output Capacitance CONDITIONS TA = 25°C; f = 1 MHz VCC = 5V SYMBOL CI CO MAX 7 7 UNITS pF pF NOTES 4 4 MT5C6401 REV. 12/93 3 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Note 5) (0°C ≤ TA ≤ 70°C; VCC = 5V ±10%) DESCRIPTION READ Cycle READ cycle time Address access time Chip Enable access time Output hold from address change Chip Enable to output in Low-Z Chip disable to output in High-Z Chip Enable to power-up time Chip disable to power-down time WRITE Cycle WRITE cycle time Chip Enable to end of write Address valid to end of write Address setup time Address hold from end of write WRITE pulse width Data setup time Data hold time Write disable to output in Low-Z Write Enable to output in High-Z SYM tRC tAA tACE tOH tLZCE tHZCE tPU tPD tWC tCW tAW tAS tAH tWP tDS tDH tLZWE tHZWE -9 -10 -12 -15 -20 -25 MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES 9 9 9 3 2 5 0 9 9 7 7 0 0 6 5 1 2 4 10 8 8 0 0 7 6 1 2 5 0 10 12 10 10 0 0 8 7 1 2 5 3 2 5 0 12 15 12 12 0 0 10 8 1 2 6 10 10 9 3 2 6 0 15 20 15 15 0 0 12 9 1 2 8 12 12 10 3 2 7 0 20 25 20 20 0 0 15 10 1 2 8 15 15 12 3 2 8 0 25 20 20 15 3 2 8 25 25 20 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 7, 14 6, 7 7 6, 7 MT5C6401 REV. 12/93 4 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM INDUSTRIAL TEMPERATURE SPECIFICATIONS (IT) The following specifications are to be used for Industrial Temperature (IT) MT5C6401 SRAMs. (-40°C ≤ TA ≤ 85°C) MAX DESCRIPTION Power Supply Current: Operating Power Supply Current: Standby CONDITIONS /C/E ≤ VIL; VCC = MAX f = MAX = 1/ tRC outputs open /C/E ≥ VIH; VCC = MAX f = MAX = 1/ tRC outputs open /C/E ≥ VCC -0.2V; VCC = MAX VIN ≤ VSS +0.2V or VIN ≥ VCC -0.2V; f = 0 SYMBOL ICC -10 195 -12 185 -15 175 -20 150 -25 140 UNITS NOTES mA 3, 13 ISB1 60 50 45 40 40 mA 13 ISB2 5 5 5 5 5 mA 13 DATA RETENTION ELECTRICAL CHARACTERISTICS (L version only) DESCRIPTION Data Retention Current CONDITIONS /C/E ≥ (Vcc -0.2V) VIN ≥ (VCC -0.2V) or ≤ 0.2V VCC = 2V VCC = 3V SYMBOL ICCDR ICCDR TYP 130 210 MAX 300 550 UNITS µA µA NOTES 14 14 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS Refer to commercial temperature timing parameters for specifications not listed here. (Notes 5, 14) (-40°C ≤ TA ≤ 85°C) DESCRIPTION READ Cycle Output hold from address change Chip Enable to output in Low-Z WRITE Cycle Write disable to output in Low-Z SYM tOH tLZCE tLZWE -12 -15 -20 -25 MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES 2 1 1 2 1 1 2 1 1 2 1 1 ns ns ns 7 7 MT5C6401 REV. 12/93 5 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM AUTOMOTIVE AND EXTENDED TEMPERATURE SPECIFICATIONS (AT AND XT) The following specifications are to be used for Automotive Temperature (AT) and Extended Temperature (XT) MT5C6401 SRAMs. (-40°C ≤ TA ≤ 125°C - AT) (-55°C ≤ TA ≤ 125°C - XT) MAX DESCRIPTION Power Supply Current: Operating Power Supply Current: Standby CONDITIONS /C/E ≤ VIL; VCC = MAX f = MAX = 1/ tRC outputs open /C/E ≥ VIH; VCC = MAX f = MAX = 1/ tRC outputs open /C/E ≥ VCC -0.2V; VCC = MAX VIN ≤ VSS +0.2V or VIN ≥ VCC -0.2V; f = 0 SYMBOL ICC -12 185 -15 175 -20 150 -25 140 UNITS NOTES mA 3, 13 ISB1 50 45 40 40 mA 13 ISB2 5 5 5 5 mA 13 DATA RETENTION ELECTRICAL CHARACTERISTICS (L version only) DESCRIPTION Data Retention Current CONDITIONS /C/E ≥ (Vcc -0.2V) VIN ≥ (VCC -0.2V) or ≤ 0.2V VCC = 2V VCC = 3V SYMBOL ICCDR ICCDR TYP 130 210 MAX 300 550 UNITS µA µA NOTES 14 14 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS Refer to commercial temperature timing parameters for specifications not listed here. (Notes 5, 14) (-40°C ≤ TA ≤ 125°C; -55°C ≤ TA ≤ 125°C; VCC = 5V ±10%) DESCRIPTION READ Cycle Output hold from address change Chip Enable to output in Low-Z WRITE Cycle Write disable to output in Low-Z SYM tOH tLZCE tLZWE -12 -15 -20 -25 MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES 2 1 1 2 1 1 2 1 1 2 1 1 ns ns ns 7 7 MT5C6401 REV. 12/93 6 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM AC TEST CONDITIONS Input pulse levels ................................... Vss to 3.0V Input rise and fall times ....................................... 3ns Input timing reference levels ............................. 1.5V Output reference levels ..................................... 1.5V Output load .............................. See Figures 1 and 2 Fig. 1 OUTPUT LOAD EQUIVALENT Fig. 2 OUTPUT LOAD EQUIVALENT Q 255 30 pF +5V 480 Q 255 5 pF +5V 480 NOTES 1. 2. 3. 4. 5. All voltages referenced to VSS (GND). -3V for pulse width < tRC/2. ICC is dependent on output loading and cycle rates. This parameter is sampled. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted. 6. tHZCE and tHZWE are specified with CL = 5pF as in Fig. 2. Transition is measured ±500mV from steady state voltage. 7. At any given temperature and voltage condition, tHZCE is less than tLZCE and tHZWE is less than tLZWE 8. ?W/E is HIGH for READ cycle. 9. Device is continuously selected. All chip enables are held in their active state. 10. Address valid prior to, or coincident with, latest occurring chip enable. 11. tRC = Read Cycle Time. 12. Chip enable and write enable can initiate and terminate a WRITE cycle. 13. Typical values are measured at 5V, 25°C and 15ns cycle time. 14. Typical currents are measured at 25°C. DATA RETENTION ELECTRICAL CHARACTERISTICS (L version only) DESCRIPTION VCC for Retention Data Data Retention Current Chip Deselect to Data Retention Time Operation Recovery Time /C/E ≥ (Vcc -0.2V) VIN ≥ (VCC -0.2V) or ≤ 0.2V VCC = 2V VCC = 3V CONDITIONS SYMBOL VDR ICCDR ICCDR tCDR tR MIN 2 TYP 130 210 MAX 300 400 UNITS V µA µA ns ns NOTES 14 14 4 4, 11 0 tRC MT5C6401 REV. 12/93 7 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM     , Vcc CE VIH VIL ADDR Q CE LOW VCC DATA RETENTION WAVEFORM DATA RETENTION MODE 4.5V 4.5V VDR tCDR VDR READ CYCLE NO. 1 8, 9 tRC  ,    tR VALID tAA tOH PREVIOUS DATA VALID ,, tRC DATA VALID READ CYCLE NO. 2 7, 8, 10 tACE tLZCE DQ HIGH-Z tPU Icc , 8 tHZCE DATA VALID MT5C6401 REV. 12/93 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc.    ,, tPD ,, DON’T CARE UNDEFINED OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM WRITE CYCLE NO. 1 12 (Chip Enable Controlled) tWC     ,, , ,,,  ,    ,     ,  , ,, , ,   ,      ADDR tAW tAS tCW tAH CE tWP WE tDS tDH D DATA VALID Q HIGH-Z WRITE CYCLE NO. 2 7, 12 (Write Enable Controlled) MT5C6401 REV. 12/93 ,, ,,,, ,, ,, , , ,,,,,,,, ,,, ,,, , ,,,,,, ,,, , , tWC ADDR tAW tCW tAH CE tAS tWP WE tDS tDH D DATA VALID tHZWE tLZWE Q HIGH-Z DON’T CARE UNDEFINED 9 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc. OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM 22-PIN PLASTIC DIP 1.033 (26.24) 1.027 (26.09 ) .257 (6.53) .251 (6.38) SEATING PLANE PIN 1 PIN #1 INDEX .170 (4.32) .155 (3.94) .145 (3.68) .135 (3.43) .325 (8.26) .300 (7.62) 1.000 (25.38) TYP NOTE: 1. All dimensions in inches (millimeters) MAX or typical where noted. MIN 2. Package width and length do not include mold protrusion; allowable mold protrusion is .01" per side. MT5C6401 REV. 12/93 10 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc. .140 (3.56) .120 (3.05) .062 (1.57) .050 (1.27) .100 (2.54) .021 (0.53) .016 (0.41) TYP .014 (0.36) .008 (0.20) .380 (9.65) .330 (8.38) OBSOLETE 8/31/94 MT5C6401 64K x 1 SRAM 24-PIN PLASTIC SOJ .629 (15.98) .623 (15.82) .305 (7.75) .299 (7.59) .340 (8.64) .330 (8.38) PIN #1 INDEX .050 (1.27) TYP .550 (13.97) 30° .032 (0.81) .026 (0.66) .145 (3.68) .132 (3.35) .020 (0.51) .015 (0.38) .095 (2.41) .080 (2.03) .275 (6.99) .260 (6.60) .118 (3.00) .108 (2.74) .025 (0.64) SEATING PLANE .037 (0.94) MAX DAMBAR PROTRUSION NOTE: 1. All dimensions in inches (millimeters) MAX or typical where noted. MIN 2. Package width and length do not include mold protrusion; allowable mold protrusion is .01" per side. 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, Internet: http://www.micron.com, Customer Comment Line: 800-932-4992 Micron is a registered trademark of Micron Technology, Inc. MT5C6401 REV. 12/93 11 Micron Semiconductor, Inc., reserves the right to change products or specifications without notice. ©1993, Micron Semiconductor, Inc.
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