SMC128CFB6E

SMC128CF SMC01GCF SMC08GCF 128-Mbyte, 1-Gbyte, 8-Gbyte, 3.3/5 V supply, CompactFlash™ card Preliminary Data Features ■ Custom-designed, highly-integrated memory controller – Fully compliant with CompactFlashTM specification 3.0 – Fully compatible with PCMCIA specification 2.1 – PC Card ATA interface supported – True IDE mode compatible – Up to PIO mode 6 supported – Up to 4 multi-word DMA supported – Hardware RS-ECC (4 symbols in a 512byte sector) – Up to mode 4 UDMA ■ Small form factor – 36.4 mm x 42.8 mm x 3.3 mm ■ Low-power CMOS technology ■ 3.3 V / 5 V power supply ■ Power saving mode (with automatic wake-up) ■ Hot swappable ■ Flash memory power-down logic and write protect control ■ Power loss protection Table 1. CompactFlashTM ■ High performance – Up to 66 Mbyte/s transfer rate – Sustained write performance (host to card): 18.3 Mbyte/s – Sustained read performance (host to card: 41.8 Mbyte/s) ■ Available densities (formatted) – 128 Mbytes, 1 Gbyte and 8 Gbytes ■ Operating system support – Standard software drivers operation Device summary Reference Root part number Package form factor Operating voltage range CF type I 3.3 V + 10%, 5 V + 10% SMC128CF SMCxxxCF SMC01GCF SMC08GCF May 2009 Rev 3 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/29 www.numonyx.com 1 Contents SMC128CF, SMC01GCF, SMC08GCF Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Capacity specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Card physical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 4 Physical description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 Electrical description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.3 Current measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.4 Additional requirements for CompactFlash advanced timing mode . . . . . 18 5 Command interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6 Card configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 Host configuration requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 Software interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9 CF-ATA registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 10 CF-ATA command description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 11 CIS information (typical) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 12 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 13 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2/29 SMC128CF, SMC01GCF, SMC08GCF List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 System performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Environmental specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Physical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 CF capacity specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin assignment and pin type. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Signals description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Absolute maximum conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Input power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Input leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Output drive type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Output drive characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3/29 List of figures SMC128CF, SMC01GCF, SMC08GCF List of figures Figure 1. Figure 2. 4/29 CompactFlash memory card block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Type I CompactFlash memory card dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 SMC128CF, SMC01GCF, SMC08GCF 1 Description Description The CompactFlash is a small form factor non-volatile memory card which provides high capacity data storage. Its aim is to capture, retain and transport data, audio and images, facilitating the transfer of all types of digital information between a large variety of digital systems. The card operates in three basic modes: ● PCMCIA I/O mode ● PCMCIA memory mode ● True IDE mode The CompactFlash also supports advanced timing modes. Advanced timing modes are PCMCIA style I/O modes that are 100 ns or faster, PCMCIA memory modes that are 100 ns or faster, true IDE PIO up to mode 6, multi-word DMA up to mode 4, and UDMA up to mode 4. It conforms to the PC card specification when operating in the PCMCIA I/O mode, and in the PCMCIA memory mode (personal computer memory card international association standard, JEIDA in Japan), and to the ATA specification when operating in true IDE mode. CompactFlash cards can be used with passive adapters in a PC-card type II or type III socket. The card has an internal intelligent controller which manages interface protocols, data storage and retrieval as well as hardware RS-code error correction code (ECC), defect handling, diagnostics and clock control. Once the card has been configured by the host, it behaves as a standard ATA (IDE) disk drive. The hardware RS-code ECC allows to detect and correct 4 bytes per 512 bytes. The specification has been realized and approved by the CompactFlash association (CFA). This non-proprietary specification enables users to develop CF products that function correctly and are compatible with future CF design. The system highlights are shown in Table 2, Table 3, Table 4, Table 5, and Table 6. Related documentation ● PCMCIA PC card standard, 1995 ● PCMCIA PC card ATA specification, 1995 ● AT attachment interface document, american national standards institute, X3.221-1994 ● CF+ and CompactFlash specification revision 3.0. 5/29 Description SMC128CF, SMC01GCF, SMC08GCF Table 2. System performance System performance Max Unit Sleep to write 0.022 ms Sleep to read 0.070 ms 493 ms Power-up to ready 66 (440X)(1) Data transfer rate (burst) Sustained read Sustained write Mbyte/s 41.8 (278X) (1) Mbyte/s 18.3 (122X) (1) Mbyte/s Read 33.7 Write 8.5 Command to DRQ µs 1. 440X, 278X and 122X, speed grade markings where 1X = 150 Kbytes/s. All values are measured for an ambient temperature of 25 °C. They refer to the 1-Gbyte CompactFlash card in PIO mode 6, cycle time 80 ns, File size = 20 Mbytes sequential; sector count = 256. Current consumption(1) Table 3. Current consumption (typ) 3.3 V 5V Unit Read 32 44 mA Write 79 83 mA Standby 0.5 0.5 mA Sleep mode 0.5 0.5 mA 1. All values are typical at 25 °C and nominal supply voltage and refer to 1-Gbyte CompactFlash card, operating in PIO mode. Table 4. Environmental specifications Environmental specifications Operating Non-operating –40 to 85 °C –50 to 100 °C Humidity (non-condensing) N/A 85% RH, at 85 °C Salt water spray N/A 3% NaCl at 35 °C(1) Vibration (peak -to-peak) N/A 30Gmax. Shock N/A 3,000Gmax. Temperature 1. MIL STD METHOD 1009. Table 5. Physical dimensions Physical dimensions 6/29 Unit Width 42.8 mm Height 36.4 mm Thickness 3.3 mm Weight (typ.) 10 g SMC128CF, SMC01GCF, SMC08GCF 2 Capacity specification Capacity specification Table 6 shows the specific capacity for the various CF models and the default number of heads, sector/tracks and cylinders. Table 6. CF capacity specification Root part number Capacity Default_cylinders Default_ heads SMC128CF 128 Mbytes 994 8 32 254,464 130,285,568 SMC01GCF 1 Gbyte 1,991 16 63 2,006,928 1,003,464,000 SMC08GCF 8 Gbytes 15,949 16 63 16,055,424 8,231,215,104 Default_sectors Addressable Sectors_card _track capacity (byte) 7/29 Card physical SMC128CF, SMC01GCF, SMC08GCF 3 Card physical 3.1 Physical description The CompactFlash memory card contains a single chip controller and flash memory module(s). The controller interfaces with a host system allowing data to be written to and read from the flash memory module(s). Figure 1 shows the block diagram of the CompactFlash memory card. The card is offered in a type I package with a 50-pin connector consisting of two rows of 25 female contacts on 50 mil (1.27 mm) centers. Figure 2 shows type I card dimensions. Figure 1. CompactFlash memory card block diagram Data In/Out Host interface Controller Control Flash module(s) CompactFlash storage card AI04300 8/29 SMC128CF, SMC01GCF, SMC08GCF Electrical interface 4 Electrical interface 4.1 Electrical description The CompactFlash memory card operates in three basic modes: ● PC card ATA using I/O mode ● PC card ATA using memory mode ● True IDE mode, which is compatible with most disk drives. The signal/pin assignments are listed in Table 7 Low active signals have a ‘–’ prefix. Pin types are input, output or input/output. The configuration of the card is controlled using the standard PCMCIA configuration registers starting at address 200h in the attribute memory space of the memory card. Table 8 describes the I/O signals. Inputs are signals sourced from the host while outputs are signals sourced from the card. The signals are described for each of the three operating modes. All outputs from the card are totem pole except the data bus signals that are bi-directional tri-state. Refer to the Section 4.2: Electrical specification for definitions of input and output type. Table 7. Pin assignment and pin type PC card memory mode PC card I/O mode True IDE mode Pin num Signal Pin In, Out Signal Pin In, Out Signal Pin In, Out name type type name type type name type type Ground GND Ground GND 1 GND 2 D03 I/O I1Z,OZ3 D03 I/O I1Z,OZ3 D03 I/O I1Z,OZ3 3 D04 I/O I1Z,OZ3 D04 I/O I1Z,OZ3 D04 I/O I1Z,OZ3 4 D05 I/O I1Z,OZ3 D05 I/O I1Z,OZ3 D05 I/O I1Z,OZ3 5 D06 I/O I1Z,OZ3 D06 I/O I1Z,OZ3 D06 I/O I1Z,OZ3 6 D07 I/O I1Z,OZ3 D07 I/O I1Z,OZ3 D07 I/O I1Z,OZ3 7 –CE1 I I3U –CE1 I I3U –CS0 I I3Z I I1Z 8 A10 I I1Z A10 I I1Z A10(2) 9(1) –OE I I3U –OE I I3U –ATASEL Ground I I3U (2) 10 A09 I I1Z A09 I I1Z A09 I I1Z 11 A08 I I1Z A08 I I1Z A08(2) I I1Z I1Z A07(2) I I1Z Power VCC 12 A07 13 VCC I I1Z A07 Power VCC I (2) Power 14 A06 I I1Z A06 I I1Z A06 I I1Z 15 A05 I I1Z A05 I I1Z A05(2) I I1Z I1Z (2) I I1Z 16 A04 I I1Z A04 I A04 9/29 Electrical interface Table 7. SMC128CF, SMC01GCF, SMC08GCF Pin assignment and pin type (continued) PC card memory mode PC card I/O mode True IDE mode Pin Signal Pin In, Out Signal Pin In, Out Signal Pin In, Out name type type name type type name type type 17 A03 I I1Z A03 I I1Z A03(2) I I1Z 18 A02 I I1Z A02 I I1Z A02 I I1Z 19 A01 I I1Z A01 I I1Z A01 I I1Z 20 A00 I I1Z A00 I I1Z A00 I I1Z 21 D00 I/O I1Z,OZ3 D00 I/O I1Z,OZ3 D00 I/O I1Z,OZ3 22 D01 I/O I1Z,OZ3 D01 I/O I1Z,OZ3 D01 I/O I1Z,OZ3 23 D02 I/O I1Z,OZ3 D02 I/O I1Z,OZ3 D02 I/O I1Z,OZ3 24 WP O OT3 –IOIS16 O OT3 –IOIS16 O ON3 25 –CD2 O Ground –CD2 O Ground –CD2 O Ground 26 –CD1 O Ground –CD1 O Ground –CD1 O Ground 27 D11(3) I/O I1Z,OZ3 D11(3) I/O I1Z,OZ3 D11(3) I/O I1Z,OZ3 28 D12(3) I1Z,OZ3 D12(3) I1Z,OZ3 D12(3) I/O I1Z,OZ3 29 (3) I1Z,OZ3 D13(3) I1Z,OZ3 D13(3) I/O I1Z,OZ3 I/O I1Z,OZ3 D14(3) I/O I1Z,OZ3 I/O I1Z,OZ3 D15(3) I/O I1Z,OZ3 I I3Z num D13 I/O I/O I/O I/O 30 (3) D14 I/O I1Z,OZ3 D14(3) 31 D15(3) I/O I1Z,OZ3 D15(3) I I3U –CE2(3) I I3U –CS1(3) 32 (3) –CE2 33 –VS1 O Ground –VS1 O Ground –VS1 O Ground 34 –IORD I I3U –IORD I I3U –IORD HSTROBE –HDMARDY I I3Z 35 –IOWR I I3U –IOWR I I3U –IOWR STOP I I3Z 36 –WE I I3U –WE I I3U –WE(4) I I3U 37 READY O OT1 -IREQ O OT1 INTRQ O OZ1 38 VCC Power VCC Power VCC I I2Z –CSEL(5) I I2Z –CSEL(5) I I2U 39 (5)(3) –CSEL Power 40 –VS2 O OPEN –VS2 O OPEN –VS2 O OPEN 41 RESET I I2Z RESET I I2Z -RESET I I2Z 42 –WAIT O OT1 –WAIT O OT1 IORDY –DDMARDY DSTROBE O ON1 43 –INPACK O OT1 –INPACK O OT1 DMARQ O OZ1 44 –REG I I3U –REG I I3U -DMACK(6) I I3U 45 BVD2 I/O I1U,OT1 –SPKR I/O I1U,OT1 –DASP I/O I1U,ON1 10/29 SMC128CF, SMC01GCF, SMC08GCF Table 7. Electrical interface Pin assignment and pin type (continued) PC card memory mode PC card I/O mode True IDE mode Pin Signal Pin In, Out Signal Pin In, Out Signal Pin In, Out name type type name type type name type type 46 BVD1 I/O I1U,OT1 –STSCHG I/O I1U,OT1 –PDIAG 47 (3) D08 I/O 48 D09(3) I/O 49 D10(3) 50 GND num I/O I1Z,OZ3 (3) D08 I/O I1Z,OZ3 D09(3) I/O I1Z,OZ3 (3) D10 Ground GND I/O I/O I1U,ON1 I1Z,OZ3 (3) D08 I/O I1Z,OZ3 I1Z,OZ3 D09(3) I/O I1Z,OZ3 I1Z,OZ3 (3) D10 I/O I1Z,OZ3 Ground GND Ground 1. For True IDE mode, pin 9 is grounded. 2. The signal should be grounded by the host. 3. These signals are required only for 16-bit accesses and not required when installed in 8-bit systems. Devices should allow for 3-state signals not to consume current. 4. The signal should be tied to VCC by the host. 5. The -CSEL signal is ignored by the card in PC card modes. However, because it is not pulled up on the card in these modes it should not be left floating by the host in PC card modes. In these modes, the pin is normally connected by the host to PC card A25 or grounded by the host. 6. When the device does not operate in DMA mode, the signal should be held High or tied to VCC by the host. To ensure proper operation with older hosts when DMA mode is disabled, the card should ignore the –DMACK signal. Table 8. Signals description Signal name Dir. Pin A10 to A0 (PC card memory mode) A10 to A0 (PC card I/O mode) I 8,10,11,12, 14,15,16,17, 18,19,20 Description Used (with –REG) to select: the I/O port address registers, the memory mapped port address registers, a byte in the card information structure and its configuration control and status registers. Same as PC card memory mode A2 to A0 (True IDE mode) Only A2 to A0 are used to select the one of eight registers in the task file, the remaining lines should be grounded. BVD1 (PC card memory mode) The battery voltage status of the card, as no battery is required it is asserted High. –STSCHG (PC card I/O mode) I/O 46 Alerts the host to changes in the ready and write protect states. Its use is controlled by the card configuration and status register. –PDIAG (True IDE mode) The Pass Diagnostic signal in the master/slave handshake protocol. BVD2 (PC card memory mode) The battery voltage status of the card, as no battery is required it is asserted High. –SPKR (PC card I/O mode) –DASP (True IDE mode) I/O 45 The Binary Audio output from the card. It is asserted High as audio functions are not supported. This input/output is the Disk Active/Slave Present signal in the master/slave handshake protocol. 11/29 Electrical interface Table 8. SMC128CF, SMC01GCF, SMC08GCF Signals description (continued) Signal name Dir. D15-D00 (PC card memory mode) D15-D00 (PC card I/O mode) I/O Pin 31,30,29,28, 27,49,48,47, 6,5,4,3,2, 23,22,21 Description Carry the data, commands and status information between the host and the controller. D00 is the LSB of the even byte of the word. D08 is the LSB of the odd byte of the word. Same as PC card memory mode. D15-D00 (True IDE mode) All task file operations occur in byte mode on D00 to D07 while all data transfers are 16 bits using D00 to D15. GND (PC card memory mode) Ground. GND (PC card I/O mode) 1,50 Same for all modes. GND (True IDE mode) Same for all modes. –INPACK (PC card memory mode) Not used, should not be connected to the host. –INPACK (PC card I/O mode) The input acknowledge is asserted when the card is selected and responding to an I/O read cycle at the current address on the bus. It is used by the host to control the enable of any input data buffers between the card and CPU. DMARQ (True IDE mode) The DMARQ input signal is used to request a DMA data transfer between the host and the card. It is asserted to notify that the card is ready to transfer data to or from the host. For multi-word DMA transfers, the direction of data transfer is controlled by -IORD and -IOWR. DMARQ is used in conjunction with –DMACK to perform handshaking: the card waits until –DMACK has been asserted by the host to de-assert DMARQ, and re-assert it again if there is still data to be transferred. DMARQ is not driven when the card is not selected. If the host does not support DMA mode, DMARQ should be left unconnected. O 12/29 43 SMC128CF, SMC01GCF, SMC08GCF Table 8. Electrical interface Signals description (continued) Signal name Dir. Pin Description –IORD (PC card memory mode) Not used. –IORD (PC card I/O mode) I/O read strobe generated by the host. It gates I/O data onto the bus. –IORD (True IDE mode - except Ultra DMA Protocol Active) In True IDE mode, while Ultra DMA mode is not active, this signal has the same function as in PC Card I/O mode. –HDMARDY (True IDE mode - in Ultra DMA Protocol DMA Read) I 34 In True IDE mode when Ultra DMA mode DMA Read is active, this signal is asserted by the host to indicate that the host is read to receive Ultra DMA data-in bursts. The host may negate -HDMARDY to pause an Ultra DMA transfer. –HSTROBE (True IDE mode - in Ultra DMA Protocol DMA Write) In True IDE mode when Ultra DMA mode DMA Write is active, this signal is the data out strobe generated by the host. Both the rising and falling edge of HSTROBE cause data to be latched by the device. The host may stop generating HSTROBE edges to pause an Ultra DMA dataout burst. –CD1, –CD2 (PC card memory mode) These are connected to ground on the card. They are used by the host to determine that the card is fully inserted into its socket. –CD1, –CD2 (PC card I/O mode) O 26,25 Same for all modes. –CD1, –CD2 (True IDE mode) Same for all modes. –CE1, –CE2 (PC card memory mode) Used to select the card and to indicate whether a byte or a word operation is being performed. –CE2 accesses the odd Byte, –CE1 accesses the even byte or the odd byte depending on A0 and –CE2. A multiplexing scheme based on A0, –CE1, –CE2 allows 8-bit hosts to access all data on D0 to D7. –CE1, –CE2 (PC card I/O mode) I 7,32 Same as PC card memory mode. –CS0, –CS1 (True IDE mode) –CS0 is the chip select for the task file registers, while –CS1 selects the alternate status register and the device control register. When –DMACK is asserted, -CS0 and –CS1 must be deasserted and data width is 16 bits. –CSEL (PC card memory mode) Not used. –CSEL (PC card I/O mode) –CSEL (True IDE mode) I 39 Not used. This internally pulled up signal is used to configure the card as a master or slave. When grounded it is configured as a master, when open it is configured as a slave. 13/29 Electrical interface Table 8. SMC128CF, SMC01GCF, SMC08GCF Signals description (continued) Signal name Dir. Pin Description –IOWR (PC card memory mode) Not used. –IOWR (PC card I/O mode) The I/O write strobe pulse is used to clock I/O data on the bus into the card controller registers. Clocking occurs on the rising edge. –IOWR (True IDE mode - except Ultra DMA Protocol Active) I 35 In True IDE mode, while Ultra DMA mode protocol is not active, this signal has the same function as in PC Card I/O mode. When Ultra DMA mode protocol is supported, this signal must be negated before entering Ultra DMA mode protocol. –STOP (True IDE mode - Ultra DMA Protocol Active) In True IDE mode, while Ultra DMA mode protocol is active, the assertion of this signal causes the termination of the Ultra DMA burst. –OE (PC card memory mode) This is an Output Enable strobe generated by the host interface. It reads data and the CIS and configuration registers. –OE (PC card I/O mode) I 9 Reads the CIS and configuration registers. –ATASEL (True IDE mode) This input signal must be driven Low to enable true IDE mode. READY (PC card memory mode) Indicates whether the card is busy (Low), or ready to accept a new data transfer operation (High). The host socket must provide a pull-up resistor. At power-up and reset, the Ready signal is held Low until the commands are completed. No access should be made during this time. The Ready signal is held High whenever the card has been powered up with Reset continuously disconnected or asserted. O 37 –IREQ (PC card I/O mode) Interrupt request. It is strobed Low to generate a pulse mode interrupt or held Low for a level mode interrupt. INTRQ (True IDE mode) Active High interrupt request to the host. –REG (PC card memory mode) Used to distinguish between common memory and register (attribute) memory accesses. High for common memory, Low for attribute memory. –REG (PC card I/O mode) Must be Low during I/O cycles when the I/O address is on the bus. I –DMACK (True IDE mode) 44 The –DMACK input signal is used to acknowledge DMA transfers. It is asserted by the host in response to DMARQ to initiate the transfer. When DMA mode is disabled, the card should ignore the -DMACK signal. If the host does not support DMA mode, but only True IDE mode, this signal should be driven High or tied to VCC by the host. 14/29 SMC128CF, SMC01GCF, SMC08GCF Table 8. Electrical interface Signals description (continued) Signal name Dir. Pin RESET (PC card memory mode) RESET (PC card I/O mode) Description Resets the card (active High). The card is reset at power-up only if this pin is left High or unconnected. I 41 Same as PC card memory mode. –RESET (True IDE mode) Hardware reset from the host (active Low). VCC (PC card memory mode) +5 V, +3.3 V power. VCC (PC card I/O mode) 13,38 Same for all modes. VCC (True IDE mode) Same for all modes. –VS1, –VS2 (PC card memory mode) Voltage sense signals.–VS1 is grounded so that the CIS can be read at 3.3 volts and –VS2 is reserved by PCMCIA for a secondary voltage. –VS1, –VS2 (PC card I/O mode) O 33,40 –VS1, –VS2 (True IDE mode) Same for all modes. Same for all modes. –WAIT (PC card memory mode) Numonyx CF does not assert the WAIT (IORDY) signal –WAIT (PC card I/O mode) IORDY (True IDE mode - except Ultra DMA mode) -DDMARDY (True IDE mode – Ultra DMA Write mode) DSTROBE (True IDE mode – Ultra DMA Read mode) In True IDE mode, except in Ultra DMA mode, this output signal may be used as IORDY. O 42 In True IDE mode, when Ultra DMA mode DMA Write is active, this signal is asserted by the host to indicate that the device is read to receive Ultra DMA data-in bursts. The device may negate -DDMARDY to pause an Ultra DMA transfer. In True IDE mode, when Ultra DMA mode DMA Write is active, this signal is the data out strobe generated by the device. Both the rising and falling edge of DSTROBE cause data to be latched by the host. The device may stop generating DSTROBE edges to pause an Ultra DMA dataout burst. 15/29 Electrical interface Table 8. SMC128CF, SMC01GCF, SMC08GCF Signals description (continued) Signal name Dir. Pin –WE (PC card memory mode) –WE (PC card I/O mode) Description Driven by the host to strobe memory write data to the registers. I 36 Used for writing to the configuration registers. –WE (True IDE mode) Not used, should be connected to VCC by the host. WP (PC card memory mode) No write protect switch available. It is held Low after the completion of the reset initialization sequence. –IOIS16 (PC card I/O mode) –IOCS16 (True IDE mode) 16/29 O 24 Used for the 16-bit port (–IOIS16) function. Low indicates that a 16-bit or odd byte only operation can be performed at the addressed port. Asserted Low when the card is expecting a word data transfer cycle. SMC128CF, SMC01GCF, SMC08GCF 4.2 Electrical interface Electrical specification Table 9 defines the DC characteristics for the CompactFlash memory card. Unless otherwise stated, conditions are: ● VCC = 5 V ± 10% ● VCC = 3.3 V ± 10% ● -40 °C to 85 °C. Table 10 shows that the card operates correctly in both the voltage ranges and that the current requirements must not exceed the maximum limit shown. Table 9. Absolute maximum conditions Parameter Symbol Conditions VCC − 0.3 V to 6.5 V V − 0.5 V to VCC + 0.5 V Input power Voltage on any pin except VCC with respect to GND Table 10. 4.3 Input power Voltage Maximum average RMS current Measurement conditions 3.3 V ± 10% 75 − 40 + 85 °C 5 V ± 10% 100 − 40 + 85 °C Current measurement The current is measured by connecting an amp meter in series with the VCC supply. The meter should be set to the 2A scale range, and have a fast current probe with an RC filter with a time constant of 0.1 ms. Current measurements are taken while looping on a data transfer command with a sector count of 128. Current consumption values for both read and write commands are not to exceed the maximum average RMS current specified in Table 10. Table 11 shows the input leakage current, Table 12 the input characteristics, Table 13 the output drive type and Table 14 the output drive characteristics. Table 11. Input leakage current(1) Type Parameter Symbol IxZ Input leakage current IL Conditions VIH = VCC Min Typ Max Units −2 2 µA VIL = GND IxU Pull up resistor RPU1 VCC = 5.0 V 50 500 kΩ IxD Pull down resistor RPD1 VCC = 5.0 V 50 500 kΩ 1. x refers to the characteristics described in Table 12. For example, I1U indicates a pull up resistor with a type 1 input characteristic. 17/29 Electrical interface SMC128CF, SMC01GCF, SMC08GCF Table 12. Input characteristics Min Type Parameter Typ Max Min 2 3 Table 13. Max Units VCC = 3.3 V 1 Typ Symbol VCC = 5.0 V Input voltage CMOS VIH Input voltage CMOS VIH Input voltage CMOS Schmitt Trigger VTH 1.8 2.8 VTL 1.0 2.0 2.4 3.3 V 0.6 VIL 1.5 0.8 2.0 V 0.6 VIL 0.8 V Output drive type(1) Type Output type Valid conditions OTx Totempole IOH & IOL OZx Tri-state N-P channel IOH & IOL OPx P-channel only IOH only ONx N-channel only IOL only 1. x refers to the characteristics described in Table 14. For example, OT3 refers to totem pole output with a type 3 output drive characteristic. Table 14. Type Parameter 1 Output voltage 2 3 X 4.4 Output drive characteristics Output voltage Output voltage Tri-state leakage current Symbol Conditions Min VOH IOH = -4 mA VCC − 0.8 V VOL IOL = 4 mA VOH IOH = -4 mA VOL IOL = 4 mA VOH IOH = -4 mA VOL IOL = 4 mA IOZ VOL = Gnd Typ Max Units V Gnd + 0.4 V VCC − 0.8 V V Gnd + 0.4 V VCC − 0.8 V V Gnd + 0.4 V –10 10 µA VOH = VCC Additional requirements for CompactFlash advanced timing mode When operating in a CompactFlash advanced timing mode, the following conditions must be respected: 18/29 ● Only one CompactFlash card must be connected to the CompactFlash bus ● The load capacitance (cable included) for all signals must be lower than 40 pF ● The cable length must be lower than 0.15 m (6 inches). The cable length is measured from the card connector to the host controller. 0.46 m (18 inches) cables are not supported. SMC128CF, SMC01GCF, SMC08GCF 5 Command interface Command interface There are two types of bus cycles and timing sequences that occur in the PCMCIA type interface, direct mapped I/O transfer and memory access. Three types of bus cycles are also available in true IDE interface type: PIO transfer, multi-word DMA transfer and Ultra DMA transfer. Refer to CF specification 3.0 for details about read and write timing parameters and relative timing diagrams. In order to set the card mode, the -OE (-ATASEL) signal must be set and kept stable before applying VCC until the reset phase is completed. To place the card in memory mode or I/O mode, -OE(-ATASEL) must be driven High, while it must be driven Low to place the card in true IDE mode. 19/29 Card configuration 6 SMC128CF, SMC01GCF, SMC08GCF Card configuration Refer to paragraph 4.4 of CF specification 3.0. 7 Host configuration requirements The CompactFlash advanced timing modes include PCMCIA-style I/O modes that are faster than the original 250 ns cycle time (see Section 1: Description). Before configuring the card interface for the I/O mode, the host must ensure that all the cards connected to a given electrical interface support I/O transfers faster than 250 ns. These modes must be used in the conditions described in Section 4.4: Additional requirements for CompactFlash advanced timing mode. In particular, the host can be connected to one card only. Consequently, the host must not configure a card to operate in an CompactFlash advanced timing mode if two cards are sharing the same I/O lines in master/slave operation, or if it is connected to the card through a cable which length exceeds 0.15 m. The load presented to the host by cards supporting Ultra DMA is more controlled than that presented by other CompactFlash cards. Therefore, the use of a card that does not support Ultra DMA in a master/slave arrangement with a Ultra DMA card can affect the critical timing of the Ultra DMA transfers. The host shall not configure a card into Ultra DMA mode when a card not supporting Ultra DMA is also present on the same interface. When the use of two cards on an interface is otherwise permitted, the host may use any mode that is supported by both cards, but to achieve maximum performance it should use its highest performance mode that is also supported by both cards. 8 Software interface Refer to section 6.1 of CF specification version 3.0. 9 CF-ATA registers Refer to section 6.1.5 of CF specification version 3.0. 10 CF-ATA command description Refer to section 6.2 of CF specification version 3.0. 20/29 SMC128CF, SMC01GCF, SMC08GCF 11 CIS information (typical) CIS information (typical) -------0000: Code 01, link 04 DF 79 01 FF -------– Tuple CISTPL_DEVICE (01), length 4 (04) – Device type is FUNCSPEC – Extended speed byte used – Device speed is 80ns – Write protect switch is not in control – Device size is 2K bytes -------000C: Code 1C, link 05 02 DF 79 01 FF -------– Tuple CISTPL_DEVICE_OC (1C), length 5 (05) – Device conditions: VCC = 3.3V – Device type is FUNCSPEC – Extended speed byte used – Device speed is 80ns – Write protect switch is not in control – Device size is 2K bytes -------001A: Code 18, link 02 DF 01 -------– Tuple CISTPL_JEDEC_C (18), length 2 (02) – Device 0 JEDEC id: Manufacturer DF, ID 01 -------0022: Code 20, link 04 0A 00 00 00 -------– Tuple CISTPL_MANFID (20), length 4 (04) – Manufacturer # 0x000A hardware rev 0.00 -------002E: Code 15, link 12 04 01 53 54 4D 00 53 54 4D 2D x x x x 42 00 00 FF 21/29 CIS information (typical) SMC128CF, SMC01GCF, SMC08GCF -------– Tuple CISTPL_VERS_1 (15), length 18 (12) – Major version 4, minor version 1 – Product Information: Manufacturer: ‘Numonyx’, – Product name: ‘Numonyx-xxxxB’ -------0056: Code 21, link 02 04 01 -------– Tuple CISTPL_FUNCID (21), length 2 (02) – Function code 04 (Fixed Disk), system init 01 -------005E: Code 22, link 02 01 01 -------– Tuple CISTPL_FUNCE (22), length 2 (02) – This is a PC Card ATA Disk -------0066: Code 22, link 03 02 0C 0F -------– Tuple CISTPL_FUNCE (22), length 3 (03) – VPP is not required – This is a silicon device – Identify Drive Model/Serial Number is guaranteed unique – Low-Power Modes supported: Sleep Standby Idle – Drive automatically minimizes power – All modes include 3F7 or 377 – Index bit is not supported – -IOIS16 is unspecified in Twin configurations -------0070: Code 1A, link 05 01 03 00 02 0F -------– Tuple CISTPL_CONFIG (1A), length 5 (05) – Last valid configuration index is 3 – – – – – 22/29 Configuration Register Base Address is 200 Configuration Registers Present: Configuration Option Register at 200 Card Configuration and Status Register at 202 Pin Replacement Register at 204 Socket and Copy Register at 206 SMC128CF, SMC01GCF, SMC08GCF CIS information (typical) -------007E: Code 1B, link 08 C0 C0 A1 01 55 08 00 20 -------– Tuple CISTPL_CFTABLE_ENTRY (1B), length 8 (08) – Configuration Table Index is 00 (default) – Interface type is Memory – BVDs not active, WP not active, RdyBsy active – Wait signal support required – VCC Power Description: Nom V = 5.0 V – map 2048 bytes of memory to Card address 0 – Miscellaneous Features: Max Twins 0, -Audio, -ReadOnly, +PowerDown -------0092: Code 1B, link 06 00 01 21 B5 1E 4D -------– Tuple CISTPL_CFTABLE_ENTRY (1B), length 6 (06) – Configuration Table Index is 00 – VCC Power Description: Nom V = 3.30 V, Peak I = 45.0 mA -------00A2: Code 1B, link 0A C1 41 99 01 55 64 F0 FF FF 20 -------– Tuple CISTPL_CFTABLE_ENTRY (1B), length 10 (0A) – Configuration Table Index is 01 (default) – Interface type is I/O – BVDs not active, WP not active, RdyBsy active – Wait signal support not required – VCC Power Description: Nom V = 5.0 V – Decode 4 I/O lines, bus size 8 or 16 – IRQ may be shared, pulse and level mode interrupts are supported – Interrupts in mask FFFF are supported – Miscellaneous Features: Max Twins 0, -Audio, -ReadOnly, +PowerDown -------00BA: Code 1B, link 06 01 01 21 B5 1E 4D -------Tuple CISTPL_CFTABLE_ENTRY (1B), length 6 (06) Configuration Table Index is 01 VCC Power Description: Nom V = 3.30 V, 23/29 CIS information (typical) SMC128CF, SMC01GCF, SMC08GCF Peak I = 45.0 mA -------00CA: Code 1B, link 0F C2 41 99 01 55 EA 61 F0 01 07 F6 03 01 EE 20 -------– Tuple CISTPL_CFTABLE_ENTRY (1B), length 15 (0F) – Configuration Table Index is 02 (default) – Interface type is I/O – BVDs not active, WP not active, RdyBsy active – Wait signal support not required – VCC Power Description: – Nom V = 5.0 V – Decode 10 I/O lines, bus size 8 or 16 – I/O block at 01F0, length 8 – I/O block at 03F6, length 2 – IRQ may be shared, pulse and level mode interrupts are supported – Only IRQ14 is supported – Miscellaneous Features: Max Twins 0, -Audio, -ReadOnly, +PowerDown -------00EC: Code 1B, link 06 02 01 21 B5 1E 4D -------– Tuple CISTPL_CFTABLE_ENTRY (1B), length 6 (06) – Configuration Table Index is 02 – VCC Power Description: Nom V = 3.30 V, Peak I = 45.0 mA -------00FC: Code 1B, link 0F C3 41 99 01 55 EA 61 70 01 07 76 03 01 EE 20 -------- 24/29 – Tuple CISTPL_CFTABLE_ENTRY (1B), length 15 (0F) – Configuration Table Index is 03 (default) – Interface type is I/O – BVDs not active, WP not active, RdyBsy active – Wait signal support not required – VCC Power Description: Nom V = 5.0 V – Decode 10 I/O lines, bus size 8 or 16 – I/O block at 0170, length 8 – I/O block at 0376, length 2 – IRQ may be shared, pulse and level mode interrupts are supported – Only IRQ14 is supported – Miscellaneous Features: Max Twins 0, -Audio, -ReadOnly, +PowerDown SMC128CF, SMC01GCF, SMC08GCF CIS information (typical) -------011E: Code 1B, link 06 03 01 21 B5 1E 4D -------– Tuple CISTPL_CFTABLE_ENTRY (1B), length 6 (06) – Configuration Table Index is 03 – VCC Power Description: Nom V = 3.30 V, Peak I = 45.0 mA -------012E: Code 14, link 00 -------– Tuple CISTPL_NO_LINK (14), length 0 (00) -------0134: Code FF -------– Tuple CISTPL_END (FF) 25/29 Package mechanical SMC128CF, SMC01GCF, SMC08GCF 12 Package mechanical Figure 2. Type I CompactFlash memory card dimensions 1.60mm ± 0.5 (0.063in ± 0.002) 26 50 0.99mm± 0.05 (0.039in ± 0.002) 1.65mm (0.130in) 4X R 0.5mm ± 0.1 (4X R 0.020in ± 0.004) 25 1.01mm ± 0.07 (0.039in ± 0.003) 2.44mm ± 0.07 (0.096in ± 0.003) 2.15mm ± 0.07 (0.085in ± 0.003) 2X 3.00mm ± 0.07 (2X 0.118in ± 0.003) 36.40mm ± 0.15 (1.433in ± 0.006) Optional Configuration (see note) TO P 2X 25.78mm ± 0.07 (2X 1.015in ± 0.003) 2X 12.00mm ± 0.1 (2X 0.472in ± 0.004) 3.30mm ± 0.10 (0.130in ± 0.004) 1 1.01mm ± 0.07 (0.039in ± 0.003) 0.76mm ± 0.07 (0.030in ± 0.003) 41.66mm ± 0.13 (1.640in ± 0.005) 42.80mm ± 0.10 (1.685in ± 0.004) 0.63mm ± 0.07 (0.025in ± 0.003) AI04301b 26/29 SMC128CF, SMC01GCF, SMC08GCF 13 Ordering information Ordering information Table 15. Ordering information scheme Example: SMC 01G C F C 6 E Memory card standard SMC = storage medium, CompactFlash Density 128 = 128 Mbytes 01G = 1 Gbyte 08G = 8 Gbytes Options of the standard C = CF type F3 Memory type F = flash memory Card version B(1), C(2), D(3)= version depending on device technology Temperature range 6 = -40 to 85 °C Packing Blank = standard packing (tray) E = lead-free package, standard packing (tray) 1. Only for 128-Mbyte devices. 2. Only for 1-Gbyte devices. 3. Only for 8-Gbyte devices. Note: Other digits may be added to the ordering code for pre-programmed parts or other options. Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available products and for further information on any aspect of these devices, please contact your nearest Numonyx sales office. 27/29 Revision history 14 SMC128CF, SMC01GCF, SMC08GCF Revision history Table 16. 28/29 Document revision history Date Revision Changes 23-Dec-2008 1 Initial release. 12-Mar-2009 2 Document status promoted from target specification to preliminary data. Added SMC128CF root part number throughout the document. 05-May-2009 3 Added references to flash memory power-down logic, flash memory write protect control, and power loss protection on the first page. SMC128CF, SMC01GCF, SMC08GCF Please Read Carefully: INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Numonyx may make changes to specifications and product descriptions at any time, without notice. Numonyx, B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting Numonyx's website at http://www.numonyx.com. Numonyx StrataFlash is a trademark or registered trademark of Numonyx or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright © 11/5/7, Numonyx, B.V., All Rights Reserved. 29/29