1N825

TECHNICAL DATA SHEET 6 Lake Street, Lawrence, MA 01841 1-800-446-1158 / (978) 620-2600 / Fax: (978) 689-0803 Website: http://www.microsemi.com Gort Road Business Park, Ennis, Co. Clare, Ireland Tel: +353 (0) 65 6840044 Fax: +353 (0) 65 6822298 ZENER DIODE – Monolithic Temperature Compensated Zener Reference Chips – All Junctions Completely Protected with Silicon Dioxide – Electrically Equivalent to 1N821 Thru 1N829 – Compatible with all Wire Bonding and Die Attach Techniques with the Exception of Solder Reflow Qualified per MIL-PRF-19500/159 DEVICES QUALIFIED LEVELS 1N821 1N823 1N825 1N827 1N829 JANHC JANKC (For 1N821 thru 1N829) MAXIMUM RATING AT 25°C Operating Temperature: -65°C to +175°C Storage Temperature: -65°C to +175°C REVERSE LEAKAGE CURRENT IR = 2μA @ 25°C & VR = 3Vdc ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise specified) TYPE NUMBER ZENER VOLTAGE ZENER TEST CURRENT IZT MAXIMUM ZENER IMPEDANCE ZZT (Note 1) -55° to +100° VOLTAGE TEMPERATURE STABILITY 3 VZT (Note 2) EFFECTIVE TEMPERATURE COEFFICIENT A T C VZT @ IZT 1N821 1N823 1N825 1N827 1N829 VOLTS 5.9 – 6.5 5.9 – 6.5 5.9 – 6.5 5.9 – 6.5 5.9 – 6.5 mA 7.5 7.5 7.5 7.5 7.5 OHMS 15 15 15 15 15 mV 96 48 19 9 5 % / °C 0.01 0.005 0.002 0.001 0.0005 NOTE: 1. Zener impedance is derived by superimposing on IZT A 60Hz rms a.c. current equal to 10% of IZT. 2. The maximum allowable change observed over the entire temperature range i.e., the diode voltage will not exceed the specified mV at any discrete temperature between the established limits, per JEDEC standard No.5 LDS-0071 Rev. 2 (101557) Page 1 of 2 TECHNICAL DATA SHEET 6 Lake Street, Lawrence, MA 01841 1-800-446-1158 / (978) 620-2600 / Fax: (978) 689-0803 Website: http://www.microsemi.com Gort Road Business Park, Ennis, Co. Clare, Ireland Tel: +353 (0) 65 6840044 Fax: +353 (0) 65 6822298 PACKAGE DIMENSIONS Dimensions Inches Millimeters Min Max Min Max .0280 .0320 .711 .813 .0080 .0100 .203 .254 .0104 .0106 .264 .269 .0019 .0021 .048 .053 .0054 .0056 .137 .142 .0020 .0040 .050 .102 .0280 .0320 .711 .813 .0030 .0050 .076 .127 .0030 .0050 .076 .127 .0209 .0211 .531 .536 .0080 .0100 .203 .254 .0104 .0106 .264 .269 .0059 .0061 .150 .155 Symbol A B C D E F G H J K L M N Backside must be electrically isolated to ensure proper performance. DESIGN DATA Metallization: Top: 1 (Cathode) 2 (Anode) 3 (Test pad) Back: Al thickness Gold thickness Chip thickness Al Al Al Au 25,000Å minimum. 4,000Å minimum. .010 inch (0.25 mm) ±0.002 inch (+0.05 mm). Circuit layout data: For zener operation, cathode must be operated positive with respect to anode. Test pad is for wire bond evaluation only. No electrical contact is made with test pad. NOTES: 1. Dimensions are in inches unless otherwise indicated. 2. Millimeters are given for general information only. 3. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology. JANHC and JANKC (A-version) die dimensions. LDS-0071 Rev. 2 (101557) Page 2 of 2