APT14M100B APT14M100S
1000V, 14A, 0.90Ω Max
N-Channel MOSFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
TO
-2
47
D3PAK
APT14M100B Single die MOSFET
APT14M100S
D
G S
FEATURES
• Fast switching with low EMI/RFI • Low RDS(on) • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant
TYPICAL APPLICATIONS
• PFC and other boost converter • Buck converter • Two switch forward (asymmetrical bridge) • Single switch forward • Flyback • Inverters
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 14 9 56 ±30 875 7
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RθJC RθCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight 0.22 6.2 10 1.1 -55 0.11 150 300 Min Typ Max 500 0.25 Unit W °C/W
°C
2-2007 050-8105 Rev A
oz g in·lbf N·m
Torque
Mounting Torque ( TO-264 Package), 4-40 or M3 screw
Microsemi Website - http://www.microsemi.com
Static Characteristics
Symbol
VBR(DSS) ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS
TJ = 25°C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 7A
APT14M100B_S
Typ 1.15 Max Unit V V/°C Ω V mV/°C µA nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 1000
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
VGS = VDS, ID = 1mA VDS = 1000V VGS = 0V TJ = 25°C TJ = 125°C
3
0.73 4 -10
0.90 5 100 500 ±100
VGS = ±30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25°C unless otherwise specified
Test Conditions VDS = 50V, ID = 7A
VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 16 3965 55 335 135
Max
Unit S
pF
5
VGS = 0V, VDS = 0V to 667V
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 7A, VDS = 500V Resistive Switching VDD = 667V, ID = 7A RG = 4.7Ω 6 , VGG = 15V
70 120 21 60 18 16 60 15 nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 14
Unit A
G S
56 1 1065 22 10 V ns µC V/ns
ISD = 7A, TJ = 25°C, VGS = 0V ISD = 7A, VDD = 100V 3 diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 7A, di/dt ≤1000A/µs, VDD = 667V, TJ = 125°C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 35.71mH, RG = 4.7Ω, IAS = 7A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -1.15E-7/VDS^2 + 2.03E-8/VDS + 3.93E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
050-8105
Rev A
2-2007
45 40 ID, DRAIN CURRENT (A) 35 30 25 20 15 10 5 0
V
GS
= 10V
16 14
TJ = -55°C
APT14M100B_S
T = 125°C
J
V
GS
= 6, 7, 8 & 9V
ID, DRIAN CURRENT (A)
12 10 8 6 4 2 0 0
4.5V
TJ = 25°C
5V
TJ = 125°C
TJ = 150°C
30 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
NORMALIZED TO VGS = 10V @ 7A
30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
3.0 2.5 2.0 1.5 1.0 0.5
60 50 ID, DRAIN CURRENT (A) 40
VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @