APT17F100B APT17F100S
1000V, 17A, 0.78Ω Max, trr ≤245ns
N-Channel FREDFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency.
TO -2 47
D3PAK
APT17F100B
APT17F100S
D
Single die FREDFET
G S
FEATURES
• Fast switching with low EMI • Low trr for high reliability • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant
TYPICAL APPLICATIONS
• ZVS phase shifted and other full bridge • Half bridge • PFC and other boost converter • Buck converter • Single and two switch forward • Flyback
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 17 11 70 ±30 1070 9
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RθJC RθCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) 0.22 Package Weight 5.9 10 Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw 1.1 MicrosemiWebsite-http://www.microsemi.com N·m -55 0.11 150 °C 300 oz g in·lbf
04-2009 050-8159 Rev C
Min
Typ
Max 625 0.20
Unit W °C/W
Static Characteristics
Symbol
VBR(DSS) ΔVBR(DSS)/ΔTJ RDS(on) VGS(th) ΔVGS(th)/ΔTJ IDSS IGSS
TJ = 25°C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 9A VGS = VDS, ID = 1mA VDS = 1000V VGS = 0V TJ = 25°C TJ = 125°C
APT17F100B_S
Typ 1.15 0.67 4 -10 Max Unit V V/°C Ω V mV/°C µA nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 1000
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
2.5
0.78 5 250 1000 ±100
VGS = ±30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25°C unless otherwise specified
Test Conditions VDS = 50V, ID = 9A
VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 19 4845 65 405 165
Max
Unit S
pF
VGS = 0V, VDS = 0V to 667V
5
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 9A, VDS = 500V Resistive Switching VDD = 667V, ID = 9A RG = 4.7Ω 6 , VGG = 15V
85 150 26 70 29 31 105 28
nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr Irrm dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 17
Unit
G S
A 65 1.0 245 465 V ns µC A 25 V/ns
ISD = 9A, TJ = 25°C, VGS = 0V TJ = 25°C TJ = 125°C ISD = 9A 3 diSD/dt = 100A/µs VDD = 100V TJ = 25°C TJ = 125°C TJ = 25°C TJ = 125°C ISD ≤ 9A, di/dt ≤1000A/µs, VDD = 400V, TJ = 125°C
215 385 1.02 2.57 9.03 12.83
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 26.42mH, RG = 25Ω, IAS = 9A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%.
04-2009 Rev C
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -1.41E-8/VDS^2 + 2.48E-9/VDS + 4.81E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
050-8159
APT17F100B_S
40
V
GS
14
= 10V T = 125°C
J
35
TJ = -55°C
12 ID, DRIAN CURRENT (A)
V
GS
ID, DRAIN CURRENT (A)
30 25 20
TJ = 25°C
= 6, 7, 8 & 9V
10 8 6 4 2 0
4.5V 5V
15 10 5 0
TJ = 125°C TJ = 150°C
0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
0
5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
3.0
NORMALIZED TO VGS = 10V @ 9A
60
VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @