APT41F100J_10

APT41F100J 1000V, 42A, 0.20Ω Max, trr ≤400ns N-Channel FREDFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. S G D S SO 2 T- 27 "UL Recognized" ISOTOP ® file # E145592 APT41F100J Single die FREDFET G D S FEATURES • Fast switching with low EMI • Low trr for high reliability • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant TYPICAL APPLICATIONS • ZVS phase shifted and other full bridge • Half bridge • PFC and other boost converter • Buck converter • Single and two switch forward • Flyback Absolute Maximum Ratings Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive 1 Ratings 42 27 260 ±30 4075 33 Unit A V mJ A Thermal and Mechanical Characteristics Symbol PD RθJC RθCS TJ,TSTG VIsolation WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.) Package Weight -55 2500 1.03 29.2 10 1.1 0.15 150 Min Typ Max 960 0.13 Unit W °C/W °C V oz g in·lbf N·m Rev B 04-2009 050-8128 Torque Terminals and Mounting Screws. Microsemi Website - http://www.microsemi.com Static Characteristics Symbol VBR(DSS) ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS TJ = 25°C unless otherwise specified Test Conditions VGS = 0V, ID = 250μA Reference to 25°C, ID = 250μA VGS = 10V, ID = 33A VGS = VDS, ID = 5mA VDS = 1000V VGS = 0V TJ = 25°C TJ = 125°C APT41F100J Typ 1.15 0.18 4 -10 Max Unit V V/°C Ω V mV/°C μA nA Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance 3 Min 1000 Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current 2.5 0.20 5 250 1000 ±100 VGS = ±30V Dynamic Characteristics Symbol gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf 4 TJ = 25°C unless otherwise specified Test Conditions VDS = 50V, ID = 33A VGS = 0V, VDS = 25V f = 1MHz Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related Min Typ 75 18500 245 1555 635 Max Unit S pF VGS = 0V, VDS = 0V to 667V 5 Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time VGS = 0 to 10V, ID = 33A, VDS = 500V Resistive Switching VDD = 667V, ID = 33A RG = 2.2Ω 6 , VGG = 15V 325 570 100 270 55 55 235 55 nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD trr Qrr Irrm dv/dt Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Min D Typ Max 42 Unit G S A 260 1.0 400 800 3.3 8.0 17.2 24.6 25 V ns μC A V/ns ISD = 33A, TJ = 25°C, VGS = 0V TJ = 25°C TJ = 125°C ISD = 33A 3 VDD = 100V diSD/dt = 100A/μs TJ = 25°C TJ = 125°C TJ = 25°C TJ = 125°C ISD ≤ 33A, di/dt ≤1000A/μs, VDD = 667V, TJ = 125°C 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 7.48mH, RG = 25Ω, IAS = 33A. 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 04-2009 Rev B 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -5.37E-7/VDS^2 + 9.48E-8/VDS + 1.83E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. 050-8128 180 160 ID, DRAIN CURRENT (A) APT41F100J V GS = 10V 60 T = 125°C J V GS = 6, 7, 8 & 9V 120 100 80 60 40 20 0 TJ = 150°C TJ = 125°C TJ = 25°C ID, DRIAN CURRENT (A) 140 TJ = -55°C 50 40 30 5V 20 10 0 4.5V 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics NORMALIZED TO VGS = 10V @ 33A 0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 3.0 2.5 2.0 1.5 1.0 0.5 250 VDS> ID(ON) x RDS(ON) MAX. 250 μSEC. PULSE TEST @