APT48M80B2

APT48M80B2 APT48M80L 800V, 49A, 0.19Ω Max N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar strip design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. T-Max® TO-264 APT48M80B2 APT48M80L D Single die MOSFET G S FEATURES • Fast switching with low EMI/RFI • Low RDS(on) • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant TYPICAL APPLICATIONS • PFC and other boost converter • Buck converter • Two switch forward (asymmetrical bridge) • Single switch forward • Flyback • Inverters Absolute Maximum Ratings Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current 1 Ratings 49 30 173 ±30 1979 24 Unit A Gate - Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive V mJ A Thermal and Mechanical Characteristics Symbol PD RθJC RθCS TJ, TSTG TL WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight Min -55 Torque Mounting Torque (TO-264 Package), 4-40 or M3 screw Typ 0.11 0.22 6.2 Max 1135 0.11 150 300 10 1.1 °C oz g in·lbf N·m 5-2009 050-8162 Rev B Unit W °C/W Microsemi Website - http://www.microsemi.com Static Characteristics Symbol VBR(DSS) ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS Parameter Drain-Source Breakdown Voltage TJ = 25°C unless otherwise specified Test Conditions VGS = 0V, ID = 250μA Reference to 25°C, ID = 250μA APT48M80B2_L Typ 0.87 0.17 3 4 -10 100 500 ±100 0.19 5 Max Unit V V/°C Ω V mV/°C μA nA Min 800 Breakdown Voltage Temperature Coefficient Drain-Source On Resistance 3 VGS = 10V, ID = 24A VGS = VDS, ID = 2.5mA VDS = 800V VGS = 0V TJ = 25°C TJ = 125°C Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current VGS = ±30V Dynamic Characteristics Symbol Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance 4 5 TJ = 25°C unless otherwise specified Test Conditions VDS = 50V, ID = 24A VGS = 0V, VDS = 25V f = 1MHz Min Typ 43 9330 160 930 VGS = 0V, VDS = 0V to 533V Max Unit S gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf pF Effective Output Capacitance, Charge Related Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time 440 220 305 51 155 55 VGS = 0 to 10V, ID = 24A, VDS = 400V nC Resistive Switching VDD = 400V, ID = 24A RG = 2.2Ω , VGG = 15V 6 75 230 70 ns Source-Drain Diode Characteristics Symbol IS ISM VSD trr Qrr dv/dt 1 2 3 4 5 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) G S D Min Typ Max 49 173 Unit A V nS μC ISD = 24A, TJ = 25°C, VGS = 0V ISD = 24A 3 diSD/dt = 100A/μs, TJ = 25°C ISD ≤ 24A, di/dt ≤1000A/μs, VDD = 533V, TJ = 125°C 0.8 970 22 1.0 10 V/ns Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. Starting at TJ = 25°C, L = 6.9mH, RG = 25Ω, IAS = 24A. Pulse test: Pulse Width < 380μs, duty cycle < 2%. Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -8.32E-8/VDS^2 + 3.49E-8/VDS + 1.30E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. 050-8162 Rev B 5-2009 100 V GS 50 = 10V T = 125°C APT48M80B2_L J V TJ = -55°C GS = 10&15V 6V 5.5V 80 ID, DRAIN CURRENT (A) ID, DRIAN CURRENT (A) 40 60 TJ = 25°C 30 5V 40 TJ = 125°C 20 20 TJ = 150°C 10 4.5V 4V 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics NORMALIZED TO VGS = 10V @ 24A 0 0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics VDS> ID(ON) x RDS(ON) MAX. RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 3.0 2.5 2.0 1.5 1.0 0.5 160 140 ID, DRAIN CURRENT (A) 120 100 80 60 40 20 0 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics Ciss TJ = -55°C TJ = 25°C TJ = 125°C 250 μSEC. PULSE TEST @