APT56F50B2 APT56F50L
500V, 56A, 0.10Ω Max, trr ≤280ns
N-Channel FREDFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency.
T-Max®
TO-264
APT56F50B2
APT56F50L
D
Single die FREDFET
G S
FEATURES
• Fast switching with low EMI • Low trr for high reliability • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant
TYPICAL APPLICATIONS
• ZVS phase shifted and other full bridge • Half bridge • PFC and other boost converter • Buck converter • Single and two switch forward • Flyback
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 56 35 175 ±30 1200 28
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RθJC RθCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight 0.22 6.2 10 1.1 -55 0.11 150 300 Min Typ Max 780 0.16 Unit W °C/W
°C
3-2007 050-8129 Rev A
oz g in·lbf N·m
Torque
Mounting Torque ( TO-264 Package), 4-40 or M3 screw
Microsemi Website - http://www.microsemi.com
Static Characteristics
Symbol
VBR(DSS) ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS
TJ = 25°C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 28A
APT56F50B2_L
Typ 0.60 0.085 4 -10 Max Unit V V/°C Ω V mV/°C µA nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 500
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
VGS = VDS, ID = 2.5mA VDS = 500V VGS = 0V TJ = 25°C TJ = 125°C
3
0.10 5 250 1000 ±100
VGS = ±30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25°C unless otherwise specified
Test Conditions VDS = 50V, ID = 28A
VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 43 8800 120 945 550
Max
Unit S
pF
5
VGS = 0V, VDS = 0V to 333V
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 28A, VDS = 250V Resistive Switching VDD = 333V, ID = 28A RG = 4.7Ω 6 , VGG = 15V
275 220 50 100 38 45 100 33 nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr Irrm dv/dt
Parameter
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 38
Unit A
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Peak Recovery dv/dt
G S
TJ = 25°C TJ = 125°C
175 1.0 280 520 1.20 3.07 10.1 14.5 20 V ns µC A V/ns
ISD = 28A, TJ = 25°C, VGS = 0V
ISD = 28A 3 diSD/dt = 100A/µs VDD = 100V
TJ = 25°C TJ = 125°C TJ = 25°C TJ = 125°C
ISD ≤ 28A, di/dt ≤1000A/µs, VDD = 333V, TJ = 125°C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 3.06mH, RG = 4.7Ω, IAS = 28A.
3-2007 Rev A 050-8129
3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -2.04E-7/VDS^2 + 4.76E-8/VDS + 1.36E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
200
V
GS
= 10V
100
TJ = -55°C
APT56F50B2_L
T = 125°C
J
90 80 ID, DRIAN CURRENT (A) 70 60 50 40 30 20 10 0 0
V
GS
= 7 & 10V 6.5V
160 ID, DRAIN CURRENT (A)
120
TJ = 25°C
6V
80
5.5V
40
TJ = 125°C
TJ = 150°C
5V
0
25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
NORMALIZED TO VGS = 10V @ 28A
30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
2.5
175 150 ID, DRAIN CURRENT (A) 125 100 75 50 25 0 0
VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @