APT56M50B2

APT56M50B2 APT56M50L 500V, 56A, 0.10Ω Max N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. T-MaxTM TO-264 APT56M50B2 Single die MOSFET APT56M50L D G S FEATURES • Fast switching with low EMI/RFI • Low RDS(on) • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant TYPICAL APPLICATIONS • PFC and other boost converter • Buck converter • Two switch forward (asymmetrical bridge) • Single switch forward • Flyback • Inverters Absolute Maximum Ratings Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive 1 Ratings 56 35 175 ±30 1200 28 Unit A V mJ A Thermal and Mechanical Characteristics Symbol PD RθJC RθCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight 0.22 6.2 12 1.4 -55 0.11 150 300 Min Typ Max 780 0.16 Unit W °C/W °C 8-2006 050-8073 Rev A oz g in·lbf N·m Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw Microsemi Website - http://www.microsemi.com Static Characteristics Symbol VBR(DSS) ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS TJ = 25°C unless otherwise specified Test Conditions VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 28A APT56M50B2_L Typ 0.60 0.085 4 -10 Max Unit V V/°C Ω V mV/°C µA nA Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance 3 Min 500 Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current VGS = VDS, ID = 2.5mA VDS = 500V VGS = 0V TJ = 25°C TJ = 125°C 3 0.10 5 100 500 ±100 VGS = ±30V Dynamic Characteristics Symbol gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf 4 TJ = 25°C unless otherwise specified Test Conditions VDS = 50V, ID = 28A VGS = 0V, VDS = 25V f = 1MHz Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time Min Typ 42 8800 120 945 550 275 220 50 100 38 45 100 33 Max Unit S VGS = 0V, VDS = 0V to 333V Co(er) = -2.04E-7 2 VDS pF 5 + 4.76E-8 VDS + 1.36E-10 VGS = 0 to 10V, ID = 28A, VDS = 250V Resistive Switching VDD = 333V, ID = 28A RG = 4.7Ω 6 , VGG = 15V nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD trr Qrr dv/dt Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Min D Typ Max 100 Unit A G S 200 1 660 13.2 8 V ns µC V/ns ISD = 28A, TJ = 25°C, VGS = 0V ISD = 28A 3 diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 28A, di/dt ≤1000A/µs, VDD = 333V, TJ = 125°C 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 3.06mH, RG = 4.7Ω, IAS = 28A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of VDSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of VDSS. The equation in the test conditions box can be used to calculate Co(er) for any value of VDS less than VDSS. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. 050-8073 Rev A 8-2006 200 V GS = 10V 100 TJ = -55°C APT56M50B2_L T = 125°C J 90 80 ID, DRIAN CURRENT (A) 70 60 50 40 30 20 10 0 0 160 ID, DRAIN CURRENT (A) V GS = 7,8 & 10V 6V 120 TJ = 25°C 80 40 TJ = 125°C TJ = 150°C 5V 4.5V 0 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics NORMALIZED TO VGS = 10V @ 28A 30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 2.5 175 150 ID, DRAIN CURRENT (A) 125 100 75 50 25 0 0 VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @