APT56M60B2_09

APT56M60B2 APT56M60L 600V, 60A, 0.11Ω Max N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. T-MaxTM TO-264 APT56M60B2 APT56M60L D Single die MOSFET G S FEATURES • Fast switching with low EMI/RFI • Low RDS(on) • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant TYPICAL APPLICATIONS • PFC and other boost converter • Buck converter • Two switch forward (asymmetrical bridge) • Single switch forward • Flyback • Inverters Absolute Maximum Ratings Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive 1 Ratings 60 38 210 ±30 1580 28 Unit A V mJ A Thermal and Mechanical Characteristics Symbol PD RθJC RθCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) 0.22 Package Weight 6.2 10 Torque Mounting Torque ( TO-264 Package), 4-40 or M3 screw 1.1 MicrosemiWebsite-http://www.microsemi.com N·m -55 0.11 150 °C 300 oz g in·lbf 04-2009 050-8086 Rev E Min Typ Max 1040 0.12 Unit W °C/W Static Characteristics Symbol VBR(DSS) ΔVBR(DSS)/ΔTJ RDS(on) VGS(th) ΔVGS(th)/ΔTJ IDSS IGSS TJ = 25°C unless otherwise specified Test Conditions VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 28A VGS = VDS, ID = 2.5mA VDS = 600V VGS = 0V TJ = 25°C TJ = 125°C APT56M60B2_L Typ 0.57 0.09 4 -10 Max Unit V V/°C Ω V mV/°C µA nA Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance 3 Min 600 Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current 3 0.11 5 100 500 ±100 VGS = ±30V Dynamic Characteristics Symbol gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf 4 TJ = 25°C unless otherwise specified Test Conditions VDS = 50V, ID = 28A VGS = 0V, VDS = 25V f = 1MHz Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related Min Typ 55 11300 115 1040 550 Max Unit S pF VGS = 0V, VDS = 0V to 400V 5 Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time VGS = 0 to 10V, ID = 28A, VDS = 300V Resistive Switching VDD = 400V, ID = 28A RG = 2.2Ω 6 , VGG = 15V 285 280 60 120 65 75 190 60 nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD trr Qrr dv/dt Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Min D Typ Max 60 Unit G S A 210 1.0 745 19 8 V ns µC V/ns ISD = 28A, TJ = 25°C, VGS = 0V ISD = 28A 3 diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 28A, di/dt ≤1000A/µs, VDD = 100V, TJ = 125°C 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 4.03mH, RG = 25Ω, IAS = 28A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -1.10E-7/VDS^2 + 4.60E-8/VDS + 1.72E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. Rev E 050-8086 04-2009 APT56M60B2_L 250 V GS 90 = 10V T = 125°C J 80 V 200 ID, DRAIN CURRENT (A) GS = 7&8V ID, DRIAN CURRENT (A) TJ = -55°C 70 60 50 40 30 20 10 0 0 5V 4.5V 5.5V 6V 150 TJ = 25°C 100 50 TJ = 150°C TJ = 125°C 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 3.0 NORMALIZED TO VGS = 10V @ 28A 200 VDS> ID(ON) x RDS(ON) MAX. 180 160 ID, DRAIN CURRENT (A) 140 120 100 80 60 40 20 2.5 250µSEC. PULSE TEST @