APT7F100S

APT7F100B APT7F100S 1000V, 7A, 2.0Ω Max N-Channel FREDFET POWER MOS 8® is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. TO -2 47 D3PAK APT7F100B APT7F100S G D Single die FREDFET S FEATURES • Fast switching with low EMI • Low trr for high reliability • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant TYPICAL APPLICATIONS • ZVS phase shifted and other full bridge • Half bridge • PFC and other boost converter • Buck converter • Single and two switch forward • Flyback Absolute Maximum Ratings Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive 1 Ratings 7 5 27 ±30 415 4 Unit A V mJ A Thermal and Mechanical Characteristics Symbol PD RθJC RθCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight 0.22 6.2 10 1.1 -55 0.15 150 300 Min Typ Max 290 0.43 Unit W °C/W °C oz g in·lbf N·m Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw Microsemi Website - http://www.microsemi.com 050-8166 Rev B 05-2009 Static Characteristics Symbol ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS VBR(DSS) Parameter Drain-Source Breakdown Voltage TJ = 25°C unless otherwise specified VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 4A APT7F100B_S Typ 1.15 1.76 4 -10 Max Unit V V/°C Ω V mV/°C 250 1000 ±100 µA nA Test Conditions Min 1000 2.0 5 Breakdown Voltage Temperature Coefficient Drain-Source On Resistance 3 Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current VGS = VDS, ID = 0.5mA VDS = 1000V VGS = 0V TJ = 25°C TJ = 125°C 2.5 VGS = ±30V Dynamic Characteristics Symbol gfs Ciss Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance TJ = 25°C unless otherwise specified Test Conditions VDS = 50V, ID = 4A VGS = 0V, VDS = 25V f = 1MHz Min Typ 7.5 1800 25 158 65 Max Unit S Crss Coss Co(cr) Co(er) Qgs Qgd td(on) tr td(off) tf Qg 4 Effective Output Capacitance, Charge Related VGS = 0V, VDS = 0V to 670V pF 5 Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time VGS = 0 to 10V, ID = 4A, VDS = 500V Resistive Switching RG = 10Ω 6 , VGG = 15V VDD = 670V, ID = 4A 33 58 10 27 24 26 77 22 nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD trr Qrr Irrm dv/dt Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Min D Typ Max 7 Unit A G S TJ = 25°C 27 133 209 .56 1.2 7 9 1.3 152 251 V ns µC A 25 V/ns ISD = 4A, TJ = 25°C, VGS = 0V TJ = 125°C TJ = 25°C TJ = 125°C TJ = 25°C TJ = 125°C ISD ≤ 4A, di/dt ≤1000A/µs, VDD = 500V, TJ = 125°C diSD/dt = 100A/µs VDD = 100V ISD = 4A 3 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 53mH, RG = 25Ω, IAS = 4A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 050-8166 Rev B 05-2009 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -3.43E-8/VDS^2 + 1.44E-8/VDS + 5.38E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. 20 18 ID, DRAIN CURRENT (A) 16 14 12 10 8 6 4 2 0 V GS = 10V 8 7 APT7F100B_S T = 125°C J V ID, DRIAN CURRENT (A) TJ = -55°C 6 5 4 3 2 1 0 0 GS = 6, 7, 8 & 9V TJ = 25°C 5V TJ = 125°C TJ = 150°C 4.5V 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics NORMALIZED TO VGS = 10V @ 4A 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @