APT7M120B APT7M120S
1200V, 8A, 2.1Ω Max
N-Channel MOSFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
TO -2 47
D3PAK
APT7M120B
APT7M120S
D
Single die MOSFET
G S
FEATURES
• Fast switching with low EMI/RFI • Low RDS(on) • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant
TYPICAL APPLICATIONS
• PFC and other boost converter • Buck converter • Two switch forward (asymmetrical bridge) • Single switch forward • Flyback • Inverters
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 8 5 28 ±30 575 3
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RθJC RθCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) 0.22 Package Weight 6.2 10 Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw 1.1 MicrosemiWebsite-http://www.microsemi.com N·m -55 0.11 150 °C 300
5-2009 050-8104 Rev B
Min
Typ
Max 335 0.37
Unit W °C/W
oz g in·lbf
Static Characteristics
Symbol
VBR(DSS) ΔVBR(DSS)/ΔTJ RDS(on) VGS(th) ΔVGS(th)/ΔTJ IDSS IGSS
TJ = 25°C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 3A VGS = VDS, ID = 1mA VDS = 1200V VGS = 0V TJ = 25°C TJ = 125°C
APT7M120B_S
Typ 1.41 1.50 4 -10 Max Unit V V/°C Ω V mV/°C µA nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 1200
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
3
2.1 5 100 500 ±100
VGS = ±30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25°C unless otherwise specified
Test Conditions VDS = 50V, ID = 3A
VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 8 2565 31 190 75
Max
Unit S
pF
VGS = 0V, VDS = 0V to 800V
5
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 3A, VDS = 600V Resistive Switching VDD = 800V, ID = 3A RG = 4.7Ω 6 , VGG = 15V
38 80 13 37 14 8 45 13
nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 8
Unit
G S
A 28 1.0 1165 18 10 V ns µC V/ns
ISD = 3A, TJ = 25°C, VGS = 0V ISD = 3A, VDD = 100V 3 diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 3A, di/dt ≤1000A/µs, VDD = 800V, TJ = 125°C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 127.78mH, RG = 4.7Ω, IAS = 3A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -1.17E-7/VDS^2 + 1.42E-8/VDS + 2.01E-11.
5-2009
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
050-8104
Rev B
APT7M120B_S
25
V
GS
8
= 10V T = 125°C
J
7 20 ID, DRAIN CURRENT (A)
TJ = -55°C
V
GS
= 6, 7, 8 & 9V
ID, DRIAN CURRENT (A)
6 5 4
5V
15
10
TJ = 25°C
3 2 1 0 0
4.5V
5
TJ = 125°C TJ = 150°C
0
0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
3.0
NORMALIZED TO VGS = 10V @ 3A
30
VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @