APT9F100S

APT9F100B APT9F100S 1000V, 9A, 1.6Ω Max, trr ≤200ns N-Channel FREDFET POWER MOS 8® is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. TO -24 7 D 3 PAK APT9F100B APT9F100S D Single die FREDFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI • ZVS phase shifted and other full bridge • Low trr for high reliability • Half bridge • Ultra low Crss for improved noise immunity • PFC and other boost converter • Low gate charge • Buck converter • Avalanche energy rated • Single and two switch forward • RoHS compliant • Flyback Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 9 Continuous Drain Current @ TC = 100°C 5 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 574 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 5 A 1 37 Thermal and Mechanical Characteristics Characteristic Min Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 337 RθJC Junction to Case Thermal Resistance 0.37 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw 0.15 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m 050-8169 Rev B 8-2011 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 1000 ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ VGS = 10V, ID = 5A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics VDS = 1000V Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Typ Max 1.15 1.28 4 -10 1.6 5 TJ = 25°C VGS = 0V 250 1000 ±100 TJ = 125°C VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Parameter gfs 2.5 VGS = VDS, ID = 1mA Threshold Voltage Temperature Coefficient IDSS Symbol Reference to 25°C, ID = 250μA Breakdown Voltage Temperature Coefficient RDS(on) APT9F100B_S Min Test Conditions VDS = 50V, ID = 5A VGS = 0V, VDS = 25V f = 1MHz Co(cr) 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Typ Max 10.0 2606 35 219 Unit S pF 85 VGS = 0V, VDS = 0V to 670V 46 Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time Resistive Switching Current Rise Time VDD = 670V, ID = 5A tr td(off) tf Turn-Off Delay Time 80 14 36 25 27 84 24 VGS = 0 to 10V, ID = 5A, VDS = 500V RG = 10Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge Irrm Reverse Recovery Current dv/dt Peak Recovery dv/dt Test Conditions Min Typ D MOSFET symbol showing the integral reverse p-n junction diode (body diode) A 37 S TJ = 25°C TJ = 125°C TJ = 25°C diSD/dt = 100A/μs TJ = 125°C VDD = 100V TJ = 25°C Unit 9 G ISD = 5A, TJ = 25°C, VGS = 0V ISD = 5A 3 Max TJ = 125°C ISD ≤ 5A, di/dt ≤1000A/μs, VDD = 500V, TJ = 125°C 172 286 .67 1.5 8 11 1.3 200 345 V ns μC A 25 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 53mH, RG = 25Ω, IAS = 4A. 050-8169 Rev B 8-2011 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -3.43E-8/VDS^2 + 1.44E-8/VDS + 5.38E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT9F100B_S 30 V GS 10 = 10V T = 125°C J V ID, DRIAN CURRENT (A) ID, DRAIN CURRENT (A) 8 TJ = -55°C 20 15 TJ = 25°C 10 5 0 6 5V 4 2 TJ = 125°C 4.5V TJ = 150°C 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 0 3.0 NORMALIZED TO VGS = 10V @ 5A 2.5 VDS> ID(ON) x RDS(ON) MAX. 250μSEC. PULSE TEST @