LX1705

LX1705 TM ® 8+8W Stereo Filterless Class-D Amplifier P RODUCTION D ATA S HEET DESCRIPTION KEY FEATURES Filter Free Operation 6W +6W Output Power @ 8Ω load: THD+N < 1% High Efficiency > 90% Full Audio Bandwidth: 20Hz to 20kHz Low Distortion < 0.25% @ 30% Max Power, 1kHz High Signal-to-Noise Ratio: 90dB Wide Supply Voltage Range 5.0V ~ 15V 5mA Per Channel Typical Quiescent Current Turn ON/OFF POP Free Standby / Mute Feature Built-in Under Voltage Lockout Thermal Protection W WW . Microsemi . C OM The LX1705 is a fully integrated stereo class-D CMOS audio amplifier. optimized for highly efficient operation and minimum system cost. The stereo BTL (Bridge-tied-load) configuration uses 3-level PWM modulation. This allows eliminating the LC filter to reduce the system cost and simplify the system design. The LX1705 outputs 8W into each of two channels with better than 90% efficiency. The entire signal path from input to output is differential to reject any sources of common-mode noise or distortion. The part features on–board H-bridge output stages with low RDSON. External bootstrap capacitors are all that is required to provide the gate drive to the all-NFET output stage since on-board bootstrap diodes are provided. The LX1705 also features Mute and Standby modes, POP-free turn-on and turn-off, under-voltage lockout for both input supplies, and multi-level overtemperature protection. The LX1705 is offered in a small thermally efficient footprint, low profile surface mountable 32-pin Micro Lead Quad Package (MLPQ) in 5mm x 5 mm. APPLICATIONS IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com LCD TV Car Navigation MP3 Docking Stations Portable Sound System PRODUCT HIGHLIGHT STBY 5V AVSS1 PVSS1N OUT1N BOOT1N PVDD1 AVSS2 PVSS2N OUT2N BOOT2N V5V STATUS N.C. ROSC TMON PVDD PVDD1 BOOT1P OUT1P LX1705 TCTRL MUTE VREF IN1P N.C. STBY PVDD2 PVDD2 BOOT2P OUT2P PVDD PVSS1P IN1N PVSS2P IN2P IN2N LX1705 LX1705 IN2N IN1N IN1P IN2P MUTE PACKAGE ORDER INFO TA (°C) -40 to 85 LQ Plastic MLPQ 32-Pin 5mm x 5mm RoHS Compliant / Pb-free LX1705ILQ Note: Available in Tape & Reel. Append the letters “TR” to the part number. (i.e. LX1705ILQ-TR) Copyright © 2007 Rev. 1.2, 2007-03-20 Microsemi Analog Mixed Signal Group 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 1 LX1705 TM ® 8+8W Stereo Filterless Class-D Amplifier P RODUCTION D ATA S HEET ABSOLUTE MAXIMUM RATINGS Power Supply Voltage (PVDD) ................................................................... -0.3V to 16.5V BOOTP/N - PVDD ......................................................................................... -0.3 to 16.5V Bias Supply Voltage (V5V) ................................................................................. -0.3 to 6V Input Pins (IN1P/N, IN2P/N ,TCTRL, STBY, MUTE) ......................-0.3V to V5V + 0.3V Output Pins (VREF, STATUS, ROSC, TMON) .................................-0.3V to V5V + 0.3V Maximum Operating Junction Temperature .............................................................. 150°C Storage Temperature Range.........................................................................-65°C to 150°C Package Peak Temp. for Solder Reflow (40 seconds maximum exposure) ... 260°C (+0 -5) Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to AVSS, except as noted. Currents are positive into, negative out of specified terminal. PACKAGE PIN OUT W WW . Microsemi . C OM BOOT1N BOOT1P 30 PVSS1N PVSS1P 32 OUT1N OUT1P 31 PVDD1 29 PVDD1 28 27 26 25 24 23 22 21 20 19 18 17 STBY IN1P IN1N N.C. N.C. IN2N IN2P MUTE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 TCTRL TMON AVSS2 ROSC VREF AVSS1 V5V STATUS PVSS2P OUT2P BOOT2P PVDD2 PVDD2 BOOT2N OUT2N PVSS2N THERMAL DATA LQ PACKAGE (Top View) LQ Plastic MLPQ 32-Pin 5mm x 5mm THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA Pb-free 100% Matte Tin Pin Finish 21.6°C/W Junction Temperature Calculation: TJ = TA + (PD x θJA). The θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. P D PACKAGE DATA Copyright © 2007 Rev. 1.2, 2007-03-20 Microsemi Analog Mixed Signal Group 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 2 LX1705 TM ® 8+8W Stereo Filterless Class-D Amplifier P RODUCTION D ATA S HEET FUNCTIONAL PIN DESCRIPTION Name PVSS1P PVSS1N PVSS2P PVSS2N PVDD1 PVDD2 V5V AVSS1 AVSS2 IN1N IN1P IN2N IN2P OUT1N OUT1P OUT2N OUT2P BOOT1N BOOT1P BOOT2N BOOT2P VREF Function Pin Number(s) 32 25 16 9 28,29 12,13 18 19 22 3 2 6 7 26 31 15 10 27 30 14 11 20 Description W WW . Microsemi . C OM Power Ground Power Supply Power Supply Analog Ground Analog Input Power Ground for the two H-bridge output drivers, connect to power ground plane Power Supply for the two H-bridge output drivers. Current draw will be up to 1.6A at 2 x 8W into 8Ω. These are peak currents when the part is run at maximum rated power on both channels. Analog Power Supply for the analog signal processing section. Analog Ground for the analog signal processing section. Must be at the same potential as PVSS, connect at one point to the power ground plane. Differential analog audio inputs for each channel. The common mode voltage will be set by the LX1705 to around 2.25V. Differential high power audio outputs for each channel. Each output will swing between PVDD and PVSS. These outputs are driven by an on-chip H-bridge output driver which uses low RDSON NFETs. Bootstrap voltage pins which provide the high voltage needed to drive the upper NFET. A bootstrap capacitor should be placed between the respective output and these pins. Digital Output Bootstrap Analog Output CMOS Input CMOS Input CMOS Output Analog Input Test Pin Test Pin No connect Typical 2.25V reference voltage which serves as an internal reference. An external compensation capacitor of at least 1uF should be connected between this pin and AVSS. Logic level control which mutes the audio signal when high. Logic level control which places the chip into sleep mode when high. Digital monitoring pin which is used to flag internal fault states. This pin will be synchronized with the internal clock to prevent glitches. See the STATUS flag list (below) for a summary of which conditions will force this pin to go high. Frequency control pin. A resistor between this pin and AVSS will set the oscillation frequency for the Class-D modulator. Test purpose only, Connect to AVSS1 Test purpose only, left open. No Connect, pin is open MUTE STBY STATUS ROSC TCTRL TMON N.C. 8 1 17 21 24 23 4,5 P D PACKAGE DATA The STATUS pin will go high under any of the following conditions: STBY is high. This indicates that the chip is in “stand-by” mode. V5V is below the V5V UVLO threshold. PVDD is below the PVDD UVLO threshold. The die temperature is above about 140°C. This indicates that the part has gone in to gain foldback. A short circuit across the speaker has caused the output devices to shut off due to excessive temperature. Copyright © 2007 Rev. 1.2, 2007-03-20 Microsemi Analog Mixed Signal Group 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 3 LX1705 TM ® 8+8W Stereo Filterless Class-D Amplifier P RODUCTION D ATA S HEET ELECTRICAL CHARACTERISTICS Unless otherwise specified, the following specifications apply over the operating ambient temperature -40°C < TA < 85°C except where otherwise noted and the following test conditions: PVDD = 12V, PVSS = AVSS = 0V, V5V = 5V, RROSC = 24.9kΩ Parameter OSCILLATOR Oscillator Frequency Temperature Stability POWER SUPPLY Supply Voltage UVLO UVLO Hysteresis +5V Supply UVLO UVLO Hysteresis Stand-By Current Operating Current Stand-By Current Operating Current Power Supply Rejection Ratio Reference Voltage GAIN Stage Gain Mute Gain OFFSET Output DC Offset INPUT STAGE Input Resistance Common Mode Voltage OUTPUT STAGE MOSFET On Resistance THERMAL Thermal Shut Down Junction Temperature Thermal Gain Fold-back Temperature Thermal Recovery Temperature MUTE / STBY MUTE Threshold STBY Threshold MUTETH STBYTH Mute Mode RDSON IDS = 200mA 220 mΩ RIN VCM 22 2.25 kΩ V VOFFSET Measured Differentially. Channel + to Channel 40 mV G GMUTE f = 1kHz; VMUTE = 0V VMUTE = 5V 26 -40 dB 1 W WW . Microsemi . C OM Symbol Test Conditions Min Varies with ROSC resistor value, value shown is for default conditions. TA = -40°C to 85°C LX1705 Typ Max Units FOSC 250 300 2 350 kHz % PVDD PVDD PVDD V5V V5V V5V IQQ IQQ IQQ5V5 IQQ5V5 PSRR VREF For PVDD, STBY high For PVDD, STBY low, Mute high For 5V5, STBY high For 5V5, STBY low, Mute high For PVDD @ 1kHz C bypass = 1µF Start-up Voltage , Rising Start-up Voltage, Rising 5 12 4.5 500 15 4.9 V mV 4.5 4.25 250 10 10 10 7 55 2.25 5.5 4.50 V mV 50 30 µA mA µA 15 mA dB V E ELECTRICALS TSD TFB TREC 150 140 110 °C V5V 2 V5V 2 V ms STBY To Output Enable Note 1: Not ATE Tested. Copyright © 2007 Rev. 1.2, 2007-03-20 5 Microsemi Analog Mixed Signal Group 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 4 LX1705 TM ® 8+8W Stereo Filterless Class-D Amplifier P RODUCTION D ATA S HEET TYPICAL SYSTEM APPLICATION CHARACTERISTICS Unless otherwise specified, the following specifications apply over the operating ambient temperature -40°C < TA < 85°C except where otherwise noted and the following conditions: PVDD = 12V, PVSS = AVSS = 0V, V5V = 5V, ROSC = 25kΩ, RL = 8Ω. Parameter AUDIO CHARACTERISTICS Symbol Test Conditions LX1705 Typ Units W WW . Microsemi . C OM Min Max Output Power Stereo PO THD+N < 1% THD+N