LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
DESCRIPTION
KEY FEATURES
The LX2260 is very well suited for
applications where high brightness LED
backlighting is combined with a wide
dimming range and high reliability such as in
Automotive Infotainment, Marine or Cockpit
applications.
Fault conditions can be reported through
a digital 2 wires serial bus interface (I2C
and SMBus compatible) and include LED
short, LED open, and IC over temperature
indicators as well as information about the
LED string voltage.
The LX2260 driver supports up to 4
independent LED strings and can be
integrated in systems supporting up to 40W.
The drive current of each string can be
programmed up to 500mA, with a typical
channel-to-channel matching accuracy within
±1.5 percent. The FETs of the boost converter
and each LED current sink are external to
provide the flexibility and scalability to
accommodate a variety of LED configurations
as well as to provide optimal thermal
management of the system.
The IC also provides externally
programmable LED current rise and fall
time that can be used to optimize system
EMI.
Four LED Channels with
Independent PWM Control
Up to 500mA LED Current per
Channel with External Power
Components for Optimal Design and
Thermal Management
±3% Current Setting Accuracy
1.5% Channel to Channel Current
Matching
Minimum +90% efficiency
Programmable LED Current
Amplitude via SMBus or I2C
Unique Auto Buck, Boost, and
Buck-Boost Mode Transition
Analog Dimming via Light Sensor
(Ambient or RGB Light) or
Thermistor
Wide Digital Dimming Range (up to
3000:1)
SMBus and I2C Compatible Digital
Diagnostic Reporting
LED Fault Status
String Voltage Monitoring
LED Over Temperature Warning
& Protection
Multiple Protection including Short
Circuit, Over Voltage and Over
Temperature Protection
Programmable LED Current
Rise/Fall Time for EMI Control
Automotive Grade
AEC-Q100 Qualification
40V Load Dump Resistance
-40°C to +85°C Ambient
Temperature Range
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The LX2260 has the unique capability to
automatically adjust its operation
according to the instantaneous input and
output voltage requirements to operate in a
boost, buck-boost, or buck converter mode
(this is not a traditional buck/boost circuit)
thus automatically maintaining the
optimally chosen LED current regulation.
The LX2260 is designed to provide
protection as well as continued operation
in case of several fault conditions
(StayLIT™). Among the protection
features we offer output short circuit
protection, over-voltage protection, and
over-temperature shutdown. In addition,
with the use of an external thermistor to
Dimming
inputs
providing
either sense the LED temperature, the LED
independent control of several white LED current can be compensated to stay within
strings or color mixing capability for optimal a given LED temperature profile.
light temperature control. PWM frequency of
up to 25kHz is supported to avoid audible
noise.
WWW . Microsemi .C OM
The LX2260 is a high brightness multichannel LED driver, designed for automotive
display illumination. It offers the designer a
high degree of flexibility to accommodate
different LED configurations (white or RGB),
drive currents, input and output voltages while
providing a high degree of control, protection
and fault management of the system.
APPLICATIONS
O
Automobile display illumination
(cluster instruments, monitors, rearseat entertainment systems)
Displays for Consumer electronics
White or RGB LED Displays
LX2260
IMPORTANT: For the most current data, consult MICROSEMI’s website:
http://www.microsemi.com;
PACKAGE ORDER INFO
TA (°C)
-40°C to
85°C
LQ
THERMAL DAT A
Plastic 5 x 7 mm² QFN 38-pin
RoHS Compliant / Pb-free
LX2260ILQ
Note: Available in Tape & Reel. Append the letters “TR” to the part number.
(i.e. LX2260ILQ-TR)
Copyright © 2011
Rev. 1.0 12/4/2012
θJA = 19.3 °C/W
THERMAL RESISTANCE-JUNCTION TO AMBIENT
Junction Temperature Calculation: TJ = TA + (PD x θjA).
The θJA numbers are guidelines for the thermal performance of the
device/pc-board system. All of the above assume no ambient airflow.
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 1
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
ABSOLUTE MAXIMUM RATINGS
PACKAGE PIN OUT
WWW . Microsemi .C OM
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Supply Input Voltage VCC, Sense, PFET,VH,VD1-4, EN, VLED .................-0.3V to 44V
VH to VCC ................................................................................................................. - 6V
VL to GND .......................................................................................................-0.3V to 6V
SDA, SCLK, PWM1-4, FFLAG .......................................................................-0.3V to 6V
All other pins ........................................................................................ -0.3V to VL+0.3V
Maximum Junction Temperature ............................................................................... 150°C
Storage Temperature Range ......................................................................... -65°C to 150°C
Peak Package Solder Reflow Temperature (40 seconds maximum exposure) ........... 260°C
Notes: Exceeding these ratings could cause damage to the device. All voltages are with respect to GND.
Currents are positive into, negative out of specified terminal. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under
“Recommended Operating Conditions” are not implied. Exposure to “Absolute Maximum Ratings”
for extended periods may affect device reliability.
(Top View)
RoHS / Pb-free 100% Matte Tin Pin Finish
xxxx = date/lot code
FUNCTIONAL PIN DESCRIPTION
Pin
Name
GND
ICOMP
COMPT
COMPK
Description
1
GND pin: The external NFET for DC-DC converter should return to this GND
2
Power converters current slope compensation. Connect a resistor from this pin to GND to compensate
current slope. See “slope compensation section” for detail.
3
Boost Mode Compensation: Connect a resistor from this pin and the junction of the COMPK resistor and
capacitor for auto tri-mode design.
4
Buck and Buck-Boost mode Compensation. Connect a capacitor in series with a resistor across this pin
and GND. If needed, another capacitor connected from this pin to GND for type II compensation
5
Feedback Soft-start: Connect a capacitor 4.7µF typical from this pin and GND.
VL
6
5V power supply output – Power Pin – Provides a regulated 5V typical to the internal and external 5V
circuits. Typical 2mA current source for external use.
EN
7
Enable Input. Pull low to put the system into sleep mode. If not used must tie to VCC.
OT/ADIM
8
LED Temperature Compensation/Analog Dimming: This input is used for LED temperature compensation.
The LED current amplitude will reduce proportional with LED ambient temperature. The start of
compensation is programmable with an external resistor and a thermistor. Connect pin to GND to force
100% output current when thermal compensation is not used.
By setting 1 on REG08, this pin becomes analog dimming input (ADIM) which has 0V to 2V control
range. Connect ADIM to GND to force 100% output current when analog dimming is not used.
FS
9
Oscillator Frequency Setting pin. Connect a resistor RFS between FS to GND to set the buck/boost
frequency using the following formula:
Freq [kHz] = 66000/RFS where R is in kΩ.
Copyright © 2011
Rev. 1.0 12/4/2012
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 2
LX2260
O
CSS
Pin #
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
FUNCTIONAL PIN DESCRIPTION
Pin
Name
Pin #
SLOPE
10
LED current rise/fall time programmable pin. Connect a resistor from this pin to GND to program LED
current rise/fall time for EMI purpose. If not used, tie this pin to 5V.
SDA
11
Serial Data In/Output. Read data for fault conditions, LED string status via drain voltage, VLED voltage.
SDA also can be used to set the LED peak current amplitude by writing to register 08h. Connect to GND if
SDA is not used.
SCLK
12
Serial Clock Input. Maximum clock is 100kHz. Connect to GND if not used.
ADR
GND
IS1-4
VG1-4
VD1-4
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PWM1-4
13
14-17
Fault signal output. Open drain output. This pin goes low when a fault condition is detected.
Pulse Width Modulated dimming signal – Signal input.
PWM input can be tied together for a common PWM signal or use for individual PWM control.
18
Address Setting: connect to VL, GND or leave it open for three different address choices. Refer to the
address table below.
19
GND pin
20,23,
26,29
LED current setting. – Program this pin with an external resistor to set the LED current with 300mV internal
reference voltage. I-LED = 300mV/RIS
21,24,
27,30
Gate Drive – CMOS Output Pin: Connect to the gate of the external NMOSFET current sink. Any unused
pins must be tied to ground to distinguish between intentionally unused and LED failed open.
22,25,
28,31
Drain – Signal Pin – This connects to Drain pin of the external N-MOSFET switch. The boost output
voltage regulates based on the lowest VD, and the lowest voltage is kept at 0.9V (typical). Any unused
pins can be left open.
Over Voltage Protection – Signal input: An external voltage divider sets the maximum LED voltage. System
will stop switching when OVP limit hits, and resume when it goes lower than the limit.
33
LED voltage. Connect this pin directly to common anode strings voltage.
34
Low-side NFET gate drive: Connect to the gate of the N-channel MOSFET
35
High-side PMOS gate drive: Connect to gate of a PFET. When the boost output short detected or EN signal
low, PFET will open. Otherwise, PFET is a converter switch in buck or buck-boost mode.
VH
36
High side power rail. Connect a 1µF 10V capacitor from this pin to VCC.
SENSE
37
Converters current sense negative pin. The differential input voltage across RSENSE resistor used to set the
peak inductor current. Use Kelvin connection directly to the RSENSE output side
VCC
38
Power supply input – Provides power to the IC. Must be closely decoupled to ground with ceramic
capacitors.
VLED
DRV
O
PFET
Copyright © 2011
Rev. 1.0 12/4/2012
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 3
LX2260
32
OVP
WWW . Microsemi .C OM
FFLAG
Description
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
SIMPLIFIED BLOCK DIAGRAM
Level
shift
S
COMPT
SCLK
SDA
ADR
R
SET
CLR
Level
Shift
5VL
Q
VH
DRV
Q
VCC
+
-
+
VLED
OC
POR
VLED and
Protection
Control
Gain
CTRL
VLED/20
COMPK
OC
+
-
VCC
SENSE
ICOMP
PFET
PWM1-4
Vref1
VCC
VCC
VCC
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VH
-5.25V LDO
CLK
OSCILLATOR
OVP
EA
PWM1-4
Vref
SMBus
Interface
CSS
8BIT ADC & 7BIT
DAC
CLK
OC
VD 1-4
Temp
FFLAG
Vcc
5VL
POR
UVLO
5V REGULATOR
O
VL
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FS
+
-
x4
VG 1-4
ILED MOD
&
SLOPE CTRL
IS 1-4
Vref3
GND
PGND
EN
Copyright © 2011
Rev. 1.0 12/4/2012
PWM 1-4
Thermal
Ckt.
Temp
SLOPE
ADIM/LED TEMP COMP
LX2260
ADIM/OT
Control
Logic
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 4
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
ELECTRICAL
CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature of -40°C ≤ TA ≤ 85°C and the following test
conditions: VCC = 12V; VOT = 0V, EN = 3V, RFS = 100kΩ, RSLOPE = 82.5kΩ, Typical values are at TA = +25°C
Symbol
Test Conditions / Comment
Min
Typ
Max
Units
28
V
Input Power Supply
Input Voltage
VCC
Withstand voltage VCC = 40V
Quiescent current
ICCON
EN > 2V, No PFET & NFET connected
10
mA
EN < 0.8V , VCC = 28V
25
μA
Sleep current
ICCSLEEP
6
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Control and Logic
EN Logic High
VENH
EN Logic Low
VENL
EN Current High
IENH
EN Current Low
IEN-L
Address High Input
VADRH
Address Low Input
VADRL
Address Open
VADRO
Address Input Low Current
IADRH
Address Input High Current
IADRL
FFLAG Output Low Voltage
VFFLAGH
FFLAG Output High Leakage
Current
VFFLAGL
2
V
0.8
V
EN = 3.3V
5
μA
EN < 0.8V
5
μA
VL-0.8
0.8
-20
V
V
VL/2
V
-7
μA
7
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Parameter
20
μA
ILOAD = 3mA
0.4
V
VFFLAG = 5.5V
10
μA
DC/DC PWM Error Amplifier
Peak Output Current
IOUT
+/-40
μA
Output Resistance
ROUT
4000
kΩ
At EA inputs (IOUT/(VLED/20-VCSS)
120
μmho
VCOMPT = VCOMPK = 1.6V
0.5
kΩ
Forward Transconductance
gm
O
COMP Switch On Resistance
Soft Start/Drain Voltage Sense Error Amplifier
CSS Source Sink Peak Current
Lowest VD > 700mV
+/-20
Lowest VD < 700mV
120
μA
gm
Output Resistance
Valid Output Voltage Range
VCSS
1/20 of VLED
Start Up Time
TSU
CCSS = 2.2µF, RISx = 2Ω, VIS setting 300mV,
100% PWM, at IS voltage > 90%
80
μmho
5000
kΩ
0.5
5
2
V
20
mS
0.8
V
Pulse Width Modulation Input
PWM Input Low Voltage
Copyright © 2011
Rev. 1.0 12/4/2012
VPWM_L
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 5
LX2260
Forward Transconductance
ICSS
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
ELECTRICAL
CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature of -40°C ≤ TA ≤ 85°C and the following test
conditions: VCC = 12V; VOT = 0V, EN = 3V, RFS = 100kΩ, RSLOPE = 82.5kΩ, Typical values are at TA = +25°C
Symbol
PWM Input High Voltage
PWM Input Frequency
Test Conditions / Comment
VPWM_H
2
FPWM
0.1
Digital Dimming; SLOPE = VL
PWMMIN
Adjustable Slope Option to set tR and tF
Typ
Max
PWM Input Pull-down Resistor
25
kHz
2
µs
2.5
+2 tR
or tF
PWMR
SLOPE = VL (minimum tR, tF)
PWM Input to Output Delay
(VIS = High)
Units
V
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Minimum PWM Pulse Width
Min
RSLOPE = 82.5kΩ (tR,tF~4μS)
100
kΩ
6.5
µs
9
µs
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Parameter
Device Protection
OVP Threshold Voltage
VTH OVP
1.87
1.97
2.07
V
Rising temperature hysteresis, THYS = 20°C,
at junction
150
°C
Over Temperature Shutdown
TOVT-SHDN
Shut Down Recovery
TRECOVERY
At junction
130
°C
TOVT-WARN
Rising temperature hysteresis, THYS = 15°C,
at junction
120
°C
Clear Warning
At junction
105
°C
Load Dump Protection
VIS setting at 100%, buck-boost transition.
VIN: 10VÙ40V, dV/dt = 30V/msec
For Design Reference Only
Over Temperature Warning
VISET
360
mV
5
%
10
%
1.5
%
3
%
291
309
mV
286.6
313.6
mV
800
1000
mV
300
nA
LED Current Output
Sink Current Overshoot
VISET OVERS
VISET
V-source Pk-Pk Matching Among
Strings
VISET 150
FPWM = 200Hz, PWM = 25% duty cycle
Rsense = 2Ω, Average of the four outputs
Maximum IS voltage
VISx
Minimum VD regulation
VDx
At the lowest VD pin, IDS = 150mA
IS Input Bias Current
IIS
VIS = 300mV
DC Gain
Rsense = 2Ω, Each outputs
AOL
80
dB
Current Source Driver Opamp
On State VG Voltage Range
VGRANGE
VG voltage that maintains DC accuracy
1.5
4
V
0.1
V
Off State VG Voltage
VGOFF
VG Sink Current
VGSNK
VVG = 2.5V, VIS = 0.4V, PWM = HIGH
-7
mA
VG Source Current
VGSRC
VVG = 2.5V, VIS = 0.2V, PWM = HIGH
7
mA
Copyright © 2011
Rev. 1.0 12/4/2012
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 6
LX2260
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Sink Current Over/Under shoot in
transition mode
VIS setting at 100% , PWM Dimming
For Design Reference Only
VIS setting at 100% , buck-boost transition.
VIN: 10VÙ32V, dV/dt = 1V/msec
For Design Reference Only
Rsense = 2Ω, 0.8V ≤ VD ≤ 3V (note 1)
TAMB = 25°C, PWM = 100% duty cycle
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
ELECTRICAL
CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature of -40°C ≤ TA ≤ 85°C and the following test
conditions: VCC = 12V; VOT = 0V, EN = 3V, RFS = 100kΩ, RSLOPE = 82.5kΩ, Typical values are at TA = +25°C
Symbol
VG Load Capacitance
Test Conditions / Comment
Min
Typ
CLG
Max
Units
1500
pF
LED Current On/Off slope
SLOPE Reference Voltage
VSLOPE
TI-LED RISE
I-LED Fall Time
TI-LED FALL
I-LED Rise Time
TI-LED RISE
I-LED Fall Time
TI-LED FALL
V
SLOPE = 5VL
FPWM = 200Hz, PWM = 50% duty cycle
CLG < 500pF
1
1.5
2.5
µs
1
1.5
2.5
µs
RSLOPE = 82.5kΩ, TRISE//TFALL = 10% to 90%
FPWM = 200Hz, PWM = 50% duty cycle
CLG < 500pF
3
4.2
5.5
µs
3
4.2
5.5
µs
1.8
2.0
2.2
V
3.3
3.5
3.8
V
3.5
3.7
3.95
V
1
μA
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I-LED Rise Time
2
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Parameter
LED Temperature Compensation (LED Current Profile)
OT Start Threshold Voltage
VOTTH
OT Max_Voltage Compensation
VOT
OT Input Bias Current
I-LED starts compensation at I-LED = 95%
current setting. Register 08h = 01111111;
PWM1-4 = High
At stop point, I-LED = 15% current setting.
Register 08h = 01111111;
PWM1-4 = High
And goes down to 6.7% when VTH OT >4.5V.
PWM1-4 = High;
Register 08h= 01111111
IOTIIB
Analog Dimming ( Analog dimming can be set via SMBus or Fuse)
AD Voltage
VAD
AD Input Bias Current
I-LED = 95%; PWM1-4 = HIGH;
Register 08h = 01111111
1.8
I-LED = 6.7%; PWM1-4 = HIGH;
Register 08h = 01111111
0.05
ADIIB
Analog Control Output Range
VIS
1.9
0.2
2.0
V
0.34
-1
1
μA
Register 08h = 01111111, PWM1-4 = High
5
100
%
15.4
100
%VIS
O
SMBus LED Peak Current Adjustment
Adjustment Range
IPADJ
VIS = 300mV represents maximum current
setting
Resolution
IRES
2 mV translates out to be 7 bits DAC
2
mV
LED short/open protection
VDxSHORT
Derated IS Voltage
FPWM = 25kHz,
Duty cycle > 7µsec
6.7
VD > 7.75
LED Open Threshold Voltage
VDxOPEN
7.2
7.7
V
10
%
0.24
V
With 10mΩ current sense resistor
For Design Reference Only
10
A
At current sense inputs
90
mV
FPWM = 25kHz, PWM = 10% duty cycle
Inductor Over Current protection
Maximum Short Circuit Current
ILSHORT
Over Current Threshold Voltage
VOC
Copyright © 2011
Rev. 1.0 12/4/2012
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 7
LX2260
LED Short Threshold Voltage
(note 1)
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
ELECTRICAL
CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature of -40°C ≤ TA ≤ 85°C and the following test
conditions: VCC = 12V; VOT = 0V, EN = 3V, RFS = 100kΩ, RSLOPE = 82.5kΩ, Typical values are at TA = +25°C
Symbol
Test Conditions / Comment
Min
Typ
Max
Units
100
mV
SENSE Input
Sense Input Voltage Range
VSENSE
Sense Input Bias Current
ISENSE
0.3
μA
VL Output
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VL Regulator (5.0V)
5V
VL Source Current
UVLO
5VCURRENT
VLUVLO
6V ≤ VCC ≤ 28V; no external load
4.75
External load current, VCC = 6V,
VL drop by ≤ 5%
VL rising, VHYS = 0.50V
5.00
5.25
2
V
mA
3.75
4.25
4.65
V
-4.75
-5.25
-5.5
V
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Parameter
VH (VCC-5.25V) Regulator
VH Output Voltage
UVLO
Oscillator
VH
VHUVLO
FS Reference Voltage
VFS
Oscillator Frequency
FSW
Oscillator Frequency Setting
Range
6V ≤ VCC ≤ 28V; 0mA ≤ IVH ≤ 15mA
Reference to VCC
VH falling, VHYS = 0.50V. Internal POR
activates on VH falling UVLO threshold,
reference to VCC
RFS = 100kΩ
FRANGE
600
-4.25
V
2
V
670
400
740
kHz
800
kHz
DC/DC Switching NFET Driver
DRV Voltage High
VDRVH
5
V
DRV Rise Time
TRISE
CL = 1000pF
26
ns
DRV Fall Time
TFALL
CL = 1000pF
15
ns
VDRVOFF
EN = 0V
0
V
PFET High Voltage
VPFETH
EN = 0V, refer to VCC
0
V
PFET Low Voltage
VPPFETL
Refer to VCC
-5.25
V
PFET Rise Time
TRISE
CL = 1000pF
14
ns
PFET Fall Time
TFALL
CL = 1000pF
25
ns
Off Voltage
Converter mode condition
Boost to Buck-Boost Transition
BS-BB
At VLED. VLED falling
13.76
V
Buck-Boost to Boost Transition
BB-BS
At VLED. VLED rising
14.65
V
Buck to Buck-Boost Transition
BK-B
At VLED. VLED rising
9.21
Buck-Boost to Buck Transition
BB-BK
At VLED. VLED falling
8.41
Copyright © 2011
Rev. 1.0 12/4/2012
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
V
V
Page 8
LX2260
O
DC/DC Switching PFET Driver
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
ELECTRICAL
CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature of -40°C ≤ TA ≤ 85°C and the following test
conditions: VCC = 12V; VOT = 0V, EN = 3V, RFS = 100kΩ, RSLOPE = 82.5kΩ, Typical values are at TA = +25°C
Symbol
Overall System Efficacy
η
Test Conditions / Comment
VIN = 12V& 26V, VS setting at 100%,
PWM = 100% (Boost mode & Buck Mode)
For Design Reference Only
Min
Typ
Max
90
Units
%
0.7
V
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SMBus
SDA, SCLK Input Low Voltage
V
SDA, SCLK Input High Voltage
SDA, SCLK Input Hysteresis
ILV
IHV
2
IHYS
SDA,SCLK Input Bias Current
IIB
SDA Output Low Sink Current
OSNK
100
-5
VSDA = 0.4V
+5
4
μA
mA
SMBus Frequency
FSMBUS
10
SMBus Free time
TBUF
4.7
μs
SCLK Serial Clock High Period
THIGH
4
μs
SCLK Serial Clock Low Period
TLOW
4.7
μs
Start Condition Set-up Time
TSU:STA
4.7
μs
Start Condition Hold-up Time
THD:STA
4
μs
TSU:STO
4
μs
TSU:DAT
250
ns
THD:DAT
0
ns
TDV
200
ns
kHz
O
Stop Condition Set-up Time from
SCLK
SDA Valid to SCLK Rising Edge
Set-up Time, Slave Clocking Data
SCLK Falling Edge to SDA
Transition
SCLK Falling Edge to SDA Valid,
Reading Out Data
100
mV
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Parameter
Note: 1. When the different VDRAIN voltages are more than 2V, then a single LED short may shut off the string that has a highest VDRAIN (VD hits
the limit). However VSOURCE pk-pk matching will not be effected in this circumstance.
LX2260
Copyright © 2011
Rev. 1.0 12/4/2012
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 9
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
SERIAL INTERFACE
Address Strapping Codes
Option #
ADR
Address
0101 100b
1
GND
0101 110b
2
OPEN
0101 111b
VDD
3
S
1
1
8
1
1
Slave Address
Wr
A
Data Byte
A
P
0101100
0
Address = 0101110xb
7
1
1
8
1
1
Slave Address
Wr
A
Data Byte
A
P
0101110
0
O
1
S
Read can be performed on all registers by issuing the Read
Byte / Word protocol. Read Only registers can be written only
by internal logics. Their contents will not be affected by
SMBus write commands.
When LX2260 is initially powered, it will first test the
address selection pin input to determine its own address and
then look for its unique address each time it detects a “Start
Condition”. If the address does not match, the LX2260 ignores
all bus activity until it encounters another “Start Condition”.
S
Address = 0101100xb
7
Writes to registers can be performed by either the SMBus
Write Byte / Word protocols and / or by internal IC logic,
depending on the register type.
SMBus Packet Protocol Diagram Element Key
In this document, the SMBUs address occupies high
seven bits of an eight bit field on the bus, the low bit is
always the R/W bit.
1
The only required command protocols are SMBus Send
Byte, Receive Byte, Read Byte / Word, and the Write Byte /
Word protocols.
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LX2260 is a nine-register device which uses SMBus or
I2C protocols to communicate with the host system. All
registers are defined as full byte wide. Some registers
contain reserved (undefined) bits with a default value of “0”,
or are read only bits that are status indicators. Two of the
nine registers are capable of both read and write, and seven
registers are read only. See the LX2260 Register Definitions
section for details.
The LX2260 communicates over the SMBus and operates
in a “slave” mode receiving commands and sending /
receiving data to / from the host or “master”. Only standard
two-wire SMBus and I2C compatible serial bus and
protocols may be used for this device. The LX2260 can be
configured for one of the three addresses by connecting the
ADR input pin to ground, VDD, or simply leaving it OPEN.
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SMBus PROTOCOL
SMBus INTERFACE
Slave Address
Wr
A
X
S
Rd
Wr
A
P
Data Byte
A
P
X
Start Condition
Read (bit value of 1)
Write (bit value of 0)
Acknowledge (‘0’ for an ACK, or ‘1’ for a NACK)
Stop Condition
Command Code Register Address
Master-to-Slave
Slave-to-Master
Protocols used to communicate with LX2260 must be per
standard SMBus specification version 2.0 or higher.
Address = 0101111xb
7
1
1
8
1
1
S
Slave Address
Wr
A
Data Byte
A
P
0101111
0
Copyright © 2011
Rev. 1.0 12/4/2012
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
LX2260
1
Page 10
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
SERIAL INTERFACE
SMBus Clock
(SCL)
tLOW
WWW . Microsemi .C OM
SMBus Timing Measurement
tF
tR
VIH
VIL
tHIGH
tHD:STA
VIH
VIL
tSU:STO
tSU:STA
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SMBus Data
(SDA)
tSU:DAT
tHD:DAT
tBUF
P
S
S
P
Register Definitions
The LX2260 includes a registers to monitor the fault status. The slave address is set by the ADR signal inputs as follows:
VD Register: Address is 00h to 03h. This register has 8 bits that allows monitoring the drain voltage (VD). This voltage will reveal
the string status, i.e., LED short/open. It is suggested that the input PWM duty cycle be reduced when a LED short is detected to
avoid LED current sink NFET overheating.
VLED Register: Address is 04h. This register has 8 bits that allow monitoring the Boost output voltage (VLED).
String 1 & 2 Status Register: Address is 05h. This register has 8 status bits that allows monitoring the string 1 & 2 status.
String 3 & 4 Status Register: Address is 06h. This register has 8 status bits that allows monitoring the string 3 & 4 status.
Fault/Status Register: Address is 07h. This register has 8 status bits that allows monitoring the backlight controller’s operating
state.
REGISTER 00h to 03h
VD
Bit 7 (R)
BIT FIELD
Bit 0-7 (R)
Copyright © 2011
Rev. 1.0 12/4/2012
VD
Bit 6 (R)
DEFINITION
Drain voltage
VD
Bit 5 (R)
VD1 (drain voltage monitoring)
VD2 (drain voltage monitoring)
VD3 (drain voltage monitoring)
VD4 (drain voltage monitoring)
VLED (LED Anode voltage monitoring)
String 1 & 2 status
String 3 & 4 status
Faults
LED Peak Current Reference Voltage Adjustment
Drain voltage monitoring
VD
Bit 4 (R)
VD
Bit 3 (R)
DEFAULT VALUE 0x00
VD
Bit 2 (R)
VD
Bit 1 (R)
VD
Bit 0 (R)
DESCRIPTION
8-bit drain voltage monitoring. 256 steps for 8V. (bit 7 is MSB)
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Page 11
LX2260
O
REGISTER 00h
REGISTER 01h
REGISTER 02h
REGISTER 03h
REGISTER 04h
REGISTER 05h
REGISTER 06h
REGISTER 07h
REGISTER 08h
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
SERIAL INTERFACE
VLED
Bit 7 (R)
LED voltage monitoring
VLED
Bit 6 (R)
BIT FIELD
Bit 0-7 (R)
VLED
Bit 5 (R)
DEFINITION
LED voltage
VLED
Bit 4 (R)
VLED
Bit 3 (R)
DEFAULT VALUE 0x00
VLED
Bit 2 (R)
VLED
Bit 1 (R)
VLED
Bit 0 (R)
DESCRIPTION
8-bit LED voltage monitoring. 256 steps for 67.9V. (bit 7 is MSB)
String 1&2 Status Register
DEFAULT VALUE 0x00
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REGISTER 05h:
String #2 not
Used
String #1 not
Used
S1_OV
S1_OPEN
S1_ NOTUSE
S2_OV
S2_OPEN
S2_NOTUSE
Bit 7 (W)
Bit 6 (W)
Bit 5 (R)
Bit 4 (R)
Bit 3 (R)
Bit 2 (R)
Bit 1 (R)
Bit 0 (R)
BIT FIELD
DEFINITION
Bit 7
String #1 not
Used
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
String #2 not
Used
S1_OV
S1_OPEN
S1_ NOTUSE
S2_OV
S2_OPEN
S2_NOTUSE
BIT FIELD DEFINITION
REGISTER 06h
String #4 not
Used
Bit 6 (W)
DESCRIPTION
Set 1 when string #1 is not used to mask string faults on the string.
Bit 6 and 7 are written to register 05h by the systems via SMBus to let the LX2260 know the
unused string so the LX2260 can remove it from the fault detection/reporting.
At power up system must disregard fault reporting and FFLAG (software timer) until the
systems has finished setting string not used bit (set bit 6 and or 7 to high) and have received
acknowledge from LX2260. LX2260 sends an acknowledgement after masking string fault.
Set 1 when string #2 in not used to mask string faults on the string.
String 1 Over Voltage (1 = VD > 6.75V)
String 1 Open (1 = string open)
String 1 status (1 = string is not used)
String 2 Over Voltage (1 = VD > 6.75V)
String 2 Open (1 = string open)
String 2 status (1 = string is not used)
DESCRIPTION
String 3&4 Status Register
DEFAULT VALUE 0x00
S3_OV
S3_OPEN
S3_ NOTUSE
S4_OV
S4_OPEN
S4_ NOTUSE
String #3 not
Used
Bit 6
String #4 not
Used
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
S3_OV
S3_OPEN
S3_ NOTUSE
S4_OV
S4_OPEN
S4_ NOTUSE
Copyright © 2011
Rev. 1.0 12/4/2012
String 3 Over Voltage (1 = VD > 6.75V)
String 3 Open (1 = string open)
String 3 status (1 = string is not used)
String 4 Over Voltage (1 = VD > 6.75V)
String 4 Open (1 = string open)
String 4 status (1 = string is not used)
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Page 12
LX2260
Bit 5 (R)
Bit 4 (R)
Bit 3 (R)
Bit 2 (R)
Bit 1 (R)
Bit 0 (R)
Set 1 when string #3 in not used to mask string faults on the string. Bit 6 and 7 are written to
register 06h by the systems via SMBus to let the LX2260 know the unused string so the
LX2260 can remove it from the fault detection/reporting.
At power up system must disregard fault reporting and FFLAG (software timer) until the
systems has finished setting string not used bit (set bit 6 and or 7 to high) and have received
acknowledge from LX2260. LX2260 send acknowledge after masking string fault
Set 1 when string #4 in not used to mask sting faults on the string.
O
Bit 7 (W)
Bit 7
String #3 not
Used
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REGISTER 04h
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
SERIAL INTERFACE TIMING
REGISTER 07h
RESERVED
RESERVED
Bit 6 (R)
Bit 5 (R)
DEFINITION
Bit 3
Bit 2
Bit 1
Bit 0
OC SHDN
OC
OTP
T WARNING
ADIM
Bit 7 (R/W)
REGISTER 08h
Bit6
Bit 6 (R/W)
BIT FIELD
Bit 7
Bit 6:0
DEFINITION
ADIM
ILED bit6:0
T_Warning
Bit 0 (R)
DESCRIPTION
OC shutdown (1 = OCP shut down, 0 = OC SHDN OK). Reset after reading or by En = Low
Input OC (1 = over current condition, 0 = OC OK). Reset after reading or by En = Low
OTP Shutdown (1 = OTP shut down, 0 = TOK). (note 1)
Temperature warning (1 = TWARNING, 0 = TOK). (note 2)
Bit5
Bit 5 (R/W)
ILED Setting Register
Bit4
Bit3
Bit 4 (R/W)
Bit 3 (R/W)
1
1
DEFAULT VALUE 0x7F
Bit2
Bit1
Bit0
Bit 2 (R/W)
Bit 1 (R/W)
Bit 0 (R/W)
DESCRIPTION
Analog Dimming Mode setting (0 = OT, 1 = ADIM)
To program LED current setting reference voltage, see note below.
Register 08h: LED Peak Current Adjustment (7 bits used for 128 steps)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
0
1
0
0
1
1
DEFAULT VALUE 0x00
OC
OTP
Bit 2 (R)
Bit 1 (R/W)
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BIT FIELD
Faults Register
RESERVED
OC SHDN
Bit 4 (R)
Bit 3 (R/W)
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RESERVED
Bit 7 (R)
1
1
1
1
1
1
1
1
0
1
VIS (mV)
46
48
50
52
54
298
300
Default LED reference is 300mV regardless SDA/SCLK state at POR.
O
Note:
1.
2.
OTP bit change state from “0” to “1” and latched when the real time OTP changes from “0” to “1”.
T WARNING bit changes state from “0” to “1” and latched when the real time T WARNING change from “0” to “1”.
LX2260
Copyright © 2011
Rev. 1.0 12/4/2012
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 13
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
SERIAL INTERFACE TIMING
Start
Stop
TLOW.SEXT
SclAck
TLOW.MEXT
SclAck
TLOW.MEXT
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TLOW.MEXT
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Timeout Measurement Interval
SMBus Clock
(SCL)
SMBus Data
(SDA)
Faults Timing Diagram
OTP Timing (Bit 1, Reg 07h)
Over Temp Shutdown
OTP bit
Td
READ
FFLAG
Reset after reading, and set back by real time OTP
FFLAG is a real time indication of over temp shutdown
Copyright © 2011
Rev. 1.0 12/4/2012
LX2260
O
FFLAG stays low when the chip is in over temperature shutdown mode.
OTP bit is latched by over temperature warning signal.
FFLAG and OTP reset after reading and real time OTP is low. (Real time OTP not show)
There are some Tdelay (Td) from real time OTP “1” to set OTP & FFLAG, as well as from end read cycle to reset
OTP and FFLAG. Td must < 1µsec.
This timing diagram shows relationship between Over temperature Shutdown output and OTP bit, FFLAG only
without any other fault conditions. In an actual application, FFLAG will not represent Over Temp Shutdown from
temperature monitor because FFLAG is a NORed output of all faults and over temperature warning is always true
when Over Temp Shutdown is true.
Microsemi
Analog Mixed Signal Group
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Page 14
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
SERIAL INTERFACE TIMING
LX2260
O
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Copyright © 2011
Rev. 1.0 12/4/2012
Microsemi
Analog Mixed Signal Group
One Enterprise, Aliso Viejo, CA 92656, 1-800-713-4113, 949-380-6100, fax 949-215-4996
Page 15
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
SERIAL INTERFACE TIMING
WWW . Microsemi .C OM
Copyright © 2011
Rev. 1.0 12/4/2012
LX2260
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Strings Status Timing Diagram
Microsemi
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Page 16
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
THEORY OF OPERATION
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Slope Compensation.
LX2260 operates in fixed frequency CCM mode.
Therefore, in some conditions, the duty cycle may extend
beyond 50%. This condition will cause sub-harmonic
instability. The cure for this is adding an additional ramp
current. An external resistor (minimum 100kΩ) will set the
ramp current for the internal current slope compensation
circuit.
Use the following equation to set the external resistor for
the slope compensation:
Current Sense Resistor Selection
The voltage across an external input current sense resistor
is used for limiting the switching current (coil current)
= 10A (recommended), then
cycle-by-cycle. For
100
100
10
10mΩ
Inductor Selection
To keep the circuit in constant current mode (CCM), the
maximum ripple current should be less than twice the
minimum load current. The final value of the inductor will
be a compromise between buck and boost modes. Due to
the effect of RHP zero on Error Amplifier compensation,
select the minimum load = IOUT. The following formulae
should be used to calculate the inductor values in both buck
and boost modes.
·
· %∆
Where VIN VI(MAX), %∆I = ∆I/IO
The actual mode transition threshold can be calculated by
the following equations:
Buck-Boost to Buck = VLED
0.9*VCC-1.6 [V]
Buck to Buck-Boost = VLED
0.9*VCC-2.4 [V]
Buck-boost to Boost = VLED
1.11*VCC+1.34 [V]
Boost to Buck-Boost = VLED
Copyright © 2011
Rev. 1.0 12/4/2012
μ
Ω
Start-up
The start-up or wake-up is controlled to minimize inrush
or to eliminate the starting surge current required from the
input power supply. EN pin input is always alive, therefore
the LX2260 consumes a minimal amount of current even
when the chip is in sleep mode (EN=low).
LX2260’s start-up time is set by an external capacitor
CCSS, VLED, the highest VDS , and PWM duty cycle (DPWM).
During start-up, CCSS is charged up at 120µA until lowest
VD reaches to 700mV. Use the following equation to
estimate the start up TSU where DPWM is in decimal number.
1
μ
120μ
_
20
1.11*VCC+0.44 [V]
Over Current and Over Current Shutdown (OC SHDN).
In any mode of power conversion or any test condition,
once over current (OC) is detected, the PDRV turns off for 4
switching clock cycles and then resumes operation. An
internal 4 event counter accumulates the number of over
current triggers that happen within 128 clock cycles. In
other words, the 4 event counter is reset by 1/128 clock. At
the 4th over current event (in case there is the 1/128 reset
coming before the 4th trigger, total number of over current
triggers that cause shutdown became more than 4), the chip
shuts off the DC-DC converter and discharges CSS
capacitor to 75mV. The chip resumes operation thereafter.
If the over current condition is still present, the chip repeats
the shut down and recovery cycle. The status of over current
(OC) will set Bit 2 of register 07h to “1”. Bit 2 will reset
after reading.
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Page 17
LX2260
O
Where VIN VO/2, %∆I = ∆I/IO
Minimum inductor value for buck converter:
·
66.7
To speed up the startup time with low PWM duty cycle,
user may try to stagger the PWM inputs so that the DC/DC
converter stays active for an extended time. The LX2260’s
DC/DC converter is active when any of the active string’s
PWM inputs are high.
Minimum inductor value for boost converter:
Where fS ≈ 600kHz
·
· ·
· %∆
·
Ω
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Introduction
The LX2260 is a fixed frequency current-mode PWM
controller designed to regulate the necessary voltage to drive
an LED array. Depending on the input voltage and the
required LED string voltage, the LX2260 will decide to
operate in boost converter mode, buck converter mode, or
buck-boost converter mode with fixed switching frequency
from 400kHz to 800kHz, which is programmed by an
external resistor. In all modes of operation the LX2260 will
regulate to the lowest drain voltages (typ. 0.9V) to minimize
the power loss through the external current sink NFETs.
LX2260
Four Channel High Brightness LED Driver
P RODUCTION D ATASHEET
THEORY OF OPERATION- CONTINUTED
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Temperature Warning (T_Warning).
In any mode of the converter or any test condition, once
T_warning is detected (typical is 120°C), the status of
T_warning will set Bit 0 of register 07h to “1”. Bit 1 will
reset after reading in real time that T_Warning is low.
5V Regulator
The 5V regulator generates 5V from VCC to the internal
low voltage circuit and also provides power for an external
light sensor (such as LX1973). Maximum output current is
limited to 2mA for the external devices. The 5V output
requires at least 0.1µF connected across VL pin and GND
for phase compensation. A 1µF capacitor is recommended
and should be placed near the VL and tied to the GND
plane. The 5V is shut off while the chip is in sleep mode
(EN = low).
Fault Flags:
The following faults will set the FFLAG to “Low”, and
be reset either by after reading via SMBus. The fault output
is intended to stay low for an extended period after internal
faults are cleared. The timer is 8mS typical with 100kΩ on
FS pin.
Fault
Condition
Register
/Bit
Reset By
Notes
String over
voltage
Register
05h &
06h, bit 2
&5
Toggle
EN or VCC
When
VD
>6.75V
String Open
Register
05h &
06h, bit 1
&4
Toggle
EN or VCC
When
VD
7.25V to avoid the external FET from overheating. The
LED current returns to normal level when VD voltage gets
below 7.25V. Cycling power or the EN input will reset any
latched off VD pin.
User must tie VG pin to GND for any unused string to
distinguish between string failed open and strings unused.
In this situation any string that has VD higher than the LED
short threshold voltage will not be latched off and not be
reported with VD is higher than 6.75V.
The LED short fault is masked when any of VD is below
open LED detection threshold until such string is latched
off. Broken PWM input lines will be checked during start
and reported as corresponding strings open
In case of the LED short condition, LX2260 output works
normally until the VD voltage reaches the LED short
threshold voltage, and the corresponding string is turned off.
LED short protection works this way when there are more
than two active strings and the lowest VD regulation is at
normal level (0.24V
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