LX5240CPW

L IN D O C # : 5240 UltraMAX T HE TM LX5240 AND M U LT I M O D E , P L U G I NFINITE P L AY S C S I T E R M I N AT O R D ATA P OWER OF I N N O VAT I O N P RODUCTION S HEET DESCRIPTION The LX5240 is a multimode SCSI terminator with plug-and-play capability that conforms to the SCSI Parallel Interconnect-2 (SPI-2) specification developed by the T10 standards committee for low voltage differential (LVD) termination, while providing backwards compatibility to the SCSI, SCSI-2, and SPI single-ended specifications. Multimode compatibility permits the use of legacy devices on the bus without hardware alterations. Automatic mode selection is achieved through voltage detection on the diffsense line. The LX5240 utilizes Linfinity’s UltraMAX technology which delivers the ultimate in SCSI bus performance while saving component cost and board area. Elimination of the external capacitors also mitigates the need for a lengthy capacitor selection process. The individual high bandwidth drivers also maximize channel separation and reduce channel to channel noise and cross talk. The high bandwidth architecture insures ULTRA2 performance while providing a clear migration path to ULTRA3 and beyond. When the LX5240 is enabled, the differential sense (DIFFSENSE) pin supplies a voltage between 1.2V and 1.4V. In application, this pin is tied to the DIFFSENSE input of the corresponding LVD transceivers. This action enables the LVD transceiver function. DIFFSENSE is capable of supplying a maximum of 15mA. Tying the DIFFSENSE pin high places the LX5240 in a HI Z state indicating the presence of an HVD device. Tying the pin low places the part in a single-ended mode while also signaling the multimode transceiver to operate in a single-ended mode. The LX5240 supports full Plug and Play functionality with the DISCONNECT A and B pins. These logic compatible pins place the device in operational or sleep modes. During sleep mode, power dissipation is reduced to a meager 15µA while also placing all outputs in a HI Z state. Also during sleep mode, the DIFFSENSE function is disabled and is placed in a HI Z state. Another key feature of the LX5240 is the master / slave function. Driving this pin high or floating the pin enables the 1.3V DIFFSENSE reference. Driving the pin low disables the on board DIFFSENSE reference and enables use of an external master reference device. K E Y F E AT U R E S s Auto-Selectable LVD Or Single-Ended Termination s 3.0pF Maximum Disabled Output Capacitance s Fast Response, No External Capacitors Required s Compatible With Active Negation Drivers s 15µA Supply Current In Disconnect Mode s Logic Command Disconnects All Termination Lines s Diffsense Line Driver s Ground Driver Integrated For SingleEnded Operation s Current Limit And Thermal Protection s Hot-Swap Compatible (Single-Ended) s Compatible With SCSI 1, 2, 3, Fast-20, And The Pending SPI-2 LVD s Plug And Play Compatible s See LX5245/5246, LVD Termination Only NOTE: F or current data & package dimensions, visit our web site: h ttp://www.linfinity.com. PRODUCT HIGHLIGHT B U S V O L TA G E V OD VOD = V(-) - V(+), Logic = 0 V(+) VCM 100mV 0V NEGATED V(-) -100mV LX5240 LX5240 PA C K A G E O R D E R I N F O TA (°C) 0 to 70 DB Plastic SSOP 36-pin LX5240CDB PW Plastic TSSOP 24-pin LX5240CPW Note: All surface-mount packages are available in Tape & Reel. Append the letter "T" to part number. (i.e. LX5240CDBT) Copyright © 1999 Rev. 1.1 10/00 LINFINITY MICROELECTRONICS INC. 11861 W ESTERN A VENUE, G ARDEN G ROVE, CA. 92841, 714-898-8121, F AX: 714-893-2570 1 PRODUCT DATABOOK 1996/1997 LX5240 M U LT I M O D E , P L U G P AND UltraMAX P L AY S C S I T E R M I N AT O R D ATA RODUCTION S HEET PACKAGE PIN OUTS N.C. N.C. DISCONNECT A 1+ 12+ 2HEATSINK HEATSINK HEATSINK 3+ 34+ 45+ 5DISCONNECT B GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 A B S O L U T E M A X I M U M R AT I N G S (Note 1) TermPwr Voltage ................................................................................................. +7V Operating Junction Temperature Plastic (DB, PW Packages) .......................................................................... 150°C Storage Temperature Range .............................................................. -65°C to 150°C Lead Temperature (Soldering, 10 seconds) .................................................... 300°C Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. T H E R MAL D ATA DB PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ JA PW PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ JA 100°C/W 50°C/W VTERM HVD LVD SE 99+ 88+ HEATSINK HEATSINK HEATSINK 77+ 66+ DIFF B DIFFSENSE MASTER/SLAVE Junction Temperature Calculation: TJ = TA + (PD x θJA). The θ JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. DB PACKAGE (Top View) ("N.C." = No Internal Connection) 1+ 12+ 23+ 34+ 45+ 5DISCONNECT B GND VTERM DISCONNECT A 99+ 88+ 77+ 66+ DIFFSENSE MASTER/SLAVE 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 MASTER / SLAVE FUNCTION TABLE MASTER / SLAVE L* H Open (Pull-up) DIFFSENSE Status HI Z 1.3V 1.3V Output Current 0mA 15mA Source 15mA Source * When in Low state, terminator will detect state of DIFFSENSE line. PW PACKAGE (Top View) ("N.C." = No Internal Connection) DIFFSENSE / POWER UP / POWER DOWN FUNCTION TABLE DISCONNECT A DISCONNECT B H L H L H L L H Open L H L H L H L H Open DIFF SENSE L < 0.5V 0.7 to 1.9V H > 2.4V X Outputs Status Type Quiescent Current 7mA 21mA 1mA 10µA Enable Enable Disable Disable S.E. LVD HI Z HI Z 2 Copyright © 1999 Rev. 1.1 10/00 PRODUCT DATABOOK 1996/1997 UltraMAX M U LT I M O D E , P L U G P AND LX5240 P L AY S C S I T E R M I N AT O R D ATA RODUCTION S HEET (Note 2) R E C O M M E N D E D O P E R AT I N G C O N D I T I O N S Parameter Termpwr Voltage LVD SE Symbol VTERM Recommended Operating Conditions Min. Typ. Max. 3.0 3.5 0 0 0 5.25 5.25 5.0 VTERM 70 Units V V V V °C Signal Line Voltage Disconnect Input Voltage Operating Virtual Junction Temperature Range LX5240C Note 2. Range over which the device is functional. ELECTRICAL CHARACTERISTICS (Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0°C ≤ TA ≤ 70°C. TermPwr = 4.75V, DISCONNECT A or B = L. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) Parameter LVD Terminator Section TermPwr Supply Current Common Mode Voltage Offset Voltage Differential Terminator Impedance Common Mode Impedance Output Capacitance Output Leakage Mode Change Delay Symbol Test Conditions Min. LX5240 Typ. Max. 25 15 1.25 112 105 200 2.5 1 115 30 35 1.375 125 110 300 2 Units LVD ICC VCM VFSB ZD ZCM CO ILEAK tDF VDIFF IDIFF ISINK(DIFF) ILEAK(DIFF) SE ICC All term lines = Open DISCONNECT A or B = LOW Open circuit between - and + (see Note 3) VOUT Differential = -1V to 1V 0V to 2.5V DISCONNECT A or B = LOW DISCONNECT A or B = LOW, VLINE = 0 to 4V, TA = 25°C DISCONNECT A or B = LOW, VTERM = 0V, VLINE = 2.7V DIFFSENSE = 1.4V to 0V 1.125 100 100 100 mA µA V mV Ω Ω pF µA µA ms V mA µA µA mA mA µA V mA mA pF µA µA Ω °C DIFFSENSE Section DIFFSENSE Output Voltage DIFFSENSE Output Source Current DIFFSENSE Sink Current DIFFSENSE Output Leakage VDIFF = 0V VDIFF = 2.75V DISCONNECT A or B = LOW, TA = 25°C All term lines = Open, Master/Slave = 0V All term lines = 0.2V, Master/Slave = 0V DISCONNECT A or B = LOW VOUT = 0.2V VOUT = 4V, All lines DISCONNECT A or B = LOW DISCONNECT A or B = LOW, VOUT = 0 to 4V, TA = 25°C DISCONNECT A or B = LOW, VTERM = 0V, V LINE = 2.7V I = 1mA 2.6 21 45 1.2 5.0 1.3 1.4 15.0 200 10 10 226 35 24 Single-Ended Termination Section Termpwr Supply Current 7 214 15 2.85 23 65 2.5 1 100 150 Terminator Output High Volt Output Current Sink Current Output Capacitance Leakage Current Ground Driver Impedance Thermal Shutdown Note 3. Open circuit failsafe voltage. VO IO ISINK CO ILEAK ZG 2 Copyright © 1999 Rev. 1.1 10/00 3 PRODUCT DATABOOK 1996/1997 LX5240 M U LT I M O D E , P L U G P AND UltraMAX P L AY S C S I T E R M I N AT O R D ATA RODUCTION S HEET ELECTRICAL CHARACTERISTICS Parameter Symbol Test Conditions Min. 0.8 DISCONNECT A/B = 0V DISCONNECT A/B = 2.4V 0.8 MASTER / SLAVE = 0V MASTER / SLAVE = 2.4V 100 100 2.0 10 LX5240 Typ. Max. 2.0 10 Units DISCONNECT Section (Plug n' Play) DISCONNECT A/B Thresholds Input Current VTH IIL IIH VTH (MS) IIL (MS) IIH (MS) V µA nA V µA nA MASTER / SLAVE Section MASTER / SLAVE Thresholds Input Current BLOCK DIAGRAM DISCONNECT (-) RSE RLVD (+) VBG RLVD Ground Driver FIGURE 1 — LX5240 Block Diagram 4 Copyright © 1999 Rev. 1.1 10/00 PRODUCT DATABOOK 1996/1997 UltraMAX M U LT I M O D E , P L U G P AND LX5240 P L AY S C S I T E R M I N AT O R D ATA RODUCTION S HEET A P P L I C AT I O N S C H E M AT I C 5V TERM POWER DIFFSENSE HOST PERIPHERAL DIFFSENSE (1.3V) TERM POWER DIFFSENSE 5V ~~ 2.2µF VTERM DB (0) DB (0) + DB (7)DB (7)+ DB (0) DB (0) + DB (7)DB (7)+ VTERM 2.2µF Plug n' Play LX5240 ~~ LX5240 Plug n' Play M/S* M/S TERMPWR DIFFSENSE DIFFSENSE VTERM DIFFSENSE DIFFSENSE TERMPWR VTERM Plug n' Play ATN ATN + ACK ACK + SCSI CABLE ATN ATN + ACK ACK + ~~ Plug n' Play LX5240 ~~ LX5240 M/S M/S Note: Single-ended the + signals become ground, DIFFSENSE < 0.5V. * M/S = MASTER/SLAVE FIGURE 2 — LX5240 Application Schematic UltraMAX is a trademark of LinFinity Microelectronics Inc. PRELIMINARY DATA - Information contained in this document is pre-production data, and is proprietary to LinFinity. It may not modified in any way without the express written consent of LinFinity. Product referred to herein is offered in sample form only, and Linfinity reserves the right to change or discontinue this proposed product at any time. Copyright © 1999 Rev. 1.1 10/00 5