LX5248CPW

UltraMAX T HE TM LX5248/LX5249 D ATA 9 - L I N E LV D S C S I T E R M I N A T O R I NFINITE P OWER OF I N N O VAT I O N P RELIMINARY S HEET DESCRIPTION The LX5248/49 IC is a Low Voltage Differential (LVD) Terminator designed to comply with the LVD termination specification in the SPI-2 document. The LX5248/ 49 is designed specifically for LVD applications. Because the LX5248/49 supports only LVD, it has lower output capacitance than multimode terminators such as the LX5240. The LX5248/49 Utilizes Linfinity’s UltraMAX Technology which delivers the ultimate in SCSI bus performance while saving component cost and board area. Elimination of the external capacitors also mitigates the need for a lengthy capacitor selection process. The individual high bandwidth drivers also maximize channel separation and reduces channel-to-channel noise and cross talk. The high-bandwidth UltraMAX architecture insures ULTRA-2 performance, while providing a clear migration path to ULTRA-3 and beyond. When The LX5248/49 Is Enabled, The Differential Sense (DIFFSENSE) Pin Supplies A Voltage Between 1.2V And 1.4V. In application, the terminator DIFFSENSE output is connected to the system DIFFSENSE line. If there are no single ended or HVD devices attached to the system the LVD output will be enabled. If the DIFFSENSE line is LOW, indicating a single ended device, the LX5248/49 output will be HiZ. If the DIFFSENSE line is HIGH, indicating a high voltage differential device the LX5248/49 output will be HiZ. The LX5248/49 IC Has A TTL Compatible DISCONNECT Pin. The LX5248/49 is active LOW. During sleep mode, power dissipation is reduced to a meager 5µA, while also placing all outputs in a HI Z state. Also during sleep mode, the DIFFSENSE function is disabled and is placed in a HI Z state. K E Y F E AT U R E S s 2.5pF Typical Disabled Output Capacitance s Fast Response, No External Capacitors Required s 5µA Supply Current In Disconnect Mode s 20mA Supply Current During Normal Operation s Logic Command Disconnects All Termination Lines s Diffsense Line Driver s Current Limit And Thermal Protection s Compatible With The Pending SPI-2 LVD Specification s Pin Compatible With Industry Standard Multi-Mode Terminators s For UCC5240 Pin Compatible LVD ONLY Terminator (See LX5245/5246) NOTE: F or current data & package dimensions, visit our web site: http://www.linfinity.com. PRODUCT HIGHLIGHT B U S V O LTA G E / V OD VOD = V(-) - V(+), Logic = 0 V(+) 100mV 0V NEGATED VCM V(-) -100mV LX5248/49 LX5248/49 PA C K A G E O R D E R I N F O R M AT I O N TA (°C) 0 to 70K DB Plastic SSOP 36-pin LX5249CDBK PW Plastic TSSOP 24-pin LX5249CPWK PW Plastic TSSOP 28-pin LX5248CPW Note: All surface-mount packages are available in Tape & Reel. Append the letter "T" to part number. (i.e. LX5249CPWT) Copyright © 2001 Rev. 0.6 10/00 LINFINITY MICROELECTRONICS INC. 11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570 1 PRODUCT DATABOOK 1996/1997 LX5248/LX5249 9 - L I N E LV D S C S I T E R M I N A T O R P RELIMINARY UltraMAX D ATA S HEET PACKAGE PIN OUTS N.C. N.C. N.C. 1+ 12+ 2HEATSINK/GND HEATSINK/GND HEATSINK/GND 3+ 34+ 45+ 5DISCONNECT GND 1 2 3 4 5 6 7 8 9 10/ 11/ 12/ 13/ 14/ 15/ 16/ 17/ 18/ 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 A B S O L U T E M A X I M U M R AT I N G S (Note 1) TermPwr Voltage .............................................................................................. +6.5V Signal Line Voltage ................................................................................... 0V to 6.5V Differential Voltage ................................................................................... 0V to 6.5V Operating Junction Temperature Plastic (PW Package) ................................................................................... 150°C Storage Temperature Range .............................................................. -65°C to 150°C Lead Temperature (Soldering, 10 seconds) .................................................... 300°C Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. T H E R M A L D ATA DB PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA PW PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA 100°C/W 50°C/W VTERM HVD LVD SE 99+ 88+ HEATSINK/GND HEATSINK/GND HEATSINK/GND 77+ 66+ DIFF B DIFFSENSE MASTER/SLAVE Junction Temperature Calculation: TJ = TA + (PD x θJA). The θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. LX5249C ("N.C." = No Internal Connection) DB PACKAGE (Top View) 1+ 12+ 23+ 34+ 45+ 5DISCONNECT GND 1 2 3 4 5 6 7 8 9 10/ 11/ 12/ 24 23 22 21 20 19 18 17 16 15 14 13 MASTER / SLAVE FUNCTION TABLE MASTER / SLAVE L* H Open (Pull-up) DIFFSENSE Status HI Z 1.3V 1.3V Output Current 0mA 15mA Source 15mA Source VTERM N.C. 99+ 88+ 77+ 66+ DIFFSENSE MASTER/SLAVE * When in Low state, terminator will detect state of DIFFSENSE line. LX5249CPW ("N.C." = No Internal Connection) PW PACKAGE (Top View) N.C. 1+ 12+ 2N.C. 3+ 34+ 45+ 5DISCONNECT GND 1 2 3 4 5 6 7 8 9 10/ 11/ 12/ 13/ 14/ 28 27 26 25 24 23 22 21 20 19 18 17 16 15 DIFFSENSE / POWER UP / POWER DOWN FUNCTION TABLE LX5248/LX5249 DISCONNECT L L L H Open DIFFSENSE L < 0.5V 0.7V to 1.9V H > 2.4V X X Outputs Status Type Disable Enable Disable Disable Disable HiZ LVD HiZ HiZ HiZ Quiescent Current 2mA 21mA 2mA 10µA 10µA VTERM LVD 99+ 88+ N.C. 77+ 66+ DIFFB DIFFSENSE MASTER/SLAVE LX5248CPW ("N.C." = No Internal Connection) PW PACKAGE (Top View) 2 Copyright © 2001 Rev. 0.6 1/01 PRODUCT DATABOOK 1996/1997 UltraMAX 9 - L I N E LV D S C S I T E R M I N A T O R P RELIMINARY LX5248/LX5249 D ATA S HEET (Note 2) R E C O M M E N D E D O P E R AT I N G C O N D I T I O N S Parameter Termpwr Voltage Signal Line Voltage Disconnect Input Voltage Operating Junction Temperature Range LX5248 / LX5249 Note 2. Range over which the device is functional. Symbol VTERM Recommended Operating Conditions Min. Typ. Max. 3.0 0 0 0 5.25 5.0 VTERM 70 Units V V V °C ELECTRICAL CHARACTERISTICS (Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0°C ≤ TA ≤ 70°C. TermPwr = 3.3V, DISCONNECT: LX5248/49 = L. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) Parameter LVD Terminator Section TermPwr Supply Current Common Mode Voltage Offset Voltage (Fail Safe Bias Voltage) Differential Terminator Impedance Common Mode Impedance Output Capacitance Output Leakage Mode Change Delay Symbol Test Conditions LX5248 / 5249 Min. Typ. Max. 21 5 1.25 112 105 200 2.5 0 1 150 1.3 25 10 1.375 125 110 300 2 Units LVD ICC VCM VFSB ZD ZCM CO ILEAK tDF VDIFF IDIFF ISINK (DIFF) ISINK (DIFF) VTH IIL VTH (MS) IIL (MS) All term lines = Open DISCONNECT: LX5248/49 = H Open circuit between - and + (see Note 3) VOD = -1V to 1V 0V to 2.5V DISCONNECT: LX5248/49 = H DISCONNECT: LX5248/49 = H, VLINE = 0 to 4V, TA=25°C DISCONNECT: LX5248/49 = H, VTERM = 0V, VLINE = 2.7V DIFFSENSE = 1.4V to 0V 1.125 100 100 100 100 1.2 5.0 mA µA V mV Ω Ω pF µA µA ms V mA µA µA V µA V µA DIFFSENSE Section DIFFSENSE Output Voltage DIFFSENSE Output Source Current DIFFSENSE Sink Current DIFFSENSE Output Leakage DIFFSENSE = 0V VIN = 2.75V DISCONNECT: LX5248/49 = H, TA = 25°C 1.4 15.0 200 10 2.0 10 2.0 10 DISCONNECT Section DISCONNECT Threshold Input Current 0.8 DISCONNECT: LX5248/49 = 0V 0.8 MASTER / SLAVE: LX5248/49 = 0V MASTER / SLAVE Section MASTER / SLAVE Threshold Input Current Note 3. Open circuit failsafe voltage. Copyright © 2001 Rev. 0.6 1/01 3 PRODUCT DATABOOK 1996/1997 LX5248/LX5249 9 - L I N E LV D S C S I T E R M I N A T O R P RELIMINARY UltraMAX D ATA S HEET BLOCK DIAGRAM Power ON VTERMPWR Internal VREF 1.30V 1.07mA 1 of 9 HVD LVD ZD(-) 52.5 SE LVD (-) LVD 1.25V Zcm 200 ZD(+) 52.5 HVD LVD LVD (+) M/S 10mA SE DIFFSENSE 1.07mA HVD LATCH LVD DIFF B Window Comp. SE HVD LVD SE Power ON Power ON & Mode Change Delay FIGURE 1 — LX5248 / 5249 Block Diagram 4 Copyright © 2001 Rev. 0.6 1/01 PRODUCT DATABOOK 1996/1997 UltraMAX 9 - L I N E LV D S C S I T E R M I N A T O R P RELIMINARY LX5248/LX5249 D ATA S HEET FUNCTIONAL PIN DESCRIPTION Pin Designator 1-, 2-, 3-, 4-, 5-, 6-, 8-, 8-, 9-/ VTERM Description Negative signal termination lines. Power supply pin for terminator. Connect to SCSI bus TERMPWR. Must be decoupled by one 4.7µF low-ESR capacitor for every three terminator devices. It is absolutely necessary to connect this pin to the decoupling capacitor through a very low impedence (big traces on PCB). Keeping distances very short from the decoupling capacitors to the VTERM pin is also critical. The value of the decoupling capacitor is somewhat layout dependant and some applications may benefit from highfrequency decoupling with 0.1µF capacitors right at VTERM pin. Enables / disables terminator. See Power Down Function Table for logic level per device. Terminator ground pin. Connect to ground. Sometimes referred to as M/S pin in this data sheet. Used to select which terminator is the controlling device. MASTER/SLAVE pin High or Open enables the DIFFSENSE output drive. Please see MASTER/SLAVE Function Table. This is a dual function pin. It drives the SCSI bus DIFFSENS line. It is also the sense pin to detect the SCSI bus mode (LVD, SE or HVD). DIFFSENSE output drive can be disabled with Low level on the MASTER/SLAVE pin. Please see DIFFSENSE and MASTER/SLAVE Function Tables. Internally connected to DIFFB pin through 20kOhm resistor. Internally connected to DIFFSENSE pin through 20kOhm resistor. It can be used as a mode sense pin when the device is a non-controlling terminator (MASTER/SLAVE pin is Low). An RC filter (20kOhm / 0.1µF) is not required on the LX5249, as it has an internal timer. Single-ended output; when High, terminator is operating in SE mode. Low Voltage Differential output. When High, terminator is operating in LVD mode. High Voltage Differential output. When High, terminator is operating in HVD mode. Attached to die mounting pad, but not bonded to GND pin. Pins should be considered a heat sink only, and not a true groung connection. It is recommended that these pins be connected to ground, but can be left floating. 1+, 2+, 3+, 4+, 5+, 6+, 7+, 8+, 9+/ Positive signal termination lines. DISCONNECT/ GND/ MASTER / SLAVE/ DIFFSENSE/ DIFFB/ SE/ LVD/ HVD/ HEATSINK/ Copyright © 2001 Rev. 0.6 1/01 5 PRODUCT DATABOOK 1996/1997 LX5248/LX5249 9 - L I N E LV D S C S I T E R M I N A T O R P RELIMINARY UltraMAX D ATA S HEET A P P L I C AT I O N S C H E M AT I C TERM POW ER V HOST TERM P E R IP H E R A L 11+ 1V 1+ TERM TERM POW ER LX5248 LX5249 D IS C O N N E C T D IS C O N N E C T M /S GND D a ta L in e s ( 9 ) 99+ 99+ LX5248 LX5249 D IS C O N N E C T D IS C O N N E C T D IF F S E N S E D IF F B * D IF F S E N S E D IF F B * M /S GND V 4 .7 µ F TERM 11+ 1V 1+ TERM LX5248 LX5249 D IS C O N N E C T M /S GND D a ta L in e s ( 9 ) 99+ 99+ LX5248 LX5249 D IS C O N N E C T 4 .7 µ F D IF F S E N S E D IF F B * D IF F S E N S E D IF F B * M /S GND V TERM 11+ 1V 1+ TERM LX5248 LX5249 D IS C O N N E C T M /S GND C o n tr o l L in e s ( 9 ) 99+ 99+ LX5248 LX5249 D IS C O N N E C T D IF F S E N S E D IF F B * D IF F S E N S E D IF F B * M /S GND * D IF F B P in n o t p r e s e n t o n L X 5 2 4 8 C P W /5249C PW P a c k a g e s . M u s t c o n n e c t D IF F S E N S s ig n a l to D IF F S E N S E p in o n P W package. FIGURE 2 — LX5248 / 5249 Application Schematic UltraMAX is a trademark of Linfinity Microelectronics Inc. PRELIMINARY DATA - Information contained in this document is pre-production data, and is proprietary to LinFinity. It may not modified in any way without the express written consent of LinFinity. Product referred to herein is offered in sample form only, and Linfinity reserves the right to change or discontinue this proposed product at any time. 6 Copyright © 2001 Rev. 0.6 1/01