LX7302CLQ

LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Description Features The LX7302 is a single phase step down DC-DC controller IC designed to drive a high side N-channel MOSFET and a low side N-channel synchronous rectifier. The LX7302 uses a fixed on-time hysteretic control approach for fast transient response. Regulation is accomplished on a pulse-by-pulse basis without the need for an integrating error amplifier. The constant on-time is determined by the product of the ratio of the input to output voltage and the user adjustable switching period.  Integrated High & Low Side Drivers The output voltage is programmable by an external reference applied to RS1 (in External Reference Mode) or by the VID pins (in self referenced mode). When using the VID pins, there are four possible reference levels programmed by resistors attached to the RS# pins. A droop function is supported to reduce the output voltage under heavy loads minimizing overshoot upon load release.  Input Voltage Range 5V to 26V  200kHz to 1MHz Switching Frequency  Differential Feedback  Inductor Current Sensing  Droop Control  Enable/Disable  VID Control or Ext Reference  Power Saving Mode  OCP, OVP, UVP, OTP, UVLO Applications  Microprocessor Core  DDR Memory  Notebook Computers The LX7302 has protection functions that latch off the power MOSFETs in the event of a fault. Fault conditions are under voltage, over voltage and over temperature. A power good indicator is provided. A cycle-by-cycle current limit will limit the peak current in the lower MOSFET. If the output voltage should drop as a result of sustained current limit, the under voltage detect will trip and shut off the converter. Under voltage lock out (UVLO) keeps the converter off in the event the VCC voltage is too low. Figure 1. Product Highlight Copyright © 2012 Rev. 1.0, 12/23/2012 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 1 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Typical Application Diagrams Figure 2: Typical Application Diagram Copyright © 2012 Rev. 1.0, 12/23/2012 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 2 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Pin/Ball Configuration 20 BST UG POK RS3 RS2 19 18 17 16 1 15 MSC 7302 xxxx 2 3 4 14 13 12 5 11 6 7 8 9 CSN EN/P VID1 VID0 TON LQ PACKAGE (Top View) Exposed Pad = GND 10 RoHS / Pb-free 100% Matte Tin Finish Figure 3: Pinout Ordering Information Ambient Temperature Type Package Part Number Packaging Type 0°C to 85°C RoHS compliant, Pb-free QFN 3x3 20L LX7302CLQ LX7302CLQ-TR Bulk/Tube Tape and Reel Thermal Properties Thermal Resistance θJA Min Typ 39 Max Units °C/W Note: The Jx numbers assume no forced airflow. Junction Temperature is calculated using TJ = TA + (PD x JA). In particular, θJA is a function of the PCB construction. The stated number above is for a four-layer board in accordance with JESD-51 (JEDEC). Copyright © 2012 Rev. 1.0, 12/23/2012 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 3 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Pin Description Pin Pin Number Designator 1 BST 2 3 UG POK 4 RS3 5 RS2 6 RS1 7 RS0 8 RT 9 AGND 10 FBP 11 TON 12 VID0 Copyright © 2012 Rev. 1.0, 12/23/2012 Description Boost - Power pin - Used for the upper MOSFET driver charge pump. Connect a 100nF capacitor from the BST pin to the SW pin. Upper Gate – Power Pin - Connect to the gate of the High side N-ch MOSFET(s). Power OK – Logic Output Pin – Open drain logic; hi – Z indicates power good. Resistor 3 – Signal Pin - Reference voltage 3 is programmed using a resistor to ground. The reference current based on the value of RT will flow through the RS3 programming resistor. Resistor 2 – Signal Pin - Reference voltage 2 is programmed using a resistor to ground. The reference current based on the value of RT will flow through the RS2 programming resistor. This dual use pin is also used to program the reference mode so the IC uses either internal or external reference. Grounding RS2 selects the internal reference mode. Resistor 1 – Signal Pin - Reference voltage 1 is programmed using a resistor to ground. The reference current based on the value of RT will flow through the RS1 programming resistor. When using an external reference, (with RS2 grounded), the external reference is applied to the RS1 pin. Resistor 0 – Signal Pin – Reference voltage 0 is programmed using a resistor to ground. The reference current based on the value of RT will flow through the RS0 programming resistor. Resistor Switching Period – Signal Pin – Sets the reference current for the IC. Reference current is VRT/RRT. For normal operation, RRT should be 49.9kΩ to AGND. Analog Ground Reference – Signal Pin – Connect to ground at the point of regulation. Feedback Positive – Signal Pin – Connect to the output at the point of regulation. TON programming – Signal pin – This pin is used to control the switch on-time and indirectly controls the switching frequency in the steady state. A resistor connects from this pin to the input voltage for the power converter. Voltage Programming 0 – Logic Input – Logic input used to select one of 4 possible resistor programmable reference levels. Connect to system ground when not used. Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 4 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Pin Pin Number Designator 13 VID1 14 EN/P 15 CSN 16 CSP 17 OCP 18 VCC 19 LG 20 SW EP GND Copyright © 2012 Rev. 1.0, 12/23/2012 Description Voltage Programming 1 – Logic Input - Logic input used to select one of 4 possible resistor programmable reference levels. Connect to system ground when not used. Enable/Power Save – Signal Pin - Tri level “logic” pin used to enable the IC and to select either FCCM mode or PSM mode. Low level disables the IC; float this pin to select FCCM; connect to VCC to select PSM. Current Sense Negative – Signal Pin – This pin is used as the reference pin for the measuring the current in the external inductor for the droop function. Grounding this pin disables the droop function. Current Sense Positive – Signal Pin – This pin is used to measure current in the external inductor to be used for the droop function. May be left floating when not used (CSN connected to GND). OCP – Signal Pin - This pin is used to set the switch current limit. A programming resistor connects from this pin to the SW pin. VCC (Chip Power Supply) – Power Pin – This pin provides power to the IC. It should be decoupled to GND with at least 100nF. Lower Gate – Power Pin – Connect to the gate of the Synchronous rectifier N-ch MOSFET(s). Switch Node – Power Pin - This pin connects to the line or input side of the power inductor and the common point of the high side and low side switches. Ground – Power Pin – The Exposed Pad of the IC is to be connected to the GND plane. When connecting to the ground plane 12 mil diameter vias spaced on a 47mil matrix should be used to keep inductance low and to provide a path for thermal conduction. Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 5 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Functional Block Diagram Figure 4: Block Diagram Copyright © 2012 Rev. 1.0, 12/23/2012 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 6 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Absolute Maximum Ratings Performance is not necessarily guaranteed over this entire range. These are maximum stress ratings only. Exceeding these ratings, even momentarily, can cause immediate damage, or negatively impact long-term operating reliability. Min -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -5 -5 -0.3 -0.3 0 -25 VCC to GND BST, UG to SW SW to GND LG to GND TON, SW to GND ( 0.4V 1 1 VREF3 = (1.25 x (RRS3 + 1000))/50.9 x 103 Note: The reference voltages must be programmed such that RRS1 || RRS2 > 17.5k. When the VID voltage is changed, the slew rate of change is controlled by an internal DAC that is clocked by an internal oscillator. The DAC steps the output in 20mV steps. For VID changes the DAC steps at a clock rate that is 10x faster than the clock rate used for the soft start slew rate. When the DAC has finished stepping, it will apply the RS# input so that there is no quantization error in the final value. Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 16 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Operation Theory (Continued) Soft Start EN/P Voltage IC State Mode Soft start is implemented using a digital soft-start technique. In this method the reference voltage for the feedback comparator is increased in 20mV steps at a fixed rate until the programmed output voltage level is reached. Soft-start does not begin unless the UVLO start up criterion is met and the device is enabled via the EN/P pin. Low < 0.3V Disable No Output Switching Mid (float) >0.5V;1.8V Enable PSM The soft-start process in VID mode initially selects the voltage programmed at the RS2 pin as the reference. After the output is up and settled for delay of “Power On Default Voltage Period”, the VID selection inputs are then activated. The LX7302 monitors internal IC temperature and generates an over temperature fault if the temperature threshold is exceeded. If an over temperature fault occurs, the DC-DC converter will stop switching and the UG and LG outputs will turn the external MOSFET switches off. The driven MOSFETs remain turned off until the VCC power or EN/P pin is cycled. The soft-start process in REFIN mode will not begin until the external reference (applied to the RS1 pin) is at least 0.4V. The soft-start process ramps at a fixed dV/dt rate such that higher output voltages take longer to reach. REFIN Mode Shutdown If operating in REFIN mode and if the voltage on the RS1 pin is brought below 0.4V, the controller will shutdown (switches become off state; driving external MOSFET VGS = 0). The controller will remain latched off unless VCC is cycled above and below the UVLO threshold or the Enable pin is cycled off, then on. Output Over/Under Voltage Protection If an over-voltage fault or under-voltage fault occurs on the output as sensed at the feedback input, the DC-DC converter will stop switching and the UG and LG outputs will turn the external MOSFET switches off. A UVP condition must exist for 3 consecutive PWM cycles, but an OVP condition is triggered immediately. The driven MOSFETs remain turned off until the VCC power or EN/P pin is cycled. Input Under Voltage Lockout Protection EN/P Enable/Power Save Mode The EN/P input programming pin is a dual purpose pin; it provides the enable/disable function and also provides the means to select between the PSM mode/FCCM mode. If allowed to float, the enabled and FCCM mode is selected. The table below describes the function: Copyright © 2012 Rev. 1.0, 12/23/2012 Over Temperature Protection If there is a loss of IC input power (VCC) such that VCC drops below the UVLO threshold, the DC-DC converter will stop switching and the UG and LG outputs will turn the external MOSFET switches off. The driven MOSFETs remain turned off until the VCC power recovers. Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 17 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Operation Theory (Continued) Over Current Protection Droop Over current protection is achieved by sensing current through the low side MOSFET. A bias current equal to ½ IRT flows through an external resistor connected to the OCP pin to the SW pin; this sets the current limit threshold. The current limit is set by the equation: The output current is monitored by sensing the current flow in the DCR of the inductor. The voltage across the DCR can be measured across the capacitor if the following relationship exists: Cs x Rs = L/DCR I LIMIT  0.5  I RT  ROCP RDSON Where: ILIMIT = Output inductor ripple current peak; the magnitude of the inductor peak to peak current is determined by the value of TON, VIN, VOUT, and the output inductor value. The DC current level will be approximately ½ the inductor peak to peak current less than ILIMIT. SOFT SHUTDOWN When the output is disabled or shutdown as the result of a fault condition, a soft shutdown switch will close across the output and allow the output capacitor to discharge to GND. Dynamic Changes of Reference Voltage When a reference voltage change is detected on REFIN or the VID0 or VID1 pin, the protections for OVP, UVP and OCP are temporarily suspended while the DAC transitions to the new value. Switching mode is forced to FCCM during reference changes. When the digital stepper has transitioned between the initial and final levels, the protection functions are re-enabled, and if active, PSM mode is restored. The DAC does not control the REFIN slew rate, but it does track it and ensures the protection features are disabled and FCCM mode is active when the REFIN is transitioning. Copyright © 2012 Rev. 1.0, 12/23/2012 Increasing Rs and Cs will result in lower ripple and a slower response time for the sensed voltage across Cs. The droop function simulates a resistor in series with the output that provides a voltage drop proportional to the loading current. The droop amplifies the voltage across the sense capacitor with a programmable gain that is determined by the value of RCSP: VDROOP  VCS  15k RCSP The value of RCSN should be set equal to RCSP to minimize offset error due to op amp bias current. For temperature compensation, a PTC resistor can be used in place of RCSP. The Droop function can be disabled by grounding the CSN pin. Power Good The power good signal is an open drain output that is latched to high impedance when the feedback voltage becomes greater than 90% of the steady state internal reference voltage. POK becomes low impedance to GND if a fault condition occurs. Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 18 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Application Example As an example for calculating the component values, assume the following situation: VIN = 12VDC; FSW = 215kHz; L = 560nH; LDCR = 1mΩ Outputs: VID0 = 1.25V, VID1 = 1.036V, VID2 = 0.943V, VID3 = 0.840V Switching Frequency The requirement for on time at a 1.25V output is: TON  VOUT 1.25   484ns FSW  VIN 215  103  12  20     15k   6k  RS  RCSP  50  For this case: TON  VIN  0.5V   4.45  10 12  VOUT 484  10 9  12  0.5  1.0 M 4.45  10 12  1.25 RCSP = 4.7kΩ for a PTC consider Panasonic ERAS27J472V. Use a 1M, 1% resistor. NOTE: In cases with short values for TON, there can be timing issues created by the additional delays associated with the responsiveness of the MOSFETs, particularly during start up. For these cases it may be necessary to increase TON. Copyright © 2012 Rev. 1.0, 12/23/2012 Consider a case requiring an additional droop of 50mV when there is 20A of inductor current. With an inductor DCR of 1mΩ, there will be a corresponding DCR voltage drop of 20A x 1mΩ = 20mV. The droop function gain required is 50mV/20mV = 2.5. Using the equations below, the sum of RS and RCSP must equal 6kΩ. It is desirable to keep Rs greater than 400Ω to keep its power dissipation low. The value of RCSP should reflect a standard PTC value. Also keeping RCSP >> Rs helps minimize the offset error by maximizing the Cs voltage. A good compromise is to use RCSP = 4.7kΩ and Rs = 1.3kΩ. VDCR 15k  RS  RCSP VDROOP We can then calculate RTON: RTON  Droop Calculations (refer to DROOP section above) RCSN = RCSP = 4.7kΩ Rs = 1.3kΩ L 560nH   0.43F DCR  Rs 1m  1.3k Cs = 0.47µF Cs  To temperature compensate for the rise in DCR with temperature it is necessary to match the temperature coefficient of the inductor DCR (winding resistance) to that of RCSP. The copper resistance is about 3500PPM/°C. A PTC like the Panasonic ERA-S27J472V gives a tempco of 2700PPM/°C, which is close to the required tempco in an economical PTC 0805 resistor style. Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 19 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Application Example (Continued) VID Calculations The value of RRT is used to scale the IC reference current which affects the VID programming, slew rate control, and the OCP pin programming current. VID programming voltages are trimmed by the factory with RRT = 49.9kΩ: RRS 0  VRS0  50.9 103 1000 50.9k 1000 49.9k 1.25 RRS1  VRS1  50.9 103 1000 42.2k 1000 41.2k 1.25 RRS 2  VRS2  50.9 103 1000 38.4k 1000 37.4k 1.25 VRS3  50.9 103 RRS 3  1000 34.2k 1000 33.2k 1.25 Current Limit Calculations Over current protection is achieved by sensing current through the low side MOSFET. Therefore, the output DC current limit threshold requires knowledge of the RDSON value for the lower MOSFET. RDSON increases with temperature, which must be considered to avoid false current limit detection. Also considered is the inductor ripple current, which will play a role in determining the DC level at the current limit threshold. Inductor ripple current is determined by the value of the output inductor, TON, VIN, and VOUT. The exact value of the current limit threshold is difficult to predict due to the number of variables involved; however, a reasonable approximation can be made using worse case conditions. . Copyright © 2012 Rev. 1.0, 12/23/2012 Using the application schematic as an example, the BSC030N03LS FETs have a specified maximum RDSON of 4.7mΩ with a 4.5V gate voltage and 25°C junction temperature. Based on the datasheet, the RDSON increase at 100°C junction is 30%. 4.7mΩ x 1.3 = 6.1mΩ. Two of these FETs in parallel give a combined RDSON of 3.1mΩ The inductor is specified as 560nH +/- 20%. Increasing the inductance by 20% gives an inductance value of 672nH. Based on earlier calculations, TON = 484ns. VIN and VOUT are 12V and 1.25V, respectively. For a 30A DC current limit, we set the threshold to 30A plus ½ the inductor peak to peak ripple current:  (V  VOUT )  TON  I LIMIT  IDC LIMIT   IN  2 L    12  1.25  484ns   30 A     34 A 2  672nH   We use 34A to set ILIMIT: ROCP  I LIMIT 0.5  I RT  RDS ON  34  0.003  8.5k 0.5  24 10  6 Where: IRT = 1.25V/50.9kΩ Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 20 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Application Example (Continued) The above example is using one voltage operating point only; In an application where a range of input/output voltages are required, the VIN, VOUT, and TON values that generates the smallest ripple current (highest ILIMIT) would be used in the calculations. Note that the above method takes into account worse case conditions to avoid false current limit detection; under typical conditions the actual current limit will be much higher. Output Inductor Selection The output inductor is selected based on the desired amount of ripple current, generally determined as a percentage of maximum output current. The Ripple Factor, or percentage amount, is typically set for 30% to 50% of the maximum output current. For a Ripple Factor of 30%, and a load current of 30A, the inductor is selected: Lout Where: D = Duty Cycle = V୓୙୘ 1.25 = = 0.147 η × V୍୒ 0.85 × 10 Ʉൌ ˆϐ‹…‹‡…› The input capacitor selected is based on the desired minimum input ripple voltage seen by the converter. 500mV or less ripple is recommended. Input ripple voltage magnitude is dependent on both the input capacitor’s capacitance and ESR values. For the most part the ESR will dominate, as long as the capacitance value is large enough. To determine the minimum input capacitance and maximum ESR required at VIN = 10V, a good rule of thumb would be to establish minimum capacitance and increase this value by 10x : CMIN  T  (VIN  VOUT )  ON  k * I OUT I OUTDC  I INDC   TON 10  VRIPPLE 30  4.17  586ns  10  310F 0.5 484ns  (12  1.25)  578nH 0.3 * 30 Where: Where: k = 30% ripple factor I୍୒ ୈେ ≈ D × I୓୙୘ୈେ ≈ 0.139 × 30 ≈ 4.17A Input Capacitor Selection The input capacitor is selected for minimum ripple voltage and ripple current capability at minimum input voltage. With a minimum input voltage of 10V, calculate the capacitor ripple current as follows: I INRIPPLE  IOUT  D  1  D   12V − 0.5V × T୓୒ (12V) 10V − 0.5V 11.5 = × 484ns 9.5 = 586ns T୓୒ (10V) = 30  0.147  0.853  10.6 ARMS Copyright © 2012 Rev. 1.0, 12/23/2012 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 21 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Application Example (Continued) 330μF is the closest standard value that will satisfy the above equation. Next the maximum ESR is determined. For margin decrease the desired ripple voltage by 10%: C ESR  VRIPPLE  0.9  I OUTDC  I INDC  0.5  0.9  17m 30  4.17 Output MOSFET Selection The LX7302 gate drivers output a maximum voltage of VCC; therefore logic-level FETs should be used. When selecting the output MOSFETs, the power dissipation should be considered. For the Synchronous FET, power dissipation is mostly in conduction loss, so the MOSFET’s RDSON rating will be of primary concern. To determine the power dissipation in the synchronous FET: PSYNC  1  D  I OUTDC  RDSON 2 Use the maximum specified RDSON of the MOSFET at 100°C. This number can be derived from the manufacturer’s graph of RDSON vs. Temperature. For the Control FET, both switching losses and conduction losses must be considered. Usually a trade-off between low gate charge and low RDSON is considered. Many manufacturers provide a Figure Of Merit (FOM) on their datasheets, which is simply the product of RDSON and gate charge. Consider the lowest FOM when choosing the Control MOSFET. Copyright © 2012 Rev. 1.0, 12/23/2012 To determine switching losses, the Control FET’s on and off switching times must first be determined. Switching times are dependent on the LX7302’s drive current available during the MOSFET on and off switching period. Each period is divided into two distinct time periods based on gate charge values, QGD and QGS2. QGS2 is the Gate to Source charge that occurs between the MOSFET gate threshold voltage (VTH) and the Miller Plateau voltage. Note that QGS2 is not to be confused with QGS. Most manufacturers do not specify QGS2 or Miller Plateau voltage; however they can be derived easily from the manufacturer’s graph of gate voltage vs. charge. See Figure 3 for details. Once the values for QGS2, Miller Plateau Voltage, and QGD are known, the two switching periods are calculated and then added together for the total switching period: QGS 2  RGD  RG  Q  RGD  RG   GD VCC  VPLATEAU V  VPlateau  VCC   TH  2   Q  RGD  RG  QGD  RGD  RG  TFALL  GS 2  VPLATEAU VTH  VPlateau    2   Where: VTH = MOSFET Threshold Voltage VPlateau = MOSFET Miller Plateau Voltage RGD = LX7302 Drive On Resistance RG = MOSFET Gate Resistance TRISE  Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 22 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Application Example (Continued) Switching losses are calculated: T T  PSW  VIN  I OUTDC  FSW   RISE FALL  2   To determine the conduction losses, use the following formula: PCOND  D  I OUTDC  RDSON 2 Use the maximum specified RDSON of the MOSFET at 100°C. This number can be derived from the manufacturer’s graph of RDSON vs. Temperature. The total Control MOSFET’s power dissipation is the sum of the switching and conduction losses: PCONTROL  PCOND  P SW RDSON (100°C) = 11mΩ VTH = 1.7V VPlateau = 3.2V QGS2 = 3.7nC QGD = 3.7nC RG = 1.3Ω RGD = 1.5Ω Using the BSC030N03LS FET as a Synchronous FET example, we use the following datasheet specification: RDSON (100°C) = 6mΩ First determine the power dissipation in the Synchronous FET. For this application we use 2 MOSFETs in parallel for a combined RDSON of 3.1mΩ: PSYNC  1  D  I OUTDC  RDSON  2 As an example, assume the following: VIN = 12V VOUT = 1V Duty Cycle = 0.098 FSW = 215kHz Continuous Output Load = 25A 1  0.098 252  3m  1.69W The power dissipation is spread across two FETs, which equals 0.85W each FET. Using the BSC057N03LS FET as a Control FET example, we use the following datasheet specifications: Copyright © 2012 Rev. 1.0, 12/23/2012 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 23 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Application Example Next determine the losses in the Control FET. The total losses are the sum of the switching loss Using the example values, determine the switching and conduction loss: losses. First determine the switching time period: PCONTROL  PCOND  P SW  0.56  0.67  1.23W QGS 2  RGD  RG  Q  RGD  RG   GD VCC  VPLATEAU V  VPlateau  VCC   TH  2   3.7 n  1.5  1.3 3.7n  1.5  1.3    9.8ns 5.0  3.2 1.7  3.2  5.0    2  Q  RGD  RG  QGD  RGD  RG  TFALL  GS 2  VPLATEAU VTH  VPlateau    2   3.7n  1.5  1.3 3.7n  1.5  1.3    7.5ns 3.2 1.7  3.2   2  TRISE  Switching loss is determined: TRISE  TFALL  2 12  25  215kHz  8.6ns  555mW PSW  VIN  I OUTDC  FSW  Figure 15. Gate Charge Definitions Next, determine conduction loss: 2 PCOND  D  I OUTDC  RDSON  0.098  252  11m  674mW Copyright © 2012 Rev. 1.0, 12/23/2012 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 24 LX7302 5V to 26V Synchronous Step Down DC-DC Controller Production Datasheet Package Dimensions QFN 3x3mm 20L Exposed Pad D b K D2 E e E2 L A A1 Dim A A1 A3 b D D2 e E E2 K L MILLIMETERS MIN MAX 0.70 0.80 0 0.05 0.20 REF 0.15 0.25 3.00 BSC 1.55 1.80 0.40 BSC 3.00 BSC 1.55 1.80 0.2 0.20 0.50 INCHES MIN MAX 0.027 0.031 0 0.002 0.008 REF 0.006 0.010 0.118 BSC 0.061 0.071 0.016 BSC 0.118 BSC 0.061 0.071 0.008 0.012 0.020 A3 Note: 1. Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm(.006”) on any side. Lead dimension shall not include solder coverage. PRODUCTION DATA – Information contained in this document is proprietary to Microsemi and is current as of publication date. This document may not be modified in any way without the express written consent of Microsemi. Product processing does not necessarily include testing of all parameters. Microsemi reserves the right to change the configuration and performance of the product and to discontinue product at any time. Copyright © 2012 Rev. 1.0, 12/23/2012 Microsemi Analog Mixed Signal Group One Enterprise Aliso Viejo, CA 92656 USA, 1-800-713-4113, 949-380-6100, fax 949-215-4996 Page 25