LX8240
800mA Very High PSRR Low-Dropout
Linear Regulator
Features
Description
High PSRR, higher than 48 dB over all
frequency up to 100kHz
High PSRR, higher than 32 dB over all
frequency up to 1MHz
+/-2% Accuracy over Temp, Supply and
Load
Adjustable Output (0.5V reference)
Over Current Limit
Thermal Protection
LX8240 is a low-dropout regulator offering the
highest Power Supply Rejection Ratio (PSRR),
higher than 48 dB over all frequency up to 100kHz,
and higher than 32 dB over all frequency up to
1MHz for LDO devices supplying 800mA of output
current. LX8240 also requires very low quiescent
current. It has separate Bias and Input supply rails
to improve efficiency and minimize power
dissipation. The VBIAS input includes a voltage
compliance range from 2.7V to 5.5V, and the VIN
supply range is 1.2V to 4.2V. The output voltage is
programmed by an external resistor divider utilizing
the 0.5V reference feedback (FB) pin allowing
output voltages as low as 1V.
Applications
Low Power Mobile Devices
Portable Devices
Post Processing for a Switching Regulator
LX8240 is an ideal selection for battery-powered
systems where the low quiescent current cannot be
compromised. It is also guaranteed to be the stable
even with only a 1µF ceramic capacitor.
To protect the device the LX8240 aso includes
internal thermal shutdown, and overcurrent limit
features.
2
5V
BIAS
OUT
8
C1
1µF
1
1.8V
IN
LX8240
FB
7
1.5V @500mA
C4
10nF
C2
10µF
C3
1µF
5
EN
GND
4
Figure 1 · Typical Application of LX8240
June 2013 Rev. 1.0
www.microsemi.com
© 2013 Microsemi Corporation
1
800mA Very High PSRR Low-Dropout Linear Regulator
Pin Configuration and Pinout
IN
1
8
OUT
BIAS
2
7
FB
N/C
3
6
N/C
GND
4
5
EN
Figure 2 · Pinout WDFN 3mm x 2mm 8L Top View
Marking: Line 1 8240
Line 2 Date / Lot Code
Line 3 * MSC
( *Pin 1 identifier )
Ordering Information
Ambient
Temperature
Type
Package
-40°C to 85°C
RoHS Compliant,
Pb-free
WDFN 3mm x 2mm 8L
Part Number
Packaging Type
LX8240ILD
Bulk / Tube
LX8240ILD-TR
Tape and Reel
Pin Description
Pin
Pin
Number Designator
2
Description
Power Source Input. Bypass IN to GND with a 1μF or greater capacitor.
1
IN
2
BIAS
3, 6
NC
4
GND
5
EN
Enable Input. Drive EN high to turn on, drive EN low to turn it off. For
automatic startup, connect EN to Bias.
7
FB
Feedback Input. Connect a resistive voltage divider from OUT to FB to set the
output voltage. OUT feedback threshold is 0.5V.
8
OUT
Bias Voltage. Bypass to GND with a 1μF capacitor or greater.
No Connect.
Ground.
Regulator Output. OUT is the output of the linear regulator. Bypass OUT to
GND with a 1μF or greater capacitor.
Block Diagram
Block Diagram
BIAS 2
IN 1
OUT
EN
5
8
REF
FB
7
4 GND
Figure 3 · Simplified Block Diagram of LX8240
Absolute Maximum Ratings
Min
Max
Units
IN to GND
-0.3
7
V
BIAS to GND
-0.3
< VEN
EN, FB to GND
-0.3
7
V
OUT to GND
-0.3
7
V
Junction Temperature
-40
150
°C
Storage Temperature
-65
150
°C
260 (+0,-5)
°C
HBM
5000
V
CDM
2000
V
Parameter
Peak Solder Reflow Temperature (40 seconds)
ESD Rating
Note: Performance is not necessarily guaranteed over this entire range. These are maximum stress ratings only.
Exceeding these ratings, even momentarily, can cause immediate damage, or negatively impact long-term
operating reliability
3
800mA Very High PSRR Low-Dropout Linear Regulator
Operating Ratings
Min
Max
Units
IN
1.2
4.2
V
BIAS
2.7
5.5
V
Output Voltage
1
4
V
Output Current
0
800
mA
-40
85
°C
Ambient Temperature
Note: Performance is generally guaranteed over this range as further detailed below under Electrical
Characteristics.
Thermal Properties
Thermal Resistance
Typ
Units
θJA
55
°C/W
θJC
12
°C/W
Note: The JX numbers assume no forced airflow. Junction Temperature is calculated using T J = TA + (PD x JA). In
particular, θJA is a function of the PCB construction. The stated number above is for a four-layer board in
accordance with JESD-51 (JEDEC).
Electrical Characteristics
Note: The following specifications apply over the operating ambient temperature of -40C ≤ TA ≤ 85C except
where otherwise noted with the following test conditions: V IN = 1.8V,VBIAS = 5.0V, VOUT = 1.5V, C1 = C3 =
1µF and C2 = 10µF at TA = 25°C.
Symbol
Parameters
Test Conditions/Comments
Min
VBIAS
Bias Voltage Range
VBIAS > VIN + 1.3V
VIN
VIN < VBIAS - 1.3V,
VIN < VOUT + 0.9V @ IOUT = 800mA
Input Voltage Range VIN < VBIAS - 1.3V,
VIN < VOUT + (0.727 / IOUT)V @ VOUT = 1.5V,
(Note 3)
Typ
Max
Units
2.7
5.5
V
1.2
4.2
V
1.2
4.2
V
IBIAS
Bias Current
IOUT = 10µA, VOUT = 1.5V
200
µA
IIN
Input Current
IOUT = 0µA, VOUT = 1.5V
20
µA
IFB
FB Biasing Current
0.5
µA
VREF
FB Reference
Voltage
VDO
Dropout Voltage
VOUT
Output Voltage
4
VFB = 0.5V, TA = 25C
-0.5
µA
0
VFB = 0.5V, TA = 85C (Note 1)
IOUT = 1mA to 800mA
0.49
0.5
0.51
-40C ≤ TA ≤ 85C
0.49
0.5
0.51
VBIAS = 4.75V, VOUT = 1.5V,
IOUT = 800mA, VIN = sweep, (Note 2)
1
V
200
mV
4
V
Electrical Characteristics
Symbol
Parameters
VBIAS Line
Regulation
Test Conditions/Comments
IOUT = 100mA, VIN = 1.8V,
VOUT = 1.5V, VBIAS = 3.1V to 5.5V
(
)
(
VIN Line Regulation
PSRR
PSRR
VBIAS PSRR
(
)
(
)
(
)
(
)
Typ
Max
Units
0.07
0.4
%/V
0.002
0.02
%/V
)
IOUT = 1mA, VBIAS = 5V,
VOUT = 1.5V, VIN = 1.7V to 4.2V
(
Load Regulation
Min
(
)
)
IOUT = 1mA to 800mA
0.0005
VIN > VOUT + 0.2V, C2 = 10µF,
VBIAS(AC) = 100mV, f = 1kHz,
ILOAD = 100mA, (Note 1)
55
VIN > VOUT + 0.2V, C2 = 10µF,
VBIAS(AC) = 100mV, f = 1MHz,
ILOAD = 100mA (Note 1)
33
VBIAS > VOUT + 1.3V, C2 = 10µF,
VIN(AC) = 100mV, f = 1kHz,
ILOAD = 100mA, (Note 1)
59
dB
VIN PSRR
dB
VBIAS > VOUT + 1.3V, C2 = 10µF,
VIN(AC) = 100mV, f = 1MHz,
ILOAD =100mA (Note 1)
ICL
Output Current Limit
IQ
Quiescent Ground
Current
33
850
mA
EN = GND
0.1
2
µA
1.3V < EN ≤ VBIAS, ILOAD = 500mA
150
200
µA
VOUT Undershoot
Over Step Load
Transient
Load step from 20mA to 450mA with rising
time of 100ns (Note 1)
33
mV
VOUT Overshoot
Over Step Load
Transient
Load step from 450mA to 20mA with falling
time of 600ns (Note 1)
23
mV
EN Input High
Voltage
1.3
V
EN Input Low
Voltage
EN Input Bias
Current
TTHERMAL
%/mA
Thermal Protection
Threshold
VEN = 1.2V
-1
0.4
V
1
µA
Rising (Note 1)
155
°C
Falling (Note 1)
125
°C
Note: 1. Guaranteed by Design
Note: 2. Dropout is defined as VIN - VOUT_LDO when VOUT_LDO is 98% of the value of VOUT_LDO for VIN = VOUT(VIN =
1.8V, VBIAS = 5V, IOUT = 800mA)
Note: 3. 0.727 is the maximum allowed power before thermal shutdown.
5
800mA Very High PSRR Low-Dropout Linear Regulator
Typical Performance Curves --
(VOUT = 1.5V)
1.506
1.5054
Load = 100mA
Load = 50mA
Load = 500mA
1.5058
1.5056
1.5052
1.505
VOUT (V)
VOUT (V)
1.5054
1.5052
1.505
1.5048
1.5046
1.5044
1.5048
1.5046
1.5042
1.5044
1.504
1.5042
1.5038
2.7
3.1
3.5
3.9
4.3
VBIAS (V)
4.7
5.1
5.5
1.7
1.5054
90
1.5052
80
3.2
3.7
4.2
70
Dropout (mV)
1.5048
VOUT (V)
2.7
Figure 5 · VIN Line Regulation, VBIAS = 5V
1.505
1.5046
1.5044
1.5042
60
50
40
30
20
1.504
10
1.5038
0
1
10
100
Load Current (mA)
1000
Figure 6 · Load Regulation, VIN = 1.8V, VBIAS = 5V
0
200
400
Load Current (mA)
600
800
Figure 7 · Voltage Dropout, VIN = 1.8V, VBIAS = 4.75V
35
1.498
30
1.496
25
Dropout (mV)
1.494
VOUT (V)
2.2
VIN (V)
Figure 4 · VBIAS Line Regulation, VIN = 1.8V
1.492
1.49
20
15
10
1.488
5
0
1.486
-40
-15
10
35
Temperature (°C)
60
Figure 8 · Output Voltage vs. Temperature
VIN = 1.8V, VBIAS = 4.75V, ILoad = 300mA
6
Load = 1mA
Load = 100mA
Load = 500mA
85
-40
-15
10
35
Temperature (°C)
60
Figure 9 · Voltage Dropout vs. Temperature
VIN = 1.8V, VBIAS = 4.75V, ILoad = 300mA
85
Typical Performance Curves -- (VOUT = 1.5V)
Typical Performance Curves --
(VOUT = 1.5V)
0.5015
60
0.501
50
0.5005
40
Gain (dB)
VREF (V)
0.5
0.4995
0.499
0.4985
30
20
0.498
10
0.4975
0.497
0
-40
-15
10
35
Temperature (°C)
60
85
Figure 10 · Reference Voltage vs. Temperature
1
10
Frequency (kHz)
100
1000
Figure 11 · VBIAS to VOUT PSRR
VIN = 1.8V, VBIAS = 4.75V, ILoad = 300mA
70
60
Gain (dB)
50
40
30
20
10
0
1
10 Frequency (kHz) 100
1000
Figure 12 · VIN to VOUT PSRR
7
800mA Very High PSRR Low-Dropout Linear Regulator
Typical Performance Curves --
Figure 13 · Power Up with 400mA Load Current
Figure 14 · Power Down with 400mA Load Current
VIN = 1.8V, VBIAS = 5V
VIN = 1.8V, VBIAS = 5V
CH1: VIN, CH3: VOUT, CH4: Load Current
CH1: VIN, CH3: VOUT, CH4: Load Current
Figure 15 · Enable Up with 400mA Load Current
8
(Start Up & Shut Down, VOUT = 1.5V)
Figure 16 · Enable Down with 400mA Load Current
VIN = 1.8V, VBIAS = 5V
VIN = 1.8V, VBIAS = 5V
CH1: VIN, CH3: VOUT, CH4: Load Current
CH1: VIN, CH3: VOUT, CH4: Load Current
Typical Performance Curves -- (Step Response & Over Current Limit)
Typical Performance Curves --
(Step Response & Over Current Limit)
Figure 17 · Dynamic Response, ILoad = 20mA to 450mA
Figure 18 · Dynamic Response, ILoad = 20mA to 450mA
VIN = 1.2V, VBIAS = 2.7V, VOUT = 1V
VIN = 1.8V, VBIAS = 5V, VOUT = 1.5V
CH2: VOUT AC, CH3: VOUT DC,
CH2: VOUT AC, CH3: VOUT DC,
CH4: Load Current
CH4: Load Current
Figure 19 · Dynamic Response, ILoad = 20mA to 450mA
VIN = 4.2V, VBIAS = 5.5V, VOUT = 4V
CH2: VOUT AC, CH3: VOUT DC,
CH4: Load Current
9
800mA Very High PSRR Low-Dropout Linear Regulator
Theory of Operation / Application Information
BIAS pin operation
The IC uses a BIAS pin to allow low RDSON. VBIAS needs to be higher than VIN by 1.3V to provide
circuit headroom since there is no internal charge pump. The VBIAS all insures the high VIN – to - VOUT
PSRR, and the low noise performance is achieved with this topology at lower cost.
Adaptive PSRR compensation
LX8240 has internal adaptive feedforward control. A typical feedforward design depends on the zero
from the external feedforward capacitance, C4 in Figure 20. In LX8240, the internal adaptive
feedforward control circuit has an automatic pole compensator to allow different frequency inputs to
experience a different zero frequency. This is equivalent to pole-zero pair in the control loop. This
method allows LX8240 to maintain high gain over a very wide frequency range. Furthermore, it
helps LX8240 sustain PSRR higher than 32dB over the entire frequency range up to 1MHz.
Setting the output Voltage
A typical LX8240 application circuit is shown in Figure 19. External component selection is driven by
the load requirement. The LX8240 develops a 0.5V reference voltage between the feedback pin and
the ground. The output voltage is set by a resistive divider according to the following formula:
(
2
5V
BIAS
OUT
)
8
C1
1uF
R1
1
1.8V
IN
LX8240
FB
7
C3
1uF
R2
5
EN
Figure 20 · Typical Application
10
1.5V @500mA
GND
4
C4
10nF
C2
10uF
PACKAGE OUTLINE DIMENSIONS
PACKAGE OUTLINE DIMENSIONS
D
D2
Dim
L
E
E2
Pin 1
K
e
A
A1
b
A3
MILLIMETERS
MIN
MAX
INCHES
MIN
MAX
A
A1
A3
0.70
0.80
0.00
0.05
0.20 REF
0.028
0.032
0.000
0.002
0.008
D
D2
b
2.00 BSC
1.50
1.75
0.18
0.30
0.079 BSC
0.059
0.030
0.007
0.012
E
E2
3.00 BSC
1.65
1.90
0.118 BSC
0.065
0.075
e
L
K
0.50 BSC
0.30
0.50
0.20
0.020 BSC
0.012
0.002
0.008
Figure 21 · LD 8-Pin WDFN Package Dimensions
Note: 1. Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm (.006”) on any side.
Lead dimension shall not include solder coverage.
Note: 2. Dimensions are in mm, inches are for reference only.
LAND PATTERN RECOMMENDATION
1.80mm
1.75mm
0.70mm
1.80mm 3.60mm
0.20mm
Pin 1
0.50mm
0.30mm
Figure 22 · LD 8-Pin WDFN Package Land Pattern
Disclaimer:
This PCB land pattern recommendation is based on information available to Microsemi by its suppliers. The actual land pattern to be used could be different depending on the
materials and processes used in the PCB assembly, end user must account for this in their final layout. Microsemi makes no warranty or representation of performance based
on this recommended land pattern.
PRODUCTION DATA – Information contained in this document is proprietary to Microsemi and is
current as of publication date. This document may not be modified in any way without the express
written consent of Microsemi. Product processing does not necessarily include testing of all
parameters. Microsemi reserves the right to change the configuration and performance of the product
and to discontinue product at any time.
11
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and alternative energy markets. Products include high-performance, high-reliability analog and
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LX8240-3/1.0