MMA001AA
DC-22GHz, 16dB Gain Low-Noise
Wideband Distributed Amplifier
Features
• Excellent combination of wide bandwidth,
low noise and high associated gain
• 1.7dB NF with >15.5dB gain at 10GHz
• Output IP3 ~26-29dBm
• Input and output matched to 50Ω
• 100% DC and RF tested
• Chip size: 2.82mm x 1.50mm x 0.1mm
Applications
• Instrumentation
• Electronic warfare
• Microwave communications
• Radar
Gain & NF
Power & OIP3
Typical Performance (CW, Typical Device, RF Probe): TA = 25°C, VDD = 8V, IDD = 60mA1
Parameter
DC - 6GHz
6 - 18GHz
18 - 22GHz
Units
Small Signal Gain
15
16
17
dB
Noise Figure
3.0
2.0
3.2
dB
Output Return Loss
15
15
12
dB
Output Power, P1dB
16
15
13
dBm
Output Power P3dB
18
17
15
dBm
Output IP3
29
28
25
dBm
Adjust VGG to set IDD = 60mA, typical value is -0.5V. Recommend IDD ~ 45mA for improved stability down to
-55°C
1
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Table 1: Absolute Maximum Ratings, Not Simultaneous
Parameter
Rating
Units
Drain Voltage (VDD)
+9
V
Gate Voltage (VGG)
-2 to 0
V
Input Power (PIN)
20
dBm
1502
°C
Operating Ambient Temperature (TA)
-55 to +85
°C
Storage Temperature
-65 to +150
°C
40
°C/W
Channel Temperature (TC)
Thermal Resistance, Channel to Die Backside (RTH)
2
Caution, ESD
Sensitive Device
MTTF > 10 hours at TC = 150°C
8
Table 2: Specifications (CW, 100% Test): TA = 25°C, VDD = 8V, IDD = 60mA3
Parameter
3
Frequency
Min
Typ
Max
Units
Small Signal Gain
20GHz
14.5
17
-
dB
Output Power, P1dB
20GHz
12
14
-
dBm
Adjust VGG to get IDD = 60mA, typical value is -0.5V
RF Probe Measurement Set-Up With Reference Planes4
TO VDD
100nF CAPACITOR
TO GROUND
100pF CAPACITOR
TO GROUND
100nF CAPACITOR
TO GROUND
MINIMIZE GAP
RFOUT
RFIN
100nF CAPACITOR
TO GROUND
50 TRANSMISSION LINE
100pF CAPACITOR
TO GROUND
100nF CAPACITOR
TO GROUND
TO VGG
1mil Au wire used for
all bonds
External DC blocks maybe required, refer to Table 3 for more information.
4
Reference planes are the same for S-parameter files downloadable on www.microsemi.com/mmics
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Typical Performance, RF Probe
VDS = 8V, IDQ = 60mA, TA = 25°C unless otherwise noted
S11 Over Bias Current
S21 Over Bias Current
S21 Over Temperature
S22 Over Temperature
S22 Over Bias Current
S11 Over Temperature
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Typical Performance, RF Probe
VDS = 8V, IDQ = 60mA, TA = 25°C unless otherwise noted
Noise Figure Over Temperature
Noise Figure Over Bias Current
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OIP3 Over Output Power Per Tone
OIP3 Over Bias Current, 6dBm/tone
OIP3 Over Bias Current, 3dBm/tone
OIP3 Over Bias Current, 0dBm/tone
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Typical Performance, RF Probe
VDS = 8V, IDQ = 60mA, TA = 25°C unless otherwise noted
P1dB Over Bias Current
P3dB Over Bias Current
IMD3 Sweep
Power Sweep
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Connectorized Test Fixture
With SMK 2.92mm Connectors
VDD Feedthru
0.1uF 100pF 100pF
0.1uF
RFIN
RFOUT
0.1uF
1.000
100pF 100pF 0.1uF
VGG Feedthru
0.950
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Typical Performance, Connectorized Test Fixture
VDS = 8V, IDQ = 60mA, TA = 25°C unless otherwise noted
S11 Over Temperature
S22 Over Temperature
S21 Over Temperature
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NF Over Temperature, IDQ = 70mA
NF Over Temperature, IDQ = 60mA
NF Over Temperature, IDQ = 50mA
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Typical Performance, Connectorized Test Fixture
VDS = 8V, IDQ = 60mA, TA = 25°C unless otherwise noted
P1dB Over Temperature
Power Sweep, -40°C
Power Sweep, +85°C
OIP3 Over Temperature, 0dBm/tone
Power Sweep, +25°C
P3dB Over Temperature
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Typical Performance, Connectorized Test Fixture
VDS = 8V, IDQ = 60mA, TA = 25°C unless otherwise noted
OIP3 Over Temperature, 6dBm/tone
OIP3 Over Temperature, 3dBm/tone
VGG Over Temperature
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IMD Sweep, +85°C
IMD Sweep, +25°C
IMD Sweep, -40°C
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Typical Performance, Connectorized Test Fixture
VDS = 8V, IDQ = 60mA, TA = 25°C unless otherwise noted
Low-Frequency S21
Low-Frequency S11, S22
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Chip layout showing pad locations.
All dimensions are in microns. Die thickness is 100 microns. Backside metal is gold, bond pad metal is gold.
Refer to Die Handling Application Note MM-APP-0001 (visit www.microsemi.com/mmics).
Table 3: Pad Descriptions
Pad #
Description
Pad Dimensions (µm)
1, 3, 7, 9
Ground
100 x 100
2
RFIN, Pad Is DC Coupled. Use External DC block
100 x 190
8
RFOUT, Pad Is DC Coupled. Use External DC Block
100 x 190
4
VDD
100 x 100
12
VGG
100 x 100
5, 6, 10, 11
Low Frequency Terminations
100 x 100
Die Backside
Must be connected to ground
-
Biasing
1. Set VGG = -2V
2. Set VDD = 8V
3. Adjust VGG to set IDD
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Information contained in this document is proprietary to Microsemi. This document may not be modified in any way without the express
written consent of Microsemi. Product processing does not necessarily include testing of all parameters. Microsemi reserves the right to
change the configuration and performance of the product and to discontinue product at any time.
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One Enterprise, Aliso Viejo CA 92656 USA
Within the USA: +1 (949) 380-6100
Sales: +1 (949) 380-6136
Fax: +1 (949) 215-4996
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and system solutions for communications, defense and security, aerospace, and industrial
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