NX2142ACUTR

NX2142/2142A SINGLE CHANNEL PWM CONTROLLER WITH FEEDFORWARD AND 5V BIAS REGULATOR ADVANCE DATA SHEET Pb Free Product n The NX2142/2142A controller IC is a compact synchron nous Buck controller IC with 10 lead MSOP package n designed for step down DC to DC converter applications with voltage feedforward functionality. Voltage n feedforward provides fast response, good line regulan tion and nearly constant power stage gain under wide n voltage input range. The NX2142/2142A controller is n optimized to convert single supply up to 24V bus voltn age to as low as 0.8V output voltage. NX2142/2142A n can function as a single supply controller with its 5V bias regulator. Internal UVLO keeps the regulator off until the supply voltage exceeds 7V where internal digital soft starts get initiated to ramp up output. The n NX2142/2142A employs fixed current limiting and FB n UVLO followed by hiccup feature. Other features in- n cludes: 5V gate drive capability , Converter Shutdown by pulling COMP pin to Gnd, Adaptive dead band con- n trol. Vin +8 to 20V 47uF MMBT3904 1uF 7 6 5 1 DESCRIPTION FEATURES Bus voltage operation from 7V to 24V 5V bias regulator available Excellent dynamic response with input voltage feed-forward and voltage mode control Fixed 600kHz, 1MHz switching frequency Internal Digital Soft Start Function Fixed internal hiccup current limit FB UVLO followed by hiccup feature Shutdown by pulling COMP pin low Pb-free and RoHS compliant APPLICATIONS Graphic Card on board converters Vddq Supply in mother board applications On board DC to DC such as 12V to 3.3V, 2.5V or 1.8V Set Top Box and LCD Display TYPICAL APPLICATION 1uF 25TQC33M BAT54A VCC REGOUT VIN BST Hdrv 2 0.1uF AO4800(half) 0.1uF NX2142 DO3316P-682 9 COMP SW 10 Vout +3.3V /3A 1000uF,30mohm 20k 27pF 5.2nF 8 Ldrv FB Gnd 3 4 AO4800(half) 1k 324 Figure1 - Typical application of NX2142 ORDERING INFORMATION Device NX2142CUTR NX2142ACUTR Rev. 1.1 10/28/07 Temperature 0 to 70o C 0 to 70o C Package MSOP-10L MSOP-10L Frequency 600kHz 1MHz Pb-Free Yes Yes 1 NX2142/2142A ABSOLUTE MAXIMUM RATINGS VCC to GND & BST to SW voltage ...................... -0.3V to 6.5V VIN to GND ........................................................ -0.3V to 30V BST to GND Voltage .......................................... -0.3V to 35V SW to GND ....................................................... -2V to 35V REGOUT to GND ................................................ 0.2 to 16V All other pins ..................................................... -0.3V to 6.5V Storage Temperature Range ................................ -65oC to 150oC Operating Junction Temperature Range ................ -40oC to 125oC ESD Susceptibility ............................................ 2kV CAUTION: Stresses above those listed in "ABSOLUTE MAXIMUM RATINGS", may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. PACKAGE INFORMATION 10-LEAD PLASTIC MSOP θJA ≈ 200o C/W BST 1 HDrv 2 GND 3 LDrv 4 VIN 5 10 SW 9 COMP 8 FB 7 VCC 6 REGOUT ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over Vcc =5V, VIN=15V and TA = 0 to 70oC. Typical values refer to TA = 25oC. PARAMETER Reference Voltage Ref Voltage Ref Voltage line regulation Supply Voltage(Vcc) VCC Voltage Range Operating quiescent current Vcc UVLO VCC-Threshold VCC-Hysteresis Supply Voltage(Vin) Vin Voltage Range Input Voltage Current Vin UVLO Vin-Threshold Rev. 1.1 10/28/07 SYM VREF Test Condition Min TYP 0.8 0.2 5 3 4.4 0.2 MAX Units V % V mA V V VCC IQ EN=HIGH VCC_UVLO VCC Rising VCC_Hyst VCC Falling Vin Vin=24V Vin_UVLO Vin Rising 7 25 9 6 V mA V 2 NX2142/2142A PARAMETER Vin-Hysteresis Oscillator (Rt) Frequency Frequency Over Vin Ramp Peak to Peak Voltage Ramp Valley Voltage Ramp Peak to Peak/Vin Gain Max Duty Cycle Min Duty Cycle Min Controllable on time Error Amplifiers Transconductance Input Bias Current Comp SD threshold Soft Start Soft Start time High Side Driver (CL=3300pF) Output Impedance , Sourcing Current Output Impedance , Sinking Current Rise Time Fall Time Deadband Time Low Side Driver (CL=3300pF) Output Impedance, Sourcing Current Output Impedance, Sinking Current Rise Time Fall Time Deadband Time Fixed OCP OCP voltage threshold FBUVLO Feedback UVLO threshold Over temperature Threshold Hysteresis Rev. 1.1 10/28/07 N SYM Vin_Hyst FS Test Condition Vin Falling NX2142 NX2142A Vin=20V Min TYP 0.5 600 1000 1 2 0.8 0.1 77 0 MAX Units V KHz KHz % V V V/V % % nS umho nA V mS mS VRAMP FS=600kHz 150 2500 Ib 0.3 Tss NX2142 NX2142A 3.4 2 100 Rsource(Hdrv) Rsink(Hdrv) I=200mA I=200mA 1 0.8 50 50 30 ohm ohm ns ns ns THdrv(Rise) 10% to 90% THdrv(Fall) 90% to 10% Tdead(L to Ldrv going Low to Hdrv going High, 10% to 10% H) Rsource(Ldrv) Rsink(Ldrv) I=200mA I=200mA 1 0.5 50 50 30 ohm ohm ns ns ns TLdrv(Rise) 10% to 90% TLdrv(Fall) 90% to 10% Tdead(H to SW going Low to Ldrv going L) High, 10% to 10% 320 percent of nominal 70 150 20 mV % °C °C 3 NX2142/2142A PIN DESCRIPTIONS PIN SYMBOL VCC PIN DESCRIPTION This pin supplies the internal 5V bias circuit. A 1uF high frequency ceramic X5R capacitor must be placed as close as possible to this pin and ground pin to provide high frequency bypass and to make the 5V regulator stable. This pin supplies voltage to high side FET driver. A minimum 0.1uF ceramic high frequency capacitor is placed as close as possible to and connected to this pin and SW pin. Power ground. This pin is the error amplifiers inverting input. It is connected via resistor divider to the output of the switching regulator to set the output DC voltage. This pin is the output of the error amplifier and together with FB pin is used to compensate the voltage control feedback loop. You can shutdown the switching regulator by pulling this pin below 0.3V. This pin is connected to source of high side FETs and provides return path for the high side driver. This pin also provides input for the OCP comparator by sensing the RDSON of the lower MOSFET. When this pin is below ground by 320mV, both drivers are shutdown and enter hiccup mode. High side gate driver output. Low side gate driver output. The output of the 5V regulator controller that drives a low current low cost external bipolar transistor or an external MOSFET to regulate the voltage at Vcc pin derived from bus voltage. This eliminates an otherwise external regulator needed in applications where 5V is not available. This regulator request a 1uF ceramic X5R type output capacitor in order to be stable. This pin provides the input voltage to the 5V regulator controller as well as the oscillator for the PWM feed forward to work. When VIN exceeds 6V, the converter starts to operate. BST GND FB COMP SW HDRV LDRV REGOUT VIN Rev. 1.1 10/28/07 4 NX2142/2142A BLOCK DIAGRAM VIN Ref Regout 4.4/4.2V VCC Bias Generator 1.25V 0.8V UVLO POR START 6V/ 5.5V COMP 0.3V VIN START 0.8V OSC Digital start Up ramp S R FB 0.6V CLAMP START POR 1.3V CLAMP Hiccup Logic OCP comparator SS_half_done 70%*Vp GND FB 320mV Q OC LDRV PWM OC Control Logic VCC SW BST HDRV COMP Figure 2 - Simplified block diagram of the NX2142 Rev. 1.1 10/28/07 5 NX2142/2142A TYPICAL APPLICATION CIRCUIT BUS BUS(8-20V) C10 47u GNDBUS U _VIN VDD 7 8 HDRV 2 1 C6 0.1u U _VCC C2 1u D1 BAT54A Ci1 Q1 2N3904 5 U1 VIN VCC 7 25TQC33M C14 BST 1 BST 1u C1 0.1u EN_REGOUT 6 2 U_HDRV M5A STM6912 EN/REG_OUT HDRV SW 10 U_SW SW Lo 1 2 DO3316P-682 VOUT OUT(5V) Co1 NX2142CUTR 1000uF, 6.3v,30mohm M6B STM6912 R15 10 5 6 GNDOUT LDRV 4 U_LDRV LDRV 4 C9 470p FB 8 FB C5 25n R7 10k C4 52p C3 3.3n R10 953 R9 3 R8 1.2k 4.99k COMP 9 COMP Figure 3- Demo board schematic(VIN=8-20V,VOUT=5V,IOUT=3A) 3 GND Rev. 1.1 10/28/07 6 NX2142/2142A Bill of Materials Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Quantity 1 1 2 3 1 1 1 1 1 1 1 2 1 1 1 1 1 1 1 Reference Ci1 Co1 C1,C6 C2,C14 C3 C4 C5 C9 C10 D1 Lo M5,M6 Q1 R7 R8 R9 R10 R15 U1 Value 25TQC33M 6MV1000W G 0.1u 1u 3.3n 52p 25n 470p 47u BAT54A DO3316P-682 AO4800 MMBT3904 10k 1.2k 4.99k 1% 953 1% 10 NX2142CUTR Manufacture SANYO SANYO Fairchild Coilcraft AOS Fairchild NEXSEM INC. Rev. 1.1 10/28/07 7 NX2142/2142A Demoboard waveforms Figure 4 - Output ripple (VIN=12V) Figure 5 - Output voltage transient response (VIN=12V, IOUT=3A) Figure 6 - Over current protection Figure 7 - Startup 100.00% 95.00% 90.00% 85.00% 80.00% Eff(%) 75.00% 70.00% 65.00% 60.00% 55.00% 50.00% 0 500 1000 1500 2000 2500 3000 3500 Iout(mA) Figure 8 - Output Efficiency(VIN=12V, VOUT=5V) Rev. 1.1 10/28/07 8 NX2142/2142A Current Ripple is calculated as APPLICATION INFORMATION IRIPPLE = Symbol Used In Application Information: VIN VOUT IOUT FS DIRIPPLE - Input voltage - Output voltage - Output current - Switching frequency - Inductor current ripple VIN -VOUT VOUT 1 × × LOUT VIN FS = ...(2) 20V-5V 5V 1 × × = 0.919A 6.8uH 20V 600kHz DVRIPPLE - Output voltage ripple Output Capacitor Selection Output capacitor is basically decided by the amount of the output voltage ripple allowed during steady state(DC) load condition as well as specification for the load transient. The optimum design may require a couple of iterations to satisfy both condition. Based on DC Load Condition The amount of voltage ripple during the DC load condition is determined by equation(3). Design Example Power stage design requirements: VINMIN=8V VINMAX=20V VOUT=5V IOUT =3A DVRIPPLE