ZL30120GGG

ZL30120 SONET/SDH/Ethernet Multi-Rate Line Card Synchronizer Data Sheet May 2006 A full Design Manual is available to qualified customers. To register, please send an email to TimingandSync@Zarlink.com. Ordering Information ZL30120GGG 100 Pin CABGA Trays ZL30120GGG2 100 Pin CABGA** Trays **Pb Free Tin/Silver/Copper Features • -40oC to +85oC Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-1244-CORE, GR-253CORE, ITU-T G.813, and compatible with ITU-T G.8261 (formerly G.pactiming) • Internal low jitter APLL provides SONET/SDH clocks including 6.48 MHz, 19.44 MHz, 38.88 MHz, 51.84 MHz and 77.76 MHz, or 25 MHz and 50 MHz Synchronous Ethernet output clocks • Programmable output synthesizers (P0, P1) generate general purpose clock frequencies from any multiple of 8 kHz up to 100 MHz • Jitter performance of