ACE9040

ACE9040 Audio Processor Advance Information Supersedes January 1997 edition, DS4289 - 2.5 DS4289 - 3.1 December 1997 ACE9040 provides all the speech signal processing and data/SAT tone filtering needed for AMPS or TACS analog cellular telephones. Transmit voice channel functions comprise a microphone amplifier, soft limiter, bandpass filter, compressor, hard limiter, lowpass filter and a gain controlled amplifier to set deviation level. Additional transmit circuits include a DTMF generator, data and SAT filters, deviation setting amplifiers for data/ST and SAT and a modulation combiner. ACE9040’s receive path comprises a bandpass filter, expander, volume control and power amplifiers to directly drive an earpiece or handsfree transducer. Gain settings, mute switches and filter characteristics are programmed via a three wire serial interface. To implement a handsfree function, both transmit and receive paths have rectifiers for signal amplitude monitoring via an external pin and signal path attenuators controlled via the serial interface. ACE9040 combines minimum power consumption with low external component count. Standby modes greatly reduce supply current and extend battery charge intervals. AMPO DTMF nc V485 BGAP TLPO SUMI SUMO MOD AVSS DATO nc AMPI PREIN TBPO CIN CRCIN VMIDTX CRCOUT nc COUT TXC RXC IPS SLO MI MICBIAS TSO RSO SD SCLK LVN ACE9040 1 RBPO EAMPI HFGIN EOUT ERCIN VDD DEC HF LI RREF BIAS AVDD DATI TSI RSI RXI nc\DVSS* nc\LEN* DVSS\DVDD* LEN\VMIDRX* DVDD\LO* VMIDRX\STBY* LO\EVDD* STBY\EPON* EVDD\nc* EPON\nc* EVSS EPOP EAMPFB EAMPO EIN ERCOUT FP64 FP64 FEATURES s Low Power and Low Voltage (3·6 to 5·0 V) Operation s s s s s s s s s Power Down Modes Direct Connections to Microphone and Earpiece Compander with wide operating range: Compressor 74 db typ., Expander 36 dB typ. SAT Bandpass and Data Lowpass Filters Handsfree Operation Supported DTMF Generator Serial Bus Controlled Gains and Filter Responses Part of the ACE Integrated Cellular Phone Chipset TQFP 64 Pin 10X10 mm or 7X7 mm Packages Note: Pin 1 is identified by moulded spot and by coding orientation. (* 7 x 7 mm package and 10 x10 mm package pinouts on page 3) Fig.1 Pin connections - top view ABSOLUTE MAXIMUM RATINGS Supply voltage Storage temperature Operating temperature Voltage at any pin 6V - 55 °C to + 150 °C - 40 °C to + 85 °C - 0.3 V to VDD + 0.3 V MI AMP COMPRESSOR FILTERS AND DEVIATION SET TLPO APPLICATIONS s AMPS and TACS Cellular Telephones s Two-Way Radio Systems RELATED PRODUCTS ACE9040 is part of the following chipset: s ACE9020 Receiver and Transmitter Interface s ACE9030 Radio Interface and Twin Synthesiser s ACE9050 System Controller and Data Modem SUMI DTMF DTMF GEN. MODULATION SUMMING AMPLIFIER SUMO MOD DATI DATA FILTER (LOW PASS) DATO SET DEVIATION FEEDBACK TSI TX SAT FILTER SET LEVELS GENERATE/ TRANSPOND TSO RSI RX SAT FILTER RSO ORDERING INFORMATION Industrial temperature range TQFP 64 lead 10 x 10 mm, 0·5 mm pitch ACE9040K/IW/FP1N - devices shipped in trays and dry packed ACE9040K/IW/FP1Q - tape mounted and dry packed TQFP 64 lead 7 x 7 mm, 0·4 mm pitch ACE9040K/IW/FP2N - devices shipped in trays and dry packed ACE9040K/IW/FP2Q - tape mounted and dry packed RXI RX FILTER EXPANDER VOLUME SCLK LEN SD CONTROL LOGIC EPOP EPON LO LINE OUTPUT STBY Fig. 2 ACE9040 Simplified Block Diagram DEC 3.3µF BIAS RREF MICBIAS 100/ BGAP 68*kΩ 10nF HANDSFREE RECTIFIER BIAS GENERATOR 2 100nF 82nF 33nF 10nF EOUT HFGIN EAMPI EAMPFB 13 1 SUB 21 23 EPOP EPON 24 7 28 150Ω RXLEVEL EARSENSE _ + VMIDRX SIDETONE LODRIVE EPH0/EPH1 26 HIZ 38 60 50 _ + VMIDTX 36 37 SCHMITT SD SATS -15dB SATDEV VMIDRX DTMF MODE HANDSFREE RECTIFIER RXC HFS TXC TXSENSE _ + VMIDTX 40 3 59 34 35 TEST [1:0] SERIAL INTERFACE PREEMPHASIS TEST [2:1] TXBPF INPSENSE 62 SLO IPS 10nF 61 HFGAIN 52 53 56 54 TBPO CIN CRCOUT CRCIN 10nF 180kΩ 100nF 55 58 51 COUT PREIN 82nF 33nF 39 AVSS 30 45 DVSS V485 22 EVSS COMPRESSOR GAIN CONTROL HARD LIMIT -8 dB TXLPF TLPO AUDIODEV VMIDTX DRIVER 29 25 3 & 97% DETECT LEVELS TEST [1:0] 92% DETECT LEVEL DTMFM MOD HF TXC 68nF SCLK SD LEN STBY TEST[0] 42 SUMI 41 48 LO DATO EPH0/ EPH1 EAMP HFATTEN 20 19 27 14 15 EAMPO VDD EVDDAVDD DVDD RBPO EIN ERCOUT ERCIN 12 RXM RXBPF EXPANDER EXPGAIN COMP[2:1] DATADEV VMIDRX 18 16 17 64Ω 33µF RXC 68nF AMPI AMPO RSO TSO SUMO TXM 43 TLPO ACE9040 180KΩ RXI 11 TONEM 10nF DATI 8 DATM LOW PASS FILTER VMIDRX VMIDRX 2 6 5 64 44 VMIDTX *VDD = 3.75V RSI 10 RXSAT FILTER 10dB TSI 9 TXSAT FILTER Fig. 3 ACE9040 Detailed Block Diagram -12 dB / 0 dB DTMF PREEMPHASIS VDO DTMF 220 kΩ 47 LVN 33 _ Vth + VDD LI 4 MLI MIS MI SOFT LIMITER 63 ACE9040 PIN DESCRIPTIONS Pin No. Pin No. Name FP2 package FP1 package Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31/32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23/24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 VDD DEC HF LI RREF BIAS AVDD DATI TSI RSI RXI RBPO EAMPI HFGIN EOUT ERCIN ERCOUT EIN EAMPO EAMPFB EPOP EVSS nc EPON EVDD STBY LO VMIDRX DVDD LEN DVSS nc LVN SCLK SD RSO TSO DATO AVSS MOD SUMO SUMI TLPO BGAP V485 nc DTMF AMPO nc AMPI PREIN TBPO CIN CRCIN VMIDTX CRCOUT nc COUT TXC RXC IPS SLO MI MICBIAS VDD supply to substrate, pin should be at highest d.c. voltage Mid-supply reference decoupling connection, 3.3 µF to GND Output from TX or RX handsfree rectifier, switched by bit “HFS” Line input Reference bias current set for all op-amps by resistor to GND Buffered mid-supply reference output Analogue VDD input Transmit data input SAT path input for locally generated tone SAT path receiver input for received tone Speech path receiver input Audio output from EXPGAIN block Output from EARSENSE amp Input to RX volume control and handsfree attenuator Expander speech output Expander time constant input, 180 kΩ to ERCOUT, 100 nF to GND Expander time constant output, 180 kΩ to ERCIN Expander speech input, 33 nF to RBPO Output from EAMP op-amp Inverting input to EAMP op-amp Earpiece driver positive output Earpiece VSS (GND) supply connection No connection Earpiece driver negative output Earpiece VDD supply input Standby output: low indicates standby state, high is VDD output @ 10 mA Line output RX path mid-supply reference voltage, 82 nF to GND Digital VDD Serial interface latch signal input, rising edge triggered Digital VSS (GND) connection No connection Low supply VDD voltage indicator comparator output, reset active low output Serial interface system clock input Serial interface data input Received (regenerated) SAT output Transmit SAT output, regenerated or transponded Transmit data filter output. Analogue VSS (GND) Modulation output: sum of Speech, Data and SAT Modulation summing amplifier output Modulation summing amplifier input Transmit audio lowpass filter output Bandgap voltage output, 10 nF to GND Hard limiter gain selection for 3.75 V or 4.85 V nominal supplies No connection DTMF tone output Auxillary op-amp output No connection Auxillary op-amp inverting input (non-inverting internally connected to VMIDTX) Transmit pre-emphasis filter input Transmit bandpass filter output Compressor audio input, 10 nF from TBPO Compressor time constant input, 100 nF to GND, 180 kΩ to CRCOUT TX path reference voltage, 82 nF to GND Compressor time constant output, 180 kΩ to CRCIN No connection Compressor audio output, 33 nF to PREIN Transmit handsfree audio level sensing rectifier smoothing filter, 68 nF to GND Received handsfree audio level sensing rectifier smoothing filter, 68 nF to GND Transmit audio gain INPSENSE adjustment block input Soft limiter output Microphone input Bias for electret or active microphone Note: FP1 = 10 x 10mm package, FP2 = 7 x 7 mm package 3 ACE9040 ELECTRICAL CHARACTERISTICS These characteristics are guaranteed over the following conditions unless otherwise stated (Note 1): TAMB = – 40 °C to + 85 °C, VDD = 3.6 V to 5.0 V Characteristic Symbol Min. Supply Current and Power Down Modes Operating supply current IDD Standby Attenuation of all inputs signals Wakeup response time Sleep (Standby with CLK stopped) Supply current* IDD(SLEEP) Delay between setting STBY bit and stopping clock Delay to starting clock after wakeup Value Typ. 15 15 40 10 200 20 100 Unit Max. mA mA dB ms µA µs µs STBY bit set VDD = 3.75 VDD = 4.85 V RREF = 100 kΩ VDD = 3.75 V RREF = 68 kΩ Conditions * Standby current measured with the 1.008 MHz clock stopped and SCLK at a level