MMBT4401LT1

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MMBT4401LT1/D Switching Transistor NPN Silicon COLLECTOR 3 1 BASE MMBT4401LT1 Motorola Preferred Device 3 MAXIMUM RATINGS Rating Collector – Emitter Voltage Collector – Base Voltage Emitter – Base Voltage Collector Current — Continuous Symbol VCEO VCBO VEBO IC Value 40 60 6.0 600 2 EMITTER Unit Vdc Vdc Vdc mAdc 1 2 CASE 318 – 08, STYLE 6 SOT– 23 (TO – 236AB) THERMAL CHARACTERISTICS Characteristic Total Device Dissipation FR– 5 Board(1) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Total Device Dissipation Alumina Substrate,(2) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Junction and Storage Temperature Symbol PD Max 225 1.8 RqJA PD 556 300 2.4 RqJA TJ, Tstg 417 – 55 to +150 Unit mW mW/°C °C/W mW mW/°C °C/W °C DEVICE MARKING MMBT4401LT1 = 2X ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS Collector – Emitter Breakdown Voltage(3) (IC = 1.0 mAdc, IB = 0) Collector – Base Breakdown Voltage (IC = 0.1 mAdc, IE = 0) Emitter – Base Breakdown Voltage (IE = 0.1 mAdc, IC = 0) Base Cutoff Current (VCE = 35 Vdc, VEB = 0.4 Vdc) Collector Cutoff Current (VCE = 35 Vdc, VEB = 0.4 Vdc) 1. FR– 5 = 1.0 0.75 0.062 in. 2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina. 3. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%. V(BR)CEO 40 V(BR)CBO 60 V(BR)EBO 6.0 IBEV — ICEX — 0.1 0.1 µAdc — µAdc — Vdc — Vdc Vdc    Thermal Clad is a trademark of the Bergquist Company. Preferred devices are Motorola recommended choices for future use and best overall value. Motorola Small–Signal Transistors, FETs and Diodes Device Data © Motorola, Inc. 1996 1 MMBT4401LT1 ELECTRICAL CHARACTERISTICS (continued) (TA = 25°C unless otherwise noted) Characteristic Symbol Min Max Unit ON CHARACTERISTICS(3) DC Current Gain (IC = 0.1 mAdc, VCE = 1.0 Vdc) (IC = 1.0 mAdc, VCE = 1.0 Vdc) (IC = 10 mAdc, VCE = 1.0 Vdc) (IC = 150 mAdc, VCE = 1.0 Vdc) (IC = 500 mAdc, VCE = 2.0 Vdc) Collector – Emitter Saturation Voltage (IC = 150 mAdc, IB = 15 mAdc) (IC = 500 mAdc, IB = 50 mAdc) Base – Emitter Saturation Voltage (IC = 150 mAdc, IB = 15 mAdc) (IC = 500 mAdc, IB = 50 mAdc) hFE 20 40 80 100 40 VCE(sat) — — VBE(sat) 0.75 — 0.95 1.2 0.4 0.75 Vdc — — — 300 — Vdc — SMALL– SIGNAL CHARACTERISTICS Current – Gain — Bandwidth Product (IC = 20 mAdc, VCE = 10 Vdc, f = 100 MHz) Collector–Base Capacitance (VCB = 5.0 Vdc, IE = 0, f = 1.0 MHz) Emitter–Base Capacitance (VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz) Input Impedance (IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz) Voltage Feedback Ratio (IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz) Small – Signal Current Gain (IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz) Output Admittance (IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz) fT 250 Ccb — Ceb — hie 1.0 hre 0.1 hfe 40 hoe 1.0 30 500 8.0 — 15 X 10– 4 30 kΩ 6.5 pF — pF MHz mmhos SWITCHING CHARACTERISTICS Delay Time Rise Time Storage Time Fall Time 3. Pulse Test: Pulse Width (VCC = 30 Vdc, VEB = 2.0 Vdc, IC = 150 mAdc, IB1 = 15 mAdc) (VCC = 30 Vdc, IC = 150 mAdc, IB1 = IB2 = 15 mAdc) td tr ts tf — — — — 15 ns 20 225 ns 30 v 300 ms, Duty Cycle v 2.0%. SWITCHING TIME EQUIVALENT TEST CIRCUITS + 30 V +16 V 0 – 2.0 V 1.0 to 100 µs, DUTY CYCLE ≈ 2.0% 1.0 kΩ < 2.0 ns 200 Ω +16 V 0 CS* < 10 pF –14 V < 20 ns 1.0 to 100 µs, DUTY CYCLE ≈ 2.0% 1.0 kΩ + 30 V 200 Ω CS* < 10 pF – 4.0 V Scope rise time < 4.0 ns *Total shunt capacitance of test jig connectors, and oscilloscope Figure 1. Turn–On Time Figure 2. Turn–Off Time 2 Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBT4401LT1 TRANSIENT CHARACTERISTICS 25°C 30 20 CAPACITANCE (pF) Q, CHARGE (nC) Cobo 10 7.0 5.0 Ccb 3.0 2.0 0.1 100°C 10 7.0 5.0 3.0 2.0 1.0 0.7 0.5 0.3 0.2 0.1 0.2 0.3 0.5 2.0 3.0 5.0 10 1.0 REVERSE VOLTAGE (VOLTS) 20 30 50 10 20 200 50 70 100 30 IC, COLLECTOR CURRENT (mA) 300 500 QT VCC = 30 V IC/IB = 10 QA Figure 3. Capacitances Figure 4. Charge Data 100 70 50 t, TIME (ns) t, TIME (ns) 30 20 tr @ VCC = 30 V tr @ VCC = 10 V td @ VEB = 2.0 V td @ VEB = 0 IC/IB = 10 100 70 tr 50 30 20 tf VCC = 30 V IC/IB = 10 10 7.0 5.0 10 20 30 50 70 100 200 300 500 IC, COLLECTOR CURRENT (mA) 10 7.0 5.0 10 20 30 50 70 100 200 300 500 IC, COLLECTOR CURRENT (mA) Figure 5. Turn–On Time Figure 6. Rise and Fall Times 300 200 t s′, STORAGE TIME (ns) ts′ = ts – 1/8 tf IB1 = IB2 IC/IB = 10 to 20 t f , FALL TIME (ns) 100 70 50 30 20 IC/IB = 10 IC/IB = 20 VCC = 30 V IB1 = IB2 100 70 50 10 7.0 30 5.0 10 20 30 50 70 100 200 300 500 10 20 30 50 70 100 200 300 500 IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA) Figure 7. Storage Time Figure 8. Fall Time Motorola Small–Signal Transistors, FETs and Diodes Device Data 3 MMBT4401LT1 SMALL–SIGNAL CHARACTERISTICS NOISE FIGURE VCE = 10 Vdc, TA = 25°C Bandwidth = 1.0 Hz 10 IC = 1.0 mA, RS = 150 Ω IC = 500 µA, RS = 200 Ω IC = 100 µA, RS = 2.0 kΩ IC = 50 µA, RS = 4.0 kΩ RS = OPTIMUM RS = SOURCE RS = RESISTANCE 10 f = 1.0 kHz 8.0 NF, NOISE FIGURE (dB) IC = 50 µA IC = 100 µA IC = 500 µA IC = 1.0 mA 8.0 NF, NOISE FIGURE (dB) 6.0 6.0 4.0 4.0 2.0 0 0.01 0.02 0.05 0.1 0.2 2.0 0 0.5 1.0 2.0 5.0 10 20 50 100 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k 20 k 50 k 100 k RS, SOURCE RESISTANCE (OHMS) f, FREQUENCY (kHz) Figure 9. Frequency Effects Figure 10. Source Resistance Effects h PARAMETERS VCE = 10 Vdc, f = 1.0 kHz, TA = 25°C selected from the MMBT4401LT1 lines, and the same units This group of graphs illustrates the relationship between were used to develop the correspondingly numbered curves hfe and other “h” parameters for this series of transistors. To on each graph. obtain these curves, a high–gain and a low–gain unit were 300 hie , INPUT IMPEDANCE (OHMS) 200 hfe , CURRENT GAIN 50 k MMBT4401LT1 UNIT 1 MMBT4401LT1 UNIT 2 20 k 10 k 5.0 k 100 70 50 30 20 0.1 MMBT4401LT1 UNIT 1 MMBT4401LT1 UNIT 2 2.0 k 1.0 k 500 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA) Figure 11. Current Gain 10 h re , VOLTAGE FEEDBACK RATIO (X 10 –4 ) hoe, OUTPUT ADMITTANCE (m mhos) 7.0 5.0 3.0 2.0 1.0 0.7 0.5 0.3 0.2 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 100 50 Figure 12. Input Impedance MMBT4401LT1 UNIT 1 MMBT4401LT1 UNIT 2 20 10 5.0 2.0 1.0 0.1 MMBT4401LT1 UNIT 1 MMBT4401LT1 UNIT 2 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA) Figure 13. Voltage Feedback Ratio 4 Figure 14. Output Admittance Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBT4401LT1 STATIC CHARACTERISTICS 3.0 h FE, NORMALIZED CURRENT GAIN 2.0 VCE = 1.0 V VCE = 10 V TJ = 125°C 1.0 0.7 0.5 0.3 0.2 0.1 – 55°C 25°C 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 IC, COLLECTOR CURRENT (mA) 30 50 70 100 200 300 500 Figure 15. DC Current Gain VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS) 1.0 TJ = 25°C 0.8 0.6 IC = 1.0 mA 10 mA 100 mA 500 mA 0.4 0.2 0 0.01 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1.0 IB, BASE CURRENT (mA) 2.0 3.0 5.0 7.0 10 20 30 50 Figure 16. Collector Saturation Region 1.0 TJ = 25°C 0.8 VOLTAGE (VOLTS) VBE(sat) @ IC/IB = 10 COEFFICIENT (mV/ °C) + 0.5 0 – 0.5 – 1.0 – 1.5 – 2.0 – 2.5 0.1 0.2 qVC for VCE(sat) 0.6 VBE @ VCE = 10 V 0.4 0.2 VCE(sat) @ IC/IB = 10 qVB for VBE 0.5 50 1.0 2.0 5.0 10 20 IC, COLLECTOR CURRENT (mA) 100 200 500 0 0.1 0.2 0.5 50 1.0 2.0 5.0 10 20 IC, COLLECTOR CURRENT (mA) 100 200 500 Figure 17. “On” Voltages Figure 18. Temperature Coefficients Motorola Small–Signal Transistors, FETs and Diodes Device Data 5 MMBT4401LT1 INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 inches mm SOT–23 SOT–23 POWER DISSIPATION The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA . Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows: PD = TJ(max) – TA RθJA SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150°C – 25°C 556°C/W = 225 milliwatts The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad™. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. 6 Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBT4401LT1 PACKAGE DIMENSIONS A L 3 BS 1 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0180 0.0236 0.0350 0.0401 0.0830 0.0984 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.45 0.60 0.89 1.02 2.10 2.50 0.45 0.60 V G C D H K J DIM A B C D G H J K L S V CASE 318–08 SOT–23 (TO–236AB) ISSUE AE STYLE 6: PIN 1. BASE 2. EMITTER 3. COLLECTOR Motorola Small–Signal Transistors, FETs and Diodes Device Data 7 MMBT4401LT1 Motorola reserves the right to make changes without further notice to any products herein. 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Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE (602) 244–6609 INTERNET: http://Design–NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 8 ◊ Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBT4401LT1/D *MMBT4401LT1/D*