MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MMBT5088LT1/D
Low Noise Transistors
NPN Silicon
1 BASE
COLLECTOR 3
MMBT5088LT1 MMBT5089LT1*
*Motorola Preferred Device
MAXIMUM RATINGS
Rating Collector – Emitter Voltage Collector – Base Voltage Emitter – Base Voltage Collector Current — Continuous Symbol VCEO VCBO VEBO IC 5088LT1 30 35 4.5 50
2 EMITTER
1
3
5089LT1 25 30
Unit Vdc Vdc Vdc mAdc
2
CASE 318 – 08, STYLE 6 SOT– 23 (TO – 236AB)
THERMAL CHARACTERISTICS
Characteristic Total Device Dissipation FR– 5 Board(1) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Total Device Dissipation Alumina Substrate,(2) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Junction and Storage Temperature Symbol PD Max 225 1.8 RqJA PD 556 300 2.4 RqJA TJ, Tstg 417 – 55 to +150 Unit mW mW/°C °C/W mW mW/°C °C/W °C
DEVICE MARKING
MMBT5088LT1 = 1Q; MMBT5089LT1 = 1R
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector – Emitter Breakdown Voltage (IC = 1.0 mAdc, IB = 0) Collector – Base Breakdown Voltage (IC = 100 mAdc, IE = 0) Collector Cutoff Current (VCB = 20 Vdc, IE = 0) (VCB = 15 Vdc, IE = 0) Emitter Cutoff Current (VEB(off) = 3.0 Vdc, IC = 0) (VEB(off) = 4.5 Vdc, IC = 0) 1. FR– 5 = 1.0 0.75 2. Alumina = 0.4 0.3 V(BR)CEO MMBT5088 MMBT5089 V(BR)CBO MMBT5088 MMBT5089 ICBO MMBT5088 MMBT5089 IEBO MMBT5088 MMBT5089 — — 50 100 — — 50 50 nAdc 35 30 — — nAdc 30 25 — — Vdc Vdc
0.062 in. 0.024 in. 99.5% alumina.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
Motorola Small–Signal Transistors, FETs and Diodes Device Data © Motorola, Inc. 1996
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MMBT5088LT1 MMBT5089LT1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic Symbol Min Max Unit
ON CHARACTERISTICS
DC Current Gain (IC = 100 µAdc, VCE = 5.0 Vdc) hFE MMBT5088 MMBT5089 MMBT5088 MMBT5089 MMBT5088 MMBT5089 VCE(sat) — VBE(sat) — 0.8 0.5 Vdc 300 400 350 450 300 400 900 1200 — — — — Vdc —
(IC = 1.0 mAdc, VCE = 5.0 Vdc)
(IC = 10 mAdc, VCE = 5.0 Vdc) Collector – Emitter Saturation Voltage (IC = 10 mAdc, IB = 1.0 mAdc) Base – Emitter Saturation Voltage (IC = 10 mAdc, IB = 1.0 mAdc)
SMALL– SIGNAL CHARACTERISTICS
Current – Gain — Bandwidth Product (IC = 500 µAdc, VCE = 5.0 Vdc, f = 20 MHz) Collector–Base Capacitance (VCB = 5.0 Vdc, IE = 0, f = 1.0 MHz emitter guarded) Emitter–Base Capacitance (VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz collector guarded) Small Signal Current Gain (IC = 1.0 mAdc, VCE = 5.0 Vdc, f = 1.0 kHz) Noise Figure (IC = 100 mAdc, VCE = 5.0 Vdc, RS = 10 kΩ, f = 1.0 kHz) MMBT5088 MMBT5089 NF MMBT5088 MMBT5089 — — 3.0 2.0 fT 50 Ccb — Ceb — hfe 350 450 1400 1800 dB 10 — 4.0 pF — pF MHz
RS
in en
IDEAL TRANSISTOR
Figure 1. Transistor Noise Model
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Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBT5088LT1 MMBT5089LT1
NOISE CHARACTERISTICS
(VCE = 5.0 Vdc, TA = 25°C) NOISE VOLTAGE
30 BANDWIDTH = 1.0 Hz 20 en , NOISE VOLTAGE (nV) en , NOISE VOLTAGE (nV) IC = 10 mA 3.0 mA 1.0 mA RS ≈ 0 20 RS ≈ 0 f = 10 Hz 10 7.0 10 kHz 5.0 1.0 kHz 100 Hz 30 BANDWIDTH = 1.0 Hz
10 7.0 5.0
300 µA 3.0 10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k 100 k f, FREQUENCY (Hz) 3.0 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 IC, COLLECTOR CURRENT (mA)
100 kHz 5.0 10
Figure 2. Effects of Frequency
10 7.0 5.0 In, NOISE CURRENT (pA) 3.0 2.0 1.0 0.7 0.5 0.3 0.2 0.1 10 RS ≈ 0 20 10 µA 50 100 200 3.0 mA 1.0 mA 300 µA 100 µA 30 µA 0 10 20 20 16 NF, NOISE FIGURE (dB)
Figure 3. Effects of Collector Current
BANDWIDTH = 1.0 Hz IC = 10 mA
BANDWIDTH = 10 Hz to 15.7 kHz 12 500 µA 100 µA 4.0 10 µA IC = 1.0 mA
8.0
500 1 k 2 k 5 k 10 k 20 k 50 k 100 k f, FREQUENCY (Hz)
50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k 100 k RS, SOURCE RESISTANCE (OHMS)
Figure 4. Noise Current 100 Hz NOISE DATA
300 200 VT, TOTAL NOISE VOLTAGE (nV) 100 70 50 30 20 10 7.0 5.0 3.0 10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k 100 k RS, SOURCE RESISTANCE (OHMS) 20 BANDWIDTH = 1.0 Hz 100 µA 3.0 mA 1.0 mA 300 µA 30 µA 10 µA IC = 10 mA 16 NF, NOISE FIGURE (dB)
Figure 5. Wideband Noise Figure
IC = 10 mA
3.0 mA 1.0 mA 300 µA
12
8.0 100 µA 4.0 BANDWIDTH = 1.0 Hz 0 10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k 100 k RS, SOURCE RESISTANCE (OHMS) 30 µA 10 µA
Figure 6. Total Noise Voltage
Figure 7. Noise Figure
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
MMBT5088LT1 MMBT5089LT1
h FE, DC CURRENT GAIN (NORMALIZED) 4.0 3.0 VCE = 5.0 V 2.0 TA = 125°C 25°C 1.0 0.7 0.5 0.4 0.3 0.2 0.01 – 55°C
0.02
0.03
0.05
0.1
0.2 0.3 0.5 IC, COLLECTOR CURRENT (mA)
1.0
2.0
3.0
5.0
10
Figure 8. DC Current Gain
1.0 0.8 V, VOLTAGE (VOLTS) RθVBE, BASE–EMITTER TEMPERATURE COEFFICIENT (mV/ °C) TJ = 25°C
– 0.4 – 0.8
0.6
VBE @ VCE = 5.0 V
– 1.2 TJ = 25°C to 125°C
0.4
– 1.6
0.2 VCE(sat) @ IC/IB = 10 0 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 IC, COLLECTOR CURRENT (mA) 50 100
– 2.0
– 55°C to 25°C
– 2.4 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 IC, COLLECTOR CURRENT (mA)
20
50 100
Figure 9. “On” Voltages
f T, CURRENT–GAIN — BANDWIDTH PRODUCT (MHz)
Figure 10. Temperature Coefficients
8.0 6.0 C, CAPACITANCE (pF) 4.0 3.0 2.0 Cob Ccb Ceb Cib TJ = 25°C
500
300 200
100 70 50 1.0 2.0 3.0 5.0 7.0 10 20 30 IC, COLLECTOR CURRENT (mA) 50 70 100 VCE = 5.0 V TJ = 25°C
1.0 0.8 0.1 0.2 1.0 2.0 5.0 0.5 10 20 VR, REVERSE VOLTAGE (VOLTS) 50 100
Figure 11. Capacitance
Figure 12. Current–Gain — Bandwidth Product
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Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBT5088LT1 MMBT5089LT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.037 0.95
0.037 0.95
0.079 2.0 0.035 0.9 0.031 0.8
inches mm
SOT–23 SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA . Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows: PD = TJ(max) – TA RθJA
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150°C – 25°C 556°C/W = 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad™. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
MMBT5088LT1 MMBT5089LT1
PACKAGE DIMENSIONS
A L
3
BS
1 2
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0180 0.0236 0.0350 0.0401 0.0830 0.0984 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.45 0.60 0.89 1.02 2.10 2.50 0.45 0.60
V
G
C D H K J
DIM A B C D G H J K L S V
CASE 318–08 SOT–23 (TO–236AB) ISSUE AE
STYLE 6: PIN 1. BASE 2. EMITTER 3. COLLECTOR
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Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBT5088LT1/D
*MMBT5088LT1/D*