MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MMBTA13LT1/D
Darlington Amplifier Transistors
NPN Silicon
COLLECTOR 3 BASE 1
MMBTA13LT1 MMBTA14LT1*
*Motorola Preferred Device
EMITTER 2
3 1 2
MAXIMUM RATINGS
Rating Collector – Emitter Voltage Collector – Base Voltage Emitter – Base Voltage Collector Current — Continuous Symbol VCES VCBO VEBO IC Value 30 30 10 300 Unit Vdc Vdc Vdc mAdc
CASE 318 – 08, STYLE 6 SOT– 23 (TO – 236AB)
THERMAL CHARACTERISTICS
Characteristic Total Device Dissipation FR– 5 Board(1) TA = 25°C Derate above 25°C Thermal Resistance Junction to Ambient Total Device Dissipation Alumina Substrate,(2) TA = 25°C Derate above 25°C Thermal Resistance Junction to Ambient Junction and Storage Temperature Symbol PD Max 225 1.8 RqJA PD 556 300 2.4 RqJA TJ, Tstg 417 – 55 to +150 Unit mW mW/°C °C/W mW mW/°C °C/W °C
DEVICE MARKING
MMBTA13LT1 = 1M; MMBTA14LT1 = 1N
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector – Emitter Breakdown Voltage (IC = 100 mAdc, VBE = 0) Collector Cutoff Current (VCB = 30 Vdc, IE = 0) Emitter Cutoff Current (VEB = 10 Vdc, IC = 0) 1. FR– 5 = 1.0 0.75 2. Alumina = 0.4 0.3 V(BR)CES ICBO IEBO 30 — — — 100 100 Vdc nAdc nAdc
0.062 in. 0.024 in. 99.5% alumina.
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
Motorola Small–Signal Transistors, FETs and Diodes Device Data © Motorola, Inc. 1996
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MMBTA13LT1 MMBTA14LT1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic Symbol Min Max Unit
ON CHARACTERISTICS(3)
DC Current Gain (IC = 10 mAdc, VCE = 5.0 Vdc) hFE MMBTA13 MMBTA14 MMBTA13 MMBTA14 VCE(sat) VBE 5000 10,000 10,000 20,000 — — — — — — 1.5 2.0 Vdc Vdc —
(IC = 100 mAdc, VCE = 5.0 Vdc) Collector – Emitter Saturation Voltage (IC = 100 mAdc, IB = 0.1 mAdc) Base – Emitter On Voltage (IC = 100 mAdc, VCE = 5.0 Vdc)
SMALL– SIGNAL CHARACTERISTICS
Current – Gain — Bandwidth Product(4) (IC = 10 mAdc, VCE = 5.0 Vdc, f = 100 MHz) 3. Pulse Test: Pulse Width 4. fT = |hfe| • ftest. fT 125 — MHz
v 300 ms, Duty Cycle v 2.0%.
RS
in en
IDEAL TRANSISTOR
Figure 1. Transistor Noise Model
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Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBTA13LT1 MMBTA14LT1
NOISE CHARACTERISTICS
(VCE = 5.0 Vdc, TA = 25°C)
500 200 en, NOISE VOLTAGE (nV) 100 10 µA 50 100 µA 20 IC = 1.0 mA 10 5.0 10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k f, FREQUENCY (Hz) 50 k 100 k BANDWIDTH = 1.0 Hz RS ≈ 0 i n, NOISE CURRENT (pA)
2.0 BANDWIDTH = 1.0 Hz 1.0 0.7 0.5 0.3 0.2 0.1 0.07 0.05 0.03 0.02 10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k f, FREQUENCY (Hz) 50 k 100 k 100 µA 10 µA
IC = 1.0 mA
Figure 2. Noise Voltage
Figure 3. Noise Current
VT, TOTAL WIDEBAND NOISE VOLTAGE (nV)
200
14 BANDWIDTH = 10 Hz TO 15.7 kHz 12 NF, NOISE FIGURE (dB)
100 70 50 30 20
BANDWIDTH = 10 Hz TO 15.7 kHz IC = 10 µA 10 10 µA 8.0 6.0 4.0 2.0 0 1.0 IC = 1.0 mA 100 µA
100 µA
1.0 mA 10
1.0
2.0
5.0
10 20 50 100 200 RS, SOURCE RESISTANCE (kΩ)
500
100 0
2.0
5.0
10 20 50 100 200 RS, SOURCE RESISTANCE (kΩ)
500
100 0
Figure 4. Total Wideband Noise Voltage
Figure 5. Wideband Noise Figure
Motorola Small–Signal Transistors, FETs and Diodes Device Data
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MMBTA13LT1 MMBTA14LT1
SMALL–SIGNAL CHARACTERISTICS
20 TJ = 25°C C, CAPACITANCE (pF) 10 7.0 5.0 Cibo Cobo |h fe |, SMALL–SIGNAL CURRENT GAIN
4.0 VCE = 5.0 V f = 100 MHz TJ = 25°C
2.0
1.0 0.8 0.6 0.4
3.0
2.0 0.04
0.1
0.2 0.4 1.0 2.0 4.0 10 VR, REVERSE VOLTAGE (VOLTS)
20
40
0.2 0.5
1.0
2.0
0.5 10 20 50 100 200 IC, COLLECTOR CURRENT (mA)
500
Figure 6. Capacitance
Figure 7. High Frequency Current Gain
200 k 100 k 70 k 50 k 30 k 20 k 10 k 7.0 k 5.0 k 3.0 k
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
TJ = 125°C
3.0 TJ = 25°C 2.5 IC = 10 mA 2.0 50 mA 250 mA 500 mA
hFE, DC CURRENT GAIN
25°C
1.5
– 55°C VCE = 5.0 V
1.0
2.0 k 5.0 7.0
10
20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (mA)
500
0.5 0.1 0.2
0.5 1.0 2.0 5.0 10 20 50 100 200 IB, BASE CURRENT (µA)
500 1000
Figure 8. DC Current Gain
Figure 9. Collector Saturation Region
RθV, TEMPERATURE COEFFICIENTS (mV/°C)
1.6 TJ = 25°C 1.4 V, VOLTAGE (VOLTS) VBE(sat) @ IC/IB = 1000 1.2 VBE(on) @ VCE = 5.0 V 1.0
– 1.0
*APPLIES FOR IC/IB ≤ hFE/3.0 *RqVC FOR VCE(sat)
25°C TO 125°C
– 2.0
– 55°C TO 25°C – 3.0 25°C TO 125°C – 4.0
qVB FOR VBE
– 5.0 – 55°C TO 25°C
0.8 VCE(sat) @ IC/IB = 1000 0.6 5.0 7.0 10 20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (mA) 500
– 6.0 5.0 7.0 10
20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (mA)
500
Figure 10. “On” Voltages
Figure 11. Temperature Coefficients
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Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBTA13LT1 MMBTA14LT1
r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1.0 0.7 0.5 0.3 0.2 0.1 0.1 0.07 0.05 0.03 0.02 0.01 0.1 0.05 SINGLE PULSE D = 0.5 0.2
SINGLE PULSE ZθJC(t) = r(t) • RθJC TJ(pk) – TC = P(pk) ZθJC(t) ZθJA(t) = r(t) • RθJA TJ(pk) – TA = P(pk) ZθJA(t)
0.2
0.5
1.0
2.0
5.0
10
20 50 t, TIME (ms)
100
200
500
1.0 k
2.0 k
5.0 k
10 k
Figure 12. Thermal Response
IC, COLLECTOR CURRENT (mA)
1.0 k 700 500 300 200 100 70 50 30 20 10 0.4 0.6 CURRENT LIMIT THERMAL LIMIT SECOND BREAKDOWN LIMIT TA = 25°C TC = 25°C
1.0 ms 100 µs
FIGURE A tP PP PP
1.0 s
t1 1/f DUTY CYCLE 1.0 2.0 4.0 6.0 10 20 VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS) 40 1 + t1 f + ttP
PEAK PULSE POWER = PP
Figure 13. Active Region Safe Operating Area
Design Note: Use of Transient Thermal Resistance Data
Motorola Small–Signal Transistors, FETs and Diodes Device Data
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MMBTA13LT1 MMBTA14LT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.037 0.95
0.037 0.95
0.079 2.0 0.035 0.9 0.031 0.8
inches mm
SOT–23 SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA . Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows: PD = TJ(max) – TA RθJA
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150°C – 25°C 556°C/W = 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad™. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint.
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Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBTA13LT1 MMBTA14LT1
PACKAGE DIMENSIONS
A L
3
BS
1 2
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0180 0.0236 0.0350 0.0401 0.0830 0.0984 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.45 0.60 0.89 1.02 2.10 2.50 0.45 0.60
V
G
C D H K J
DIM A B C D G H J K L S V
CASE 318–08 ISSUE AE SOT–23 (TO–236AB)
STYLE 6: PIN 1. BASE 2. EMITTER 3. COLLECTOR
Motorola Small–Signal Transistors, FETs and Diodes Device Data
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MMBTA13LT1 MMBTA14LT1
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Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBTA13LT1/D
*MMBTA13LT1/D*