MMBTA92LT1

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MMBTA92LT1/D High Voltage Transistors PNP Silicon 1 BASE COLLECTOR 3 MMBTA92LT1* MMBTA93LT1 *Motorola Preferred Device 2 EMITTER 3 1 2 MAXIMUM RATINGS Rating Collector – Emitter Voltage Collector – Base Voltage Emitter – Base Voltage Collector Current — Continuous Symbol VCEO VCBO VEBO IC MMBTA92 –300 –300 –5.0 –500 MMBTA93 –200 –200 –5.0 Unit Vdc Vdc Vdc mAdc CASE 318 – 08, STYLE 6 SOT– 23 (TO – 236AB) DEVICE MARKING MMBTA92LT1 = 2D; MMBTA93LT1 = 2E THERMAL CHARACTERISTICS Characteristic Total Device Dissipation FR–5 Board,(1) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Total Device Dissipation Alumina Substrate,(2) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Junction and Storage Temperature Symbol PD Max 225 1.8 RqJA PD 556 300 2.4 RqJA TJ, Tstg 417 –55 to +150 Unit mW mW/°C °C/W mW mW/°C °C/W °C ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS Collector – Emitter Breakdown Voltage(3) (IC = –1.0 mAdc, IB = 0) Collector – Base Breakdown Voltage (IC = –100 mAdc, IE = 0) Emitter – Base Breakdown Voltage (IE = –100 mAdc, IC = 0) Collector Cutoff Current (VCB = –200 Vdc, IE = 0) (VCB = –160 Vdc, IE = 0) Emitter Cutoff Current (VEB = –3.0 Vdc, IC = 0) 1. FR–5 = 1.0 x 0.75 x 0.062 in. 2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina. 3. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%. Thermal Clad is a trademark of the Bergquist Company Preferred devices are Motorola recommended choices for future use and best overall value. V(BR)CEO MMBTA92 MMBTA93 V(BR)CBO MMBTA92 MMBTA93 V(BR)EBO ICBO MMBTA92 MMBTA93 IEBO — — — –0.25 –0.25 –0.1 –300 –200 –5.0 — — — –300 –200 — — Vdc Vdc Vdc µAdc µAdc Motorola Small–Signal Transistors, FETs and Diodes Device Data © Motorola, Inc. 1996 1 MMBTA92LT1 MMBTA93LT1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued) Characteristic Symbol Min Max Unit ON CHARACTERISTICS(3) DC Current Gain (IC = –1.0 mAdc, VCE = –10 Vdc) (IC = –10 mAdc, VCE = –10 Vdc) (IC = –30 mAdc, VCE = –10 Vdc) Collector – Emitter Saturation Voltage (IC = –20 mAdc, IB = –2.0 mAdc) Base–Emitter Saturation Voltage (IC = –20 mAdc, IB = –2.0 mAdc) hFE Both Types Both Types MMBTA92 MMBTA93 VCE(sat) MMBTA92 MMBTA93 VBE(sat) — — — –0.5 –0.5 –0.9 Vdc 25 40 25 25 — — — — Vdc — SMALL– SIGNAL CHARACTERISTICS Current – Gain — Bandwidth Product (IC = –10 mAdc, VCE = –20 Vdc, f = 100 MHz) Collector–Base Capacitance (VCB = –20 Vdc, IE = 0, f = 1.0 MHz) 3. Pulse Test: Pulse Width MMBTA92 MMBTA93 fT Ccb — — 6.0 8.0 50 — MHz pF v 300 ms, Duty Cycle v 2.0%. 2 Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBTA92LT1 MMBTA93LT1 150 100 hFE, DC CURRENT GAIN +25°C 70 50 –55°C TJ = +125°C VCE = –10 Vdc 30 20 15 –1.0 –2.0 –3.0 –5.0 –7.0 –10 –20 –30 –50 –80 –100 IC, COLLECTOR CURRENT (mA) Figure 1. DC Current Gain 100 50 Cib C, CAPACITANCE (pF) 20 10 5.0 f T, CURRENT–GAIN — BANDWIDTH PRODUCT (MHz) 100 80 60 40 30 20 TJ = 25°C VCE = –20 Vdc 2.0 Ccb 1.0 –0.1 –0.2 –0.5 –1.0 –2.0 –5.0 –10 –20 –50 –100–200 –500 –1000 VR, REVERSE VOLTAGE (VOLTS) 0 –1.0 –2.0 –5.0 –10 –20 IC, COLLECTOR CURRENT (mA) –50 –100 Figure 2. Capacitances Figure 3. Current–Gain — Bandwidth Product –1.0 –0.8 V, VOLTAGE (VOLTS) VBE @ VCE = –10 V –0.6 –0.4 –0.2 VCE(sat) @ IC/IB = 10 mA 0 –1.0 –2.0 –5.0 –10 –20 IC, COLLECTOR CURRENT (mA) –50 –100 Figure 4. “On” Voltages Motorola Small–Signal Transistors, FETs and Diodes Device Data 3 MMBTA92LT1 MMBTA93LT1 INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 inches mm SOT–23 SOT–23 POWER DISSIPATION The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA . Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows: PD = TJ(max) – TA RθJA SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150°C – 25°C 556°C/W = 225 milliwatts The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad™. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. 4 Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBTA92LT1 MMBTA93LT1 PACKAGE DIMENSIONS A L 3 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIUMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. BS 1 2 V G C D H K J DIM A B C D G H J K L S V INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0140 0.0285 0.0350 0.0401 0.0830 0.1039 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.35 0.69 0.89 1.02 2.10 2.64 0.45 0.60 STYLE 6: PIN 1. BASE 2. EMITTER 3. COLLECTOR CASE 318–08 ISSUE AE SOT–23 (TO–236AB) Motorola Small–Signal Transistors, FETs and Diodes Device Data 5 MMBTA92LT1 MMBTA93LT1 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. 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How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 6 ◊ MMBTA92LT1/D Motorola Small–Signal Transistors, FETs and Diodes Device Data *MMBTA92LT1/D*